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powerpc/44x: Fix build failure with GCC 12 (unrecognized opcode: `wrteei')

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Building ppc40x_defconfig leads to following error

  CC      arch/powerpc/kernel/idle.o
{standard input}: Assembler messages:
{standard input}:67: Error: unrecognized opcode: `wrteei'
{standard input}:78: Error: unrecognized opcode: `wrteei'

Add -mcpu=440 by default and alternatively 464 and 476.

Once that's done, -mcpu=powerpc is only for book3s/32 now.

But then comes

  CC      arch/powerpc/kernel/io.o
{standard input}: Assembler messages:
{standard input}:198: Error: unrecognized opcode: `eieio'
{standard input}:230: Error: unrecognized opcode: `eieio'
{standard input}:245: Error: unrecognized opcode: `eieio'
{standard input}:254: Error: unrecognized opcode: `eieio'
{standard input}:273: Error: unrecognized opcode: `eieio'
{standard input}:396: Error: unrecognized opcode: `eieio'
{standard input}:404: Error: unrecognized opcode: `eieio'
{standard input}:423: Error: unrecognized opcode: `eieio'
{standard input}:512: Error: unrecognized opcode: `eieio'
{standard input}:520: Error: unrecognized opcode: `eieio'
{standard input}:539: Error: unrecognized opcode: `eieio'
{standard input}:628: Error: unrecognized opcode: `eieio'
{standard input}:636: Error: unrecognized opcode: `eieio'
{standard input}:655: Error: unrecognized opcode: `eieio'

Fix it by replacing eieio by mbar on booke.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/b0d982e223314ed82ab959f5d4ad2c4c00bedb99.1657549153.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy 2022-07-11 16:19:32 +02:00 committed by Michael Ellerman
parent ff27d9200a
commit 2255411d1d
6 changed files with 35 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/powerpc/include/asm/barrier.h
View File

@ -42,6 +42,8 @@
/* The sub-arch has lwsync */
#if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC)
# define SMPWMB LWSYNC
#elif defined(CONFIG_BOOKE)
# define SMPWMB mbar
#else
# define SMPWMB eieio
#endif

2
arch/powerpc/include/asm/nohash/pgtable.h
View File

@ -193,7 +193,7 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr,
if (IS_ENABLED(CONFIG_PPC32) && IS_ENABLED(CONFIG_PTE_64BIT) && !percpu) {
__asm__ __volatile__("\
stw%X0 %2,%0\n\
eieio\n\
mbar\n\
stw%X1 %L2,%1"
: "=m" (*ptep), "=m" (*((unsigned char *)ptep+4))
: "r" (pte) : "memory");

5
arch/powerpc/include/asm/synch.h
View File

@ -14,7 +14,10 @@ extern void do_lwsync_fixups(unsigned long value, void *fixup_start,
static inline void eieio(void)
{
__asm__ __volatile__ ("eieio" : : : "memory");
if (IS_ENABLED(CONFIG_BOOKE))
__asm__ __volatile__ ("mbar" : : : "memory");
else
__asm__ __volatile__ ("eieio" : : : "memory");
}
static inline void isync(void)

4
arch/powerpc/mm/nohash/tlb_low.S
View File

@ -186,7 +186,7 @@ _GLOBAL(_tlbivax_bcast)
isync
PPC_TLBIVAX(0, R3)
isync
eieio
mbar
tlbsync
BEGIN_FTR_SECTION
b 1f
@ -355,7 +355,7 @@ _GLOBAL(_tlbivax_bcast)
rlwimi r4,r6,MAS6_SIND_SHIFT,MAS6_SIND
1: mtspr SPRN_MAS6,r4 /* assume AS=0 for now */
PPC_TLBIVAX(0,R3)
eieio
mbar
tlbsync
sync
wrtee r10

17
arch/powerpc/platforms/Kconfig.cputype
View File

@ -137,7 +137,7 @@ config GENERIC_CPU
config POWERPC_CPU
bool "Generic 32 bits powerpc"
depends on PPC32 && !PPC_8xx && !PPC_85xx && !40x
depends on PPC_BOOK3S_32
config CELL_CPU
bool "Cell Broadband Engine"
@ -183,6 +183,18 @@ config 405_CPU
bool "40x family"
depends on 40x
config 440_CPU
bool "440 (44x family)"
depends on 44x
config 464_CPU
bool "464 (44x family)"
depends on 44x
config 476_CPU
bool "476 (47x family)"
depends on PPC_47x
config 860_CPU
bool "8xx family"
depends on PPC_8xx
@ -228,6 +240,9 @@ config TARGET_CPU
default "power8" if POWER8_CPU
default "power9" if POWER9_CPU
default "405" if 405_CPU
default "440" if 440_CPU
default "464" if 464_CPU
default "476" if 476_CPU
default "860" if 860_CPU
default "e300c2" if E300C2_CPU
default "e300c3" if E300C3_CPU

12
arch/powerpc/sysdev/fsl_rio.c
View File

@ -69,10 +69,10 @@
static DEFINE_SPINLOCK(fsl_rio_config_lock);
#define __fsl_read_rio_config(x, addr, err, op) \
#define ___fsl_read_rio_config(x, addr, err, op, barrier) \
__asm__ __volatile__( \
"1: "op" %1,0(%2)\n" \
" eieio\n" \
" "barrier"\n" \
"2:\n" \
".section .fixup,\"ax\"\n" \
"3: li %1,-1\n" \
@ -83,6 +83,14 @@ static DEFINE_SPINLOCK(fsl_rio_config_lock);
: "=r" (err), "=r" (x) \
: "b" (addr), "i" (-EFAULT), "0" (err))
#ifdef CONFIG_BOOKE
#define __fsl_read_rio_config(x, addr, err, op) \
___fsl_read_rio_config(x, addr, err, op, "mbar")
#else
#define __fsl_read_rio_config(x, addr, err, op) \
___fsl_read_rio_config(x, addr, err, op, "eieio")
#endif
void __iomem *rio_regs_win;
void __iomem *rmu_regs_win;
resource_size_t rio_law_start;