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KVM: arm64: Make vCPU feature flags consistent VM-wide
To date KVM has allowed userspace to construct asymmetric VMs where particular features may only be supported on a subset of vCPUs. This wasn't really the intened usage pattern, and it is a total pain in the ass to keep working in the kernel. What's more, this is at odds with CPU features in host userspace, where asymmetric features are largely hidden or disabled. It's time to put an end to the whole game. Require all vCPUs in the VM to have the same feature set, rejecting deviants in the KVM_ARM_VCPU_INIT ioctl. Preserve some of the vestiges of per-vCPU feature flags in case we need to reinstate the old behavior for some limited configurations. Yes, this is a sign of cowardice around a user-visibile change. Hoist all of the 32-bit limitations into kvm_vcpu_init_check_features() to avoid nested attempts to acquire the config_lock, which won't end well. Link: https://lore.kernel.org/r/20230609190054.1542113-4-oliver.upton@linux.dev Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@ -62,12 +62,7 @@ static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu)
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#else
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static __always_inline bool vcpu_el1_is_32bit(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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WARN_ON_ONCE(!test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED,
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&kvm->arch.flags));
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return test_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags);
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return test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features);
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}
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#endif
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@ -215,25 +215,21 @@ struct kvm_arch {
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#define KVM_ARCH_FLAG_MTE_ENABLED 1
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/* At least one vCPU has ran in the VM */
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#define KVM_ARCH_FLAG_HAS_RAN_ONCE 2
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/*
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* The following two bits are used to indicate the guest's EL1
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* register width configuration. A value of KVM_ARCH_FLAG_EL1_32BIT
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* bit is valid only when KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED is set.
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* Otherwise, the guest's EL1 register width has not yet been
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* determined yet.
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*/
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#define KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED 3
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#define KVM_ARCH_FLAG_EL1_32BIT 4
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/* The vCPU feature set for the VM is configured */
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#define KVM_ARCH_FLAG_VCPU_FEATURES_CONFIGURED 3
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/* PSCI SYSTEM_SUSPEND enabled for the guest */
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#define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED 5
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#define KVM_ARCH_FLAG_SYSTEM_SUSPEND_ENABLED 4
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/* VM counter offset */
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#define KVM_ARCH_FLAG_VM_COUNTER_OFFSET 6
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#define KVM_ARCH_FLAG_VM_COUNTER_OFFSET 5
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/* Timer PPIs made immutable */
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#define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE 7
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#define KVM_ARCH_FLAG_TIMER_PPIS_IMMUTABLE 6
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/* SMCCC filter initialized for the VM */
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#define KVM_ARCH_FLAG_SMCCC_FILTER_CONFIGURED 8
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#define KVM_ARCH_FLAG_SMCCC_FILTER_CONFIGURED 7
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unsigned long flags;
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/* VM-wide vCPU feature set */
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DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
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/*
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* VM-wide PMU filter, implemented as a bitmap and big enough for
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* up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+).
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@ -170,6 +170,8 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
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*/
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kvm->arch.dfr0_pmuver.imp = kvm_arm_pmu_get_pmuver_limit();
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bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
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return 0;
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err_free_cpumask:
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@ -1181,6 +1183,20 @@ static int kvm_vcpu_init_check_features(struct kvm_vcpu *vcpu,
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return -ENOENT;
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}
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if (!test_bit(KVM_ARM_VCPU_EL1_32BIT, &features))
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return 0;
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if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1))
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return -EINVAL;
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/* MTE is incompatible with AArch32 */
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if (kvm_has_mte(vcpu->kvm))
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return -EINVAL;
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/* NV is incompatible with AArch32 */
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if (test_bit(KVM_ARM_VCPU_HAS_EL2, &features))
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return -EINVAL;
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return 0;
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}
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@ -1197,7 +1213,14 @@ static int __kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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const struct kvm_vcpu_init *init)
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{
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unsigned long features = init->features[0];
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int ret;
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struct kvm *kvm = vcpu->kvm;
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int ret = -EINVAL;
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mutex_lock(&kvm->arch.config_lock);
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if (test_bit(KVM_ARCH_FLAG_VCPU_FEATURES_CONFIGURED, &kvm->arch.flags) &&
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!bitmap_equal(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES))
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goto out_unlock;
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vcpu->arch.target = init->target;
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bitmap_copy(vcpu->arch.features, &features, KVM_VCPU_MAX_FEATURES);
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@ -1207,8 +1230,14 @@ static int __kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
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if (ret) {
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vcpu->arch.target = -1;
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bitmap_zero(vcpu->arch.features, KVM_VCPU_MAX_FEATURES);
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goto out_unlock;
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}
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bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
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set_bit(KVM_ARCH_FLAG_VCPU_FEATURES_CONFIGURED, &kvm->arch.flags);
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out_unlock:
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mutex_unlock(&kvm->arch.config_lock);
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return ret;
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}
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@ -186,57 +186,6 @@ static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu)
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return 0;
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}
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/**
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* kvm_set_vm_width() - set the register width for the guest
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* @vcpu: Pointer to the vcpu being configured
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*
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* Set both KVM_ARCH_FLAG_EL1_32BIT and KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED
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* in the VM flags based on the vcpu's requested register width, the HW
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* capabilities and other options (such as MTE).
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* When REG_WIDTH_CONFIGURED is already set, the vcpu settings must be
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* consistent with the value of the FLAG_EL1_32BIT bit in the flags.
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*
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* Return: 0 on success, negative error code on failure.
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*/
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static int kvm_set_vm_width(struct kvm_vcpu *vcpu)
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{
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struct kvm *kvm = vcpu->kvm;
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bool is32bit;
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is32bit = vcpu_has_feature(vcpu, KVM_ARM_VCPU_EL1_32BIT);
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lockdep_assert_held(&kvm->arch.config_lock);
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if (test_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, &kvm->arch.flags)) {
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/*
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* The guest's register width is already configured.
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* Make sure that the vcpu is consistent with it.
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*/
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if (is32bit == test_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags))
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return 0;
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return -EINVAL;
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}
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if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1) && is32bit)
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return -EINVAL;
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/* MTE is incompatible with AArch32 */
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if (kvm_has_mte(kvm) && is32bit)
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return -EINVAL;
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/* NV is incompatible with AArch32 */
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if (vcpu_has_nv(vcpu) && is32bit)
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return -EINVAL;
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if (is32bit)
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set_bit(KVM_ARCH_FLAG_EL1_32BIT, &kvm->arch.flags);
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set_bit(KVM_ARCH_FLAG_REG_WIDTH_CONFIGURED, &kvm->arch.flags);
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return 0;
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}
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/**
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* kvm_reset_vcpu - sets core registers and sys_regs to reset value
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* @vcpu: The VCPU pointer
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@ -262,13 +211,6 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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bool loaded;
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u32 pstate;
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mutex_lock(&vcpu->kvm->arch.config_lock);
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ret = kvm_set_vm_width(vcpu);
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mutex_unlock(&vcpu->kvm->arch.config_lock);
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if (ret)
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return ret;
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spin_lock(&vcpu->arch.mp_state_lock);
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reset_state = vcpu->arch.reset_state;
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vcpu->arch.reset_state.reset = false;
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