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drm/i915: implement timing override workarounds on LPT
These workarounds are documented on the CRT mode set sequence. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -1729,6 +1729,11 @@ static void lpt_enable_pch_transcoder(struct drm_i915_private *dev_priv,
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assert_fdi_tx_enabled(dev_priv, cpu_transcoder);
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assert_fdi_rx_enabled(dev_priv, TRANSCODER_A);
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/* Workaround: set timing override bit. */
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val = I915_READ(_TRANSA_CHICKEN2);
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val |= TRANS_AUTOTRAIN_GEN_STALL_DIS;
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I915_WRITE(_TRANSA_CHICKEN2, val);
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val = TRANS_ENABLE;
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pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));
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@ -1780,6 +1785,11 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv,
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/* wait for PCH transcoder off, transcoder state */
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if (wait_for((I915_READ(_TRANSACONF) & TRANS_STATE_ENABLE) == 0, 50))
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DRM_ERROR("Failed to disable PCH transcoder\n");
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/* Workaround: clear timing override bit. */
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val = I915_READ(_TRANSA_CHICKEN2);
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val &= ~TRANS_AUTOTRAIN_GEN_STALL_DIS;
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I915_WRITE(_TRANSA_CHICKEN2, val);
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}
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/**
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