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pinctrl: pinctrl-tps6594: Add TPS65224 PMIC pinctrl and GPIO
Add support for TPS65224 pinctrl and GPIOs to TPS6594 driver as they have significant functional overlap. TPS65224 PMIC has 6 GPIOS which can be configured as GPIO or other dedicated device functions. Signed-off-by: Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com> Signed-off-by: Bhargav Raviprakash <bhargav.r@ltts.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/0109018f2fdce15d-c13bd809-a11b-4202-9b7f-c9380d51b070-000000@ap-south-1.amazonses.com Signed-off-by: Lee Jones <lee@kernel.org>
This commit is contained in:
parent
00c826525f
commit
2088297159
@ -14,8 +14,6 @@
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#include <linux/mfd/tps6594.h>
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#define TPS6594_PINCTRL_PINS_NB 11
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#define TPS6594_PINCTRL_GPIO_FUNCTION 0
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#define TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1
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#define TPS6594_PINCTRL_TRIG_WDOG_FUNCTION 1
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@ -40,17 +38,40 @@
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#define TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8 3
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#define TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9 3
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/* TPS65224 pin muxval */
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#define TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION 1
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#define TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION 1
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#define TPS65224_PINCTRL_VMON1_FUNCTION 1
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#define TPS65224_PINCTRL_VMON2_FUNCTION 1
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#define TPS65224_PINCTRL_WKUP_FUNCTION 1
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#define TPS65224_PINCTRL_NSLEEP2_FUNCTION 2
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#define TPS65224_PINCTRL_NSLEEP1_FUNCTION 2
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#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION 2
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#define TPS65224_PINCTRL_NERR_MCU_FUNCTION 2
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#define TPS65224_PINCTRL_NINT_FUNCTION 3
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#define TPS65224_PINCTRL_TRIG_WDOG_FUNCTION 3
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#define TPS65224_PINCTRL_PB_FUNCTION 3
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#define TPS65224_PINCTRL_ADC_IN_FUNCTION 3
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/* TPS65224 Special muxval for recalcitrant pins */
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#define TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5 1
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#define TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5 4
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#define TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5 3
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#define TPS6594_OFFSET_GPIO_SEL 5
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#define FUNCTION(fname, v) \
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#define TPS65224_NGPIO_PER_REG 6
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#define TPS6594_NGPIO_PER_REG 8
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#define FUNCTION(dev_name, fname, v) \
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{ \
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.pinfunction = PINCTRL_PINFUNCTION(#fname, \
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tps6594_##fname##_func_group_names, \
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ARRAY_SIZE(tps6594_##fname##_func_group_names)),\
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dev_name##_##fname##_func_group_names, \
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ARRAY_SIZE(dev_name##_##fname##_func_group_names)),\
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.muxval = v, \
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}
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static const struct pinctrl_pin_desc tps6594_pins[TPS6594_PINCTRL_PINS_NB] = {
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static const struct pinctrl_pin_desc tps6594_pins[] = {
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PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"),
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PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"),
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PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"),
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@ -143,30 +164,127 @@ static const char *const tps6594_syncclkin_func_group_names[] = {
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"GPIO9",
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};
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static const struct pinctrl_pin_desc tps65224_pins[] = {
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PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"),
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PINCTRL_PIN(2, "GPIO2"), PINCTRL_PIN(3, "GPIO3"),
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PINCTRL_PIN(4, "GPIO4"), PINCTRL_PIN(5, "GPIO5"),
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};
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static const char *const tps65224_gpio_func_group_names[] = {
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"GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5",
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};
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static const char *const tps65224_sda_i2c2_sdo_spi_func_group_names[] = {
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"GPIO0",
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};
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static const char *const tps65224_nsleep2_func_group_names[] = {
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"GPIO0", "GPIO5",
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};
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static const char *const tps65224_nint_func_group_names[] = {
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"GPIO0",
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};
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static const char *const tps65224_scl_i2c2_cs_spi_func_group_names[] = {
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"GPIO1",
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};
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static const char *const tps65224_nsleep1_func_group_names[] = {
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"GPIO1", "GPIO2", "GPIO3",
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};
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static const char *const tps65224_trig_wdog_func_group_names[] = {
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"GPIO1",
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};
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static const char *const tps65224_vmon1_func_group_names[] = {
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"GPIO2",
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};
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static const char *const tps65224_pb_func_group_names[] = {
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"GPIO2",
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};
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static const char *const tps65224_vmon2_func_group_names[] = {
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"GPIO3",
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};
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static const char *const tps65224_adc_in_func_group_names[] = {
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"GPIO3", "GPIO4",
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};
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static const char *const tps65224_wkup_func_group_names[] = {
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"GPIO4", "GPIO5",
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};
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static const char *const tps65224_syncclkin_func_group_names[] = {
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"GPIO4", "GPIO5",
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};
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static const char *const tps65224_nerr_mcu_func_group_names[] = {
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"GPIO5",
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};
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struct tps6594_pinctrl_function {
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struct pinfunction pinfunction;
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u8 muxval;
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};
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struct muxval_remap {
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unsigned int group;
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u8 muxval;
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u8 remap;
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};
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struct muxval_remap tps65224_muxval_remap[] = {
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{5, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS65224_PINCTRL_WKUP_FUNCTION_GPIO5},
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{5, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION_GPIO5},
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{5, TPS65224_PINCTRL_NSLEEP2_FUNCTION, TPS65224_PINCTRL_NSLEEP2_FUNCTION_GPIO5},
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};
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struct muxval_remap tps6594_muxval_remap[] = {
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{8, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8},
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{8, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8},
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{9, TPS6594_PINCTRL_CLK32KOUT_FUNCTION, TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9},
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};
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static const struct tps6594_pinctrl_function pinctrl_functions[] = {
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FUNCTION(gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
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FUNCTION(nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION),
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FUNCTION(nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION),
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FUNCTION(wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION),
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FUNCTION(wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION),
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FUNCTION(scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
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FUNCTION(nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION),
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FUNCTION(trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION),
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FUNCTION(sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
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FUNCTION(clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION),
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FUNCTION(nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION),
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FUNCTION(sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION),
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FUNCTION(sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION),
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FUNCTION(nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION),
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FUNCTION(syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION),
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FUNCTION(disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION),
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FUNCTION(pdog, TPS6594_PINCTRL_PDOG_FUNCTION),
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FUNCTION(syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION),
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FUNCTION(tps6594, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
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FUNCTION(tps6594, nsleep1, TPS6594_PINCTRL_NSLEEP1_FUNCTION),
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FUNCTION(tps6594, nsleep2, TPS6594_PINCTRL_NSLEEP2_FUNCTION),
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FUNCTION(tps6594, wkup1, TPS6594_PINCTRL_WKUP1_FUNCTION),
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FUNCTION(tps6594, wkup2, TPS6594_PINCTRL_WKUP2_FUNCTION),
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FUNCTION(tps6594, scl_i2c2_cs_spi, TPS6594_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
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FUNCTION(tps6594, nrstout_soc, TPS6594_PINCTRL_NRSTOUT_SOC_FUNCTION),
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FUNCTION(tps6594, trig_wdog, TPS6594_PINCTRL_TRIG_WDOG_FUNCTION),
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FUNCTION(tps6594, sda_i2c2_sdo_spi, TPS6594_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
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FUNCTION(tps6594, clk32kout, TPS6594_PINCTRL_CLK32KOUT_FUNCTION),
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FUNCTION(tps6594, nerr_soc, TPS6594_PINCTRL_NERR_SOC_FUNCTION),
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FUNCTION(tps6594, sclk_spmi, TPS6594_PINCTRL_SCLK_SPMI_FUNCTION),
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FUNCTION(tps6594, sdata_spmi, TPS6594_PINCTRL_SDATA_SPMI_FUNCTION),
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FUNCTION(tps6594, nerr_mcu, TPS6594_PINCTRL_NERR_MCU_FUNCTION),
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FUNCTION(tps6594, syncclkout, TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION),
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FUNCTION(tps6594, disable_wdog, TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION),
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FUNCTION(tps6594, pdog, TPS6594_PINCTRL_PDOG_FUNCTION),
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FUNCTION(tps6594, syncclkin, TPS6594_PINCTRL_SYNCCLKIN_FUNCTION),
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};
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static const struct tps6594_pinctrl_function tps65224_pinctrl_functions[] = {
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FUNCTION(tps65224, gpio, TPS6594_PINCTRL_GPIO_FUNCTION),
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FUNCTION(tps65224, sda_i2c2_sdo_spi, TPS65224_PINCTRL_SDA_I2C2_SDO_SPI_FUNCTION),
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FUNCTION(tps65224, nsleep2, TPS65224_PINCTRL_NSLEEP2_FUNCTION),
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FUNCTION(tps65224, nint, TPS65224_PINCTRL_NINT_FUNCTION),
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FUNCTION(tps65224, scl_i2c2_cs_spi, TPS65224_PINCTRL_SCL_I2C2_CS_SPI_FUNCTION),
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FUNCTION(tps65224, nsleep1, TPS65224_PINCTRL_NSLEEP1_FUNCTION),
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FUNCTION(tps65224, trig_wdog, TPS65224_PINCTRL_TRIG_WDOG_FUNCTION),
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FUNCTION(tps65224, vmon1, TPS65224_PINCTRL_VMON1_FUNCTION),
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FUNCTION(tps65224, pb, TPS65224_PINCTRL_PB_FUNCTION),
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FUNCTION(tps65224, vmon2, TPS65224_PINCTRL_VMON2_FUNCTION),
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FUNCTION(tps65224, adc_in, TPS65224_PINCTRL_ADC_IN_FUNCTION),
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FUNCTION(tps65224, wkup, TPS65224_PINCTRL_WKUP_FUNCTION),
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FUNCTION(tps65224, syncclkin, TPS65224_PINCTRL_SYNCCLKIN_FUNCTION),
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FUNCTION(tps65224, nerr_mcu, TPS65224_PINCTRL_NERR_MCU_FUNCTION),
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};
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struct tps6594_pinctrl {
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@ -175,6 +293,31 @@ struct tps6594_pinctrl {
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struct pinctrl_dev *pctl_dev;
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const struct tps6594_pinctrl_function *funcs;
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const struct pinctrl_pin_desc *pins;
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int func_cnt;
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int num_pins;
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u8 mux_sel_mask;
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unsigned int remap_cnt;
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struct muxval_remap *remap;
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};
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static struct tps6594_pinctrl tps65224_template_pinctrl = {
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.funcs = tps65224_pinctrl_functions,
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.func_cnt = ARRAY_SIZE(tps65224_pinctrl_functions),
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.pins = tps65224_pins,
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.num_pins = ARRAY_SIZE(tps65224_pins),
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.mux_sel_mask = TPS65224_MASK_GPIO_SEL,
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.remap = tps65224_muxval_remap,
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.remap_cnt = ARRAY_SIZE(tps65224_muxval_remap),
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};
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static struct tps6594_pinctrl tps6594_template_pinctrl = {
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.funcs = pinctrl_functions,
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.func_cnt = ARRAY_SIZE(pinctrl_functions),
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.pins = tps6594_pins,
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.num_pins = ARRAY_SIZE(tps6594_pins),
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.mux_sel_mask = TPS6594_MASK_GPIO_SEL,
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.remap = tps6594_muxval_remap,
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.remap_cnt = ARRAY_SIZE(tps6594_muxval_remap),
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};
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static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio,
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@ -201,7 +344,9 @@ static int tps6594_gpio_regmap_xlate(struct gpio_regmap *gpio,
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static int tps6594_pmx_func_cnt(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(pinctrl_functions);
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struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
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return pinctrl->func_cnt;
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}
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static const char *tps6594_pmx_func_name(struct pinctrl_dev *pctldev,
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@ -229,10 +374,16 @@ static int tps6594_pmx_set(struct tps6594_pinctrl *pinctrl, unsigned int pin,
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u8 muxval)
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{
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u8 mux_sel_val = muxval << TPS6594_OFFSET_GPIO_SEL;
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u8 mux_sel_mask = pinctrl->mux_sel_mask;
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if (pinctrl->tps->chip_id == TPS65224 && pin == 5) {
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/* GPIO6 has a different mask in TPS65224*/
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mux_sel_mask = TPS65224_MASK_GPIO_SEL_GPIO6;
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}
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return regmap_update_bits(pinctrl->tps->regmap,
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TPS6594_REG_GPIOX_CONF(pin),
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TPS6594_MASK_GPIO_SEL, mux_sel_val);
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mux_sel_mask, mux_sel_val);
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}
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static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev,
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@ -240,16 +391,14 @@ static int tps6594_pmx_set_mux(struct pinctrl_dev *pctldev,
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{
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struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
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u8 muxval = pinctrl->funcs[function].muxval;
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unsigned int remap_cnt = pinctrl->remap_cnt;
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struct muxval_remap *remap = pinctrl->remap;
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/* Some pins don't have the same muxval for the same function... */
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if (group == 8) {
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if (muxval == TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION)
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muxval = TPS6594_PINCTRL_DISABLE_WDOG_FUNCTION_GPIO8;
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else if (muxval == TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION)
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muxval = TPS6594_PINCTRL_SYNCCLKOUT_FUNCTION_GPIO8;
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} else if (group == 9) {
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if (muxval == TPS6594_PINCTRL_CLK32KOUT_FUNCTION)
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muxval = TPS6594_PINCTRL_CLK32KOUT_FUNCTION_GPIO9;
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for (unsigned int i = 0; i < remap_cnt; i++) {
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if (group == remap[i].group && muxval == remap[i].muxval) {
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muxval = remap[i].remap;
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break;
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}
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}
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return tps6594_pmx_set(pinctrl, group, muxval);
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@ -276,7 +425,9 @@ static const struct pinmux_ops tps6594_pmx_ops = {
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static int tps6594_groups_cnt(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(tps6594_pins);
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struct tps6594_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctldev);
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return pinctrl->num_pins;
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}
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static int tps6594_group_pins(struct pinctrl_dev *pctldev,
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@ -318,33 +469,54 @@ static int tps6594_pinctrl_probe(struct platform_device *pdev)
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pctrl_desc = devm_kzalloc(dev, sizeof(*pctrl_desc), GFP_KERNEL);
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if (!pctrl_desc)
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return -ENOMEM;
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pctrl_desc->name = dev_name(dev);
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pctrl_desc->owner = THIS_MODULE;
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pctrl_desc->pins = tps6594_pins;
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pctrl_desc->npins = ARRAY_SIZE(tps6594_pins);
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pctrl_desc->pctlops = &tps6594_pctrl_ops;
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pctrl_desc->pmxops = &tps6594_pmx_ops;
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pinctrl = devm_kzalloc(dev, sizeof(*pinctrl), GFP_KERNEL);
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if (!pinctrl)
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return -ENOMEM;
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pinctrl->tps = dev_get_drvdata(dev->parent);
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pinctrl->funcs = pinctrl_functions;
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pinctrl->pins = tps6594_pins;
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pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl);
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if (IS_ERR(pinctrl->pctl_dev))
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return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev),
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"Couldn't register pinctrl driver\n");
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switch (tps->chip_id) {
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case TPS65224:
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pctrl_desc->pins = tps65224_pins;
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pctrl_desc->npins = ARRAY_SIZE(tps65224_pins);
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*pinctrl = tps65224_template_pinctrl;
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config.ngpio = ARRAY_SIZE(tps65224_gpio_func_group_names);
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config.ngpio_per_reg = TPS65224_NGPIO_PER_REG;
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break;
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case TPS6593:
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case TPS6594:
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pctrl_desc->pins = tps6594_pins;
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pctrl_desc->npins = ARRAY_SIZE(tps6594_pins);
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*pinctrl = tps6594_template_pinctrl;
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config.ngpio = ARRAY_SIZE(tps6594_gpio_func_group_names);
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config.ngpio_per_reg = TPS6594_NGPIO_PER_REG;
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break;
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default:
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break;
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}
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pinctrl->tps = tps;
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pctrl_desc->name = dev_name(dev);
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pctrl_desc->owner = THIS_MODULE;
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pctrl_desc->pctlops = &tps6594_pctrl_ops;
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||||
pctrl_desc->pmxops = &tps6594_pmx_ops;
|
||||
|
||||
config.parent = tps->dev;
|
||||
config.regmap = tps->regmap;
|
||||
config.ngpio = TPS6594_PINCTRL_PINS_NB;
|
||||
config.ngpio_per_reg = 8;
|
||||
config.reg_dat_base = TPS6594_REG_GPIO_IN_1;
|
||||
config.reg_set_base = TPS6594_REG_GPIO_OUT_1;
|
||||
config.reg_dir_out_base = TPS6594_REG_GPIOX_CONF(0);
|
||||
config.reg_mask_xlate = tps6594_gpio_regmap_xlate;
|
||||
|
||||
pinctrl->pctl_dev = devm_pinctrl_register(dev, pctrl_desc, pinctrl);
|
||||
if (IS_ERR(pinctrl->pctl_dev))
|
||||
return dev_err_probe(dev, PTR_ERR(pinctrl->pctl_dev),
|
||||
"Couldn't register pinctrl driver\n");
|
||||
|
||||
pinctrl->gpio_regmap = devm_gpio_regmap_register(dev, &config);
|
||||
if (IS_ERR(pinctrl->gpio_regmap))
|
||||
return dev_err_probe(dev, PTR_ERR(pinctrl->gpio_regmap),
|
||||
@ -369,5 +541,6 @@ static struct platform_driver tps6594_pinctrl_driver = {
|
||||
module_platform_driver(tps6594_pinctrl_driver);
|
||||
|
||||
MODULE_AUTHOR("Esteban Blanc <eblanc@baylibre.com>");
|
||||
MODULE_AUTHOR("Nirmala Devi Mal Nadar <m.nirmaladevi@ltts.com>");
|
||||
MODULE_DESCRIPTION("TPS6594 pinctrl and GPIO driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
Loading…
Reference in New Issue
Block a user