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powerpc/powernv: Machine check handler for POWER10
Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20200702233343.1128026-1-npiggin@gmail.com
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5a090f7c36
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201220bb0e
@ -86,6 +86,7 @@ enum MCE_TlbErrorType {
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enum MCE_UserErrorType {
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MCE_USER_ERROR_INDETERMINATE = 0,
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MCE_USER_ERROR_TLBIE = 1,
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MCE_USER_ERROR_SCV = 2,
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};
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enum MCE_RaErrorType {
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@ -66,6 +66,7 @@ struct dt_cpu_feature {
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extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
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extern long __machine_check_early_realmode_p9(struct pt_regs *regs);
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extern long __machine_check_early_realmode_p10(struct pt_regs *regs);
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static int hv_mode;
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@ -475,6 +476,14 @@ static int __init feat_enable_pmu_power10(struct dt_cpu_feature *f)
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return 1;
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}
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static int __init feat_enable_mce_power10(struct dt_cpu_feature *f)
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{
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cur_cpu_spec->platform = "power10";
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cur_cpu_spec->machine_check_early = __machine_check_early_realmode_p10;
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return 1;
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}
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static int __init feat_enable_tm(struct dt_cpu_feature *f)
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{
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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@ -663,6 +672,7 @@ static struct dt_cpu_feature_match __initdata
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{"group-start-register", feat_enable, 0},
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{"pc-relative-addressing", feat_enable, 0},
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{"machine-check-power9", feat_enable_mce_power9, 0},
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{"machine-check-power10", feat_enable_mce_power10, 0},
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{"performance-monitor-power9", feat_enable_pmu_power9, 0},
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{"performance-monitor-power10", feat_enable_pmu_power10, 0},
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{"event-based-branch-v3", feat_enable, 0},
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@ -385,6 +385,7 @@ void machine_check_print_event_info(struct machine_check_event *evt,
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static const char *mc_user_types[] = {
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"Indeterminate",
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"tlbie(l) invalid",
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"scv invalid",
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};
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static const char *mc_ra_types[] = {
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"Indeterminate",
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@ -243,6 +243,45 @@ static const struct mce_ierror_table mce_p9_ierror_table[] = {
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, 0, 0, 0, 0, 0, 0 } };
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static const struct mce_ierror_table mce_p10_ierror_table[] = {
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{ 0x00000000081c0000, 0x0000000000040000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000000080000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000000c0000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000100000, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000140000, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000180000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000001c0000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008080000, true,
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MCE_ERROR_TYPE_USER,MCE_USER_ERROR_SCV, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x00000000080c0000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008100000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008140000, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */
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{ 0x00000000081c0000, 0x00000000081c0000, true, MCE_ECLASS_HARDWARE,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, 0, 0, 0, 0, 0, 0 } };
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struct mce_derror_table {
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unsigned long dsisr_value;
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bool dar_valid; /* dar is a valid indicator of faulting address */
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@ -361,6 +400,46 @@ static const struct mce_derror_table mce_p9_derror_table[] = {
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, false, 0, 0, 0, 0, 0 } };
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static const struct mce_derror_table mce_p10_derror_table[] = {
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{ 0x00008000, false,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00004000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000800, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000400, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000200, false,
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MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000040, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000020, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000010, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000008, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, false, 0, 0, 0, 0, 0 } };
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static int mce_find_instr_ea_and_phys(struct pt_regs *regs, uint64_t *addr,
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uint64_t *phys_addr)
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{
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@ -657,3 +736,8 @@ long __machine_check_early_realmode_p9(struct pt_regs *regs)
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return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);
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}
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long __machine_check_early_realmode_p10(struct pt_regs *regs)
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{
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return mce_handle_error(regs, mce_p10_derror_table, mce_p10_ierror_table);
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}
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