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ARM: dts: sun4i: Add A10 SRAM and SRAM controller
The A10 has a few SRAM that can be mapped either to a device or to the CPU, with the mapping being controlled by a SRAM controller. Add the SRAM controller, the SRAM that it drives and the section that can be used by the various devices. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com>
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@ -108,6 +108,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -74,6 +74,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -102,6 +102,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -86,6 +86,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&ir0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ir0_rx_pins_a>;
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@ -104,6 +104,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -99,6 +99,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&emac {
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pinctrl-names = "default";
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pinctrl-0 = <&emac_pins_a>;
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@ -105,6 +105,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -119,6 +119,10 @@
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status = "okay";
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};
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&emac_sram {
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status = "okay";
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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@ -454,6 +454,42 @@
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#size-cells = <1>;
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ranges;
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sram-controller@01c00000 {
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compatible = "allwinner,sun4i-a10-sram-controller";
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reg = <0x01c00000 0x30>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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sram_a: sram@00000000 {
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compatible = "mmio-sram";
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reg = <0x00000000 0xc000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00000000 0xc000>;
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emac_sram: sram-section@8000 {
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compatible = "allwinner,sun4i-a10-sram-a3-a4";
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reg = <0x8000 0x4000>;
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status = "disabled";
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};
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};
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sram_d: sram@00010000 {
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compatible = "mmio-sram";
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reg = <0x00010000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x00010000 0x1000>;
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otg_sram: sram-section@0000 {
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compatible = "allwinner,sun4i-a10-sram-d";
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reg = <0x0000 0x1000>;
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status = "disabled";
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};
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};
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};
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dma: dma-controller@01c02000 {
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compatible = "allwinner,sun4i-a10-dma";
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reg = <0x01c02000 0x1000>;
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@ -495,6 +531,7 @@
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reg = <0x01c0b000 0x1000>;
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interrupts = <55>;
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clocks = <&ahb_gates 17>;
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allwinner,sram = <&emac_sram 1>;
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status = "disabled";
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};
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