ARM: dts: sun4i: Add A10 SRAM and SRAM controller

The A10 has a few SRAM that can be mapped either to a device or to the CPU,
with the mapping being controlled by a SRAM controller.

Add the SRAM controller, the SRAM that it drives and the section that can
be used by the various devices.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
This commit is contained in:
Maxime Ripard 2015-03-26 15:53:44 +01:00
parent 860c186c7d
commit 1fbc15175d
9 changed files with 69 additions and 0 deletions

View File

@ -108,6 +108,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -74,6 +74,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -102,6 +102,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -86,6 +86,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&ir0 {
pinctrl-names = "default";
pinctrl-0 = <&ir0_rx_pins_a>;

View File

@ -104,6 +104,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -99,6 +99,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;

View File

@ -105,6 +105,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -119,6 +119,10 @@
status = "okay";
};
&emac_sram {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;

View File

@ -454,6 +454,42 @@
#size-cells = <1>;
ranges;
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_a: sram@00000000 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00000000 0xc000>;
emac_sram: sram-section@8000 {
compatible = "allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
status = "disabled";
};
};
sram_d: sram@00010000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
otg_sram: sram-section@0000 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
};
};
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
@ -495,6 +531,7 @@
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ahb_gates 17>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};