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Merge branch 'icc-msm8996' into icc-next

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This series adds a driver for interconnects on MSM8996. This fixes some rare display underflows
and provides a slight heat reduction.

* icc-msm8996
  dt-bindings: interconnect: Combine SDM660 bindings into RPM schema
  interconnect: icc-rpm: Add support for bus power domain
  dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings
  interconnect: qcom: Add MSM8996 interconnect provider driver

Link: https://lore.kernel.org/r/20211021132329.234942-1-y.oudjana@protonmail.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Georgi Djakov 2021-12-06 19:53:06 +02:00
commit 1f41badaf6
9 changed files with 2571 additions and 193 deletions
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145
Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml
View File

@ -27,22 +27,37 @@ properties:
- qcom,msm8939-pcnoc
- qcom,msm8939-snoc
- qcom,msm8939-snoc-mm
- qcom,msm8996-a0noc
- qcom,msm8996-a1noc
- qcom,msm8996-a2noc
- qcom,msm8996-bimc
- qcom,msm8996-cnoc
- qcom,msm8996-mnoc
- qcom,msm8996-pnoc
- qcom,msm8996-snoc
- qcom,qcs404-bimc
- qcom,qcs404-pcnoc
- qcom,qcs404-snoc
- qcom,sdm660-a2noc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-mnoc
- qcom,sdm660-snoc
'#interconnect-cells':
const: 1
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
minItems: 2
maxItems: 7
clock-names:
minItems: 2
maxItems: 7
power-domains:
maxItems: 1
required:
- compatible
@ -53,6 +68,120 @@ required:
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8916-bimc
- qcom,msm8916-pcnoc
- qcom,msm8916-snoc
- qcom,msm8939-bimc
- qcom,msm8939-pcnoc
- qcom,msm8939-snoc
- qcom,msm8939-snoc-mm
- qcom,msm8996-a1noc
- qcom,msm8996-a2noc
- qcom,msm8996-bimc
- qcom,msm8996-cnoc
- qcom,msm8996-pnoc
- qcom,msm8996-snoc
- qcom,qcs404-bimc
- qcom,qcs404-pcnoc
- qcom,qcs404-snoc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-snoc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
clocks:
items:
- description: Bus Clock
- description: Bus A Clock
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-mnoc
- qcom,sdm660-mnoc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: iface
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: CPU-NoC High-performance Bus Clock.
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8996-a0noc
then:
properties:
clock-names:
items:
- const: aggre0_snoc_axi
- const: aggre0_cnoc_ahb
- const: aggre0_noc_mpu_cfg
clocks:
items:
- description: Aggregate0 System NoC AXI Clock.
- description: Aggregate0 Config NoC AHB Clock.
- description: Aggregate0 NoC MPU Clock.
required:
- power-domains
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-a2noc
then:
properties:
clock-names:
items:
- const: bus
- const: bus_a
- const: ipa
- const: ufs_axi
- const: aggre2_ufs_axi
- const: aggre2_usb3_axi
- const: cfg_noc_usb2_axi
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: IPA Clock.
- description: UFS AXI Clock.
- description: Aggregate2 UFS AXI Clock.
- description: Aggregate2 USB3 AXI Clock.
- description: Config NoC USB2 AXI Clock.
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>

185
Documentation/devicetree/bindings/interconnect/qcom,sdm660.yaml
View File

@ -1,185 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sdm660.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SDM660 Network-On-Chip interconnect
maintainers:
- AngeloGioacchino Del Regno <kholk11@gmail.com>
description: |
The Qualcomm SDM660 interconnect providers support adjusting the
bandwidth requirements between the various NoC fabrics.
properties:
reg:
maxItems: 1
compatible:
enum:
- qcom,sdm660-a2noc
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-mnoc
- qcom,sdm660-snoc
'#interconnect-cells':
const: 1
clocks:
minItems: 1
maxItems: 7
clock-names:
minItems: 1
maxItems: 7
required:
- compatible
- reg
- '#interconnect-cells'
- clock-names
- clocks
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-mnoc
then:
properties:
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: CPU-NoC High-performance Bus Clock.
clock-names:
items:
- const: bus
- const: bus_a
- const: iface
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-a2noc
then:
properties:
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
- description: IPA Clock.
- description: UFS AXI Clock.
- description: Aggregate2 UFS AXI Clock.
- description: Aggregate2 USB3 AXI Clock.
- description: Config NoC USB2 AXI Clock.
clock-names:
items:
- const: bus
- const: bus_a
- const: ipa
- const: ufs_axi
- const: aggre2_ufs_axi
- const: aggre2_usb3_axi
- const: cfg_noc_usb2_axi
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-bimc
- qcom,sdm660-cnoc
- qcom,sdm660-gnoc
- qcom,sdm660-snoc
then:
properties:
clocks:
items:
- description: Bus Clock.
- description: Bus A Clock.
clock-names:
items:
- const: bus
- const: bus_a
examples:
- |
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/qcom,mmcc-sdm660.h>
#include <dt-bindings/clock/qcom,gcc-sdm660.h>
bimc: interconnect@1008000 {
compatible = "qcom,sdm660-bimc";
reg = <0x01008000 0x78000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
<&rpmcc RPM_SMD_BIMC_A_CLK>;
};
cnoc: interconnect@1500000 {
compatible = "qcom,sdm660-cnoc";
reg = <0x01500000 0x10000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
<&rpmcc RPM_SMD_CNOC_A_CLK>;
};
snoc: interconnect@1626000 {
compatible = "qcom,sdm660-snoc";
reg = <0x01626000 0x7090>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
<&rpmcc RPM_SMD_SNOC_A_CLK>;
};
a2noc: interconnect@1704000 {
compatible = "qcom,sdm660-a2noc";
reg = <0x01704000 0xc100>;
#interconnect-cells = <1>;
clock-names = "bus",
"bus_a",
"ipa",
"ufs_axi",
"aggre2_ufs_axi",
"aggre2_usb3_axi",
"cfg_noc_usb2_axi";
clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>,
<&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>,
<&rpmcc RPM_SMD_IPA_CLK>,
<&gcc GCC_UFS_AXI_CLK>,
<&gcc GCC_AGGRE2_UFS_AXI_CLK>,
<&gcc GCC_AGGRE2_USB3_AXI_CLK>,
<&gcc GCC_CFG_NOC_USB2_AXI_CLK>;
};
mnoc: interconnect@1745000 {
compatible = "qcom,sdm660-mnoc";
reg = <0x01745000 0xa010>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a", "iface";
clocks = <&rpmcc RPM_SMD_MMSSNOC_AXI_CLK>,
<&rpmcc RPM_SMD_MMSSNOC_AXI_CLK_A>,
<&mmcc AHB_CLK_SRC>;
};
gnoc: interconnect@17900000 {
compatible = "qcom,sdm660-gnoc";
reg = <0x17900000 0xe000>;
#interconnect-cells = <1>;
clock-names = "bus", "bus_a";
clocks = <&xo_board>, <&xo_board>;
};

9
drivers/interconnect/qcom/Kconfig
View File

@ -35,6 +35,15 @@ config INTERCONNECT_QCOM_MSM8974
This is a driver for the Qualcomm Network-on-Chip on msm8974-based
platforms.
config INTERCONNECT_QCOM_MSM8996
tristate "Qualcomm MSM8996 interconnect driver"
depends on INTERCONNECT_QCOM
depends on QCOM_SMD_RPM
select INTERCONNECT_QCOM_SMD_RPM
help
This is a driver for the Qualcomm Network-on-Chip on msm8996-based
platforms.
config INTERCONNECT_QCOM_OSM_L3
tristate "Qualcomm OSM L3 interconnect driver"
depends on INTERCONNECT_QCOM || COMPILE_TEST

2
drivers/interconnect/qcom/Makefile
View File

@ -4,6 +4,7 @@ icc-bcm-voter-objs := bcm-voter.o
qnoc-msm8916-objs := msm8916.o
qnoc-msm8939-objs := msm8939.o
qnoc-msm8974-objs := msm8974.o
qnoc-msm8996-objs := msm8996.o
icc-osm-l3-objs := osm-l3.o
qnoc-qcs404-objs := qcs404.o
icc-rpmh-obj := icc-rpmh.o
@ -22,6 +23,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_BCM_VOTER) += icc-bcm-voter.o
obj-$(CONFIG_INTERCONNECT_QCOM_MSM8916) += qnoc-msm8916.o
obj-$(CONFIG_INTERCONNECT_QCOM_MSM8939) += qnoc-msm8939.o
obj-$(CONFIG_INTERCONNECT_QCOM_MSM8974) += qnoc-msm8974.o
obj-$(CONFIG_INTERCONNECT_QCOM_MSM8996) += qnoc-msm8996.o
obj-$(CONFIG_INTERCONNECT_QCOM_OSM_L3) += icc-osm-l3.o
obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o
obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o

7
drivers/interconnect/qcom/icc-rpm.c
View File

@ -11,6 +11,7 @@
#include <linux/of_device.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@ -341,6 +342,12 @@ int qnoc_probe(struct platform_device *pdev)
if (ret)
return ret;
if (desc->has_bus_pd) {
ret = dev_pm_domain_attach(dev, true);
if (ret)
return ret;
}
provider = &qp->provider;
INIT_LIST_HEAD(&provider->nodes);
provider->dev = dev;

1
drivers/interconnect/qcom/icc-rpm.h
View File

@ -77,6 +77,7 @@ struct qcom_icc_desc {
size_t num_nodes;
const char * const *clocks;
size_t num_clocks;
bool has_bus_pd;
bool is_bimc_node;
const struct regmap_config *regmap_cfg;
unsigned int qos_offset;

2103
drivers/interconnect/qcom/msm8996.c Normal file
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File diff suppressed because it is too large Load Diff

149
drivers/interconnect/qcom/msm8996.h Normal file
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@ -0,0 +1,149 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Qualcomm MSM8996 interconnect IDs
*
* Copyright (c) 2021 Yassine Oudjana <y.oudjana@protonmail.com>
*/
#ifndef __DRIVERS_INTERCONNECT_QCOM_MSM8996_H__
#define __DRIVERS_INTERCONNECT_QCOM_MSM8996_H__
#define MSM8996_MASTER_PCIE_0 1
#define MSM8996_MASTER_PCIE_1 2
#define MSM8996_MASTER_PCIE_2 3
#define MSM8996_MASTER_CNOC_A1NOC 4
#define MSM8996_MASTER_CRYPTO_CORE0 5
#define MSM8996_MASTER_PNOC_A1NOC 6
#define MSM8996_MASTER_USB3 7
#define MSM8996_MASTER_IPA 8
#define MSM8996_MASTER_UFS 9
#define MSM8996_MASTER_AMPSS_M0 10
#define MSM8996_MASTER_GRAPHICS_3D 11
#define MSM8996_MASTER_MNOC_BIMC 12
#define MSM8996_MASTER_SNOC_BIMC 13
#define MSM8996_MASTER_SNOC_CNOC 14
#define MSM8996_MASTER_QDSS_DAP 15
#define MSM8996_MASTER_CNOC_MNOC_MMSS_CFG 16
#define MSM8996_MASTER_CNOC_MNOC_CFG 17
#define MSM8996_MASTER_CPP 18
#define MSM8996_MASTER_JPEG 19
#define MSM8996_MASTER_MDP_PORT0 20
#define MSM8996_MASTER_MDP_PORT1 21
#define MSM8996_MASTER_ROTATOR 22
#define MSM8996_MASTER_VIDEO_P0 23
#define MSM8996_MASTER_VFE 24
#define MSM8996_MASTER_SNOC_VMEM 25
#define MSM8996_MASTER_VIDEO_P0_OCMEM 26
#define MSM8996_MASTER_SNOC_PNOC 27
#define MSM8996_MASTER_SDCC_1 28
#define MSM8996_MASTER_SDCC_2 29
#define MSM8996_MASTER_SDCC_4 30
#define MSM8996_MASTER_USB_HS 31
#define MSM8996_MASTER_BLSP_1 32
#define MSM8996_MASTER_BLSP_2 33
#define MSM8996_MASTER_TSIF 34
#define MSM8996_MASTER_HMSS 35
#define MSM8996_MASTER_QDSS_BAM 36
#define MSM8996_MASTER_SNOC_CFG 37
#define MSM8996_MASTER_BIMC_SNOC_0 38
#define MSM8996_MASTER_BIMC_SNOC_1 39
#define MSM8996_MASTER_A0NOC_SNOC 40
#define MSM8996_MASTER_A1NOC_SNOC 41
#define MSM8996_MASTER_A2NOC_SNOC 42
#define MSM8996_MASTER_QDSS_ETR 43
#define MSM8996_SLAVE_A0NOC_SNOC 44
#define MSM8996_SLAVE_A1NOC_SNOC 45
#define MSM8996_SLAVE_A2NOC_SNOC 46
#define MSM8996_SLAVE_EBI_CH0 47
#define MSM8996_SLAVE_HMSS_L3 48
#define MSM8996_SLAVE_BIMC_SNOC_0 49
#define MSM8996_SLAVE_BIMC_SNOC_1 50
#define MSM8996_SLAVE_CNOC_A1NOC 51
#define MSM8996_SLAVE_CLK_CTL 52
#define MSM8996_SLAVE_TCSR 53
#define MSM8996_SLAVE_TLMM 54
#define MSM8996_SLAVE_CRYPTO_0_CFG 55
#define MSM8996_SLAVE_MPM 56
#define MSM8996_SLAVE_PIMEM_CFG 57
#define MSM8996_SLAVE_IMEM_CFG 58
#define MSM8996_SLAVE_MESSAGE_RAM 59
#define MSM8996_SLAVE_BIMC_CFG 60
#define MSM8996_SLAVE_PMIC_ARB 61
#define MSM8996_SLAVE_PRNG 62
#define MSM8996_SLAVE_DCC_CFG 63
#define MSM8996_SLAVE_RBCPR_MX 64
#define MSM8996_SLAVE_QDSS_CFG 65
#define MSM8996_SLAVE_RBCPR_CX 66
#define MSM8996_SLAVE_QDSS_RBCPR_APU_CFG 67
#define MSM8996_SLAVE_CNOC_MNOC_CFG 68
#define MSM8996_SLAVE_SNOC_CFG 69
#define MSM8996_SLAVE_SNOC_MPU_CFG 70
#define MSM8996_SLAVE_EBI1_PHY_CFG 71
#define MSM8996_SLAVE_A0NOC_CFG 72
#define MSM8996_SLAVE_PCIE_1_CFG 73
#define MSM8996_SLAVE_PCIE_2_CFG 74
#define MSM8996_SLAVE_PCIE_0_CFG 75
#define MSM8996_SLAVE_PCIE20_AHB2PHY 76
#define MSM8996_SLAVE_A0NOC_MPU_CFG 77
#define MSM8996_SLAVE_UFS_CFG 78
#define MSM8996_SLAVE_A1NOC_CFG 79
#define MSM8996_SLAVE_A1NOC_MPU_CFG 80
#define MSM8996_SLAVE_A2NOC_CFG 81
#define MSM8996_SLAVE_A2NOC_MPU_CFG 82
#define MSM8996_SLAVE_SSC_CFG 83
#define MSM8996_SLAVE_A0NOC_SMMU_CFG 84
#define MSM8996_SLAVE_A1NOC_SMMU_CFG 85
#define MSM8996_SLAVE_A2NOC_SMMU_CFG 86
#define MSM8996_SLAVE_LPASS_SMMU_CFG 87
#define MSM8996_SLAVE_CNOC_MNOC_MMSS_CFG 88
#define MSM8996_SLAVE_MMAGIC_CFG 89
#define MSM8996_SLAVE_CPR_CFG 90
#define MSM8996_SLAVE_MISC_CFG 91
#define MSM8996_SLAVE_VENUS_THROTTLE_CFG 92
#define MSM8996_SLAVE_VENUS_CFG 93
#define MSM8996_SLAVE_VMEM_CFG 94
#define MSM8996_SLAVE_DSA_CFG 95
#define MSM8996_SLAVE_MMSS_CLK_CFG 96
#define MSM8996_SLAVE_DSA_MPU_CFG 97
#define MSM8996_SLAVE_MNOC_MPU_CFG 98
#define MSM8996_SLAVE_DISPLAY_CFG 99
#define MSM8996_SLAVE_DISPLAY_THROTTLE_CFG 100
#define MSM8996_SLAVE_CAMERA_CFG 101
#define MSM8996_SLAVE_CAMERA_THROTTLE_CFG 102
#define MSM8996_SLAVE_GRAPHICS_3D_CFG 103
#define MSM8996_SLAVE_SMMU_MDP_CFG 104
#define MSM8996_SLAVE_SMMU_ROTATOR_CFG 105
#define MSM8996_SLAVE_SMMU_VENUS_CFG 106
#define MSM8996_SLAVE_SMMU_CPP_CFG 107
#define MSM8996_SLAVE_SMMU_JPEG_CFG 108
#define MSM8996_SLAVE_SMMU_VFE_CFG 109
#define MSM8996_SLAVE_MNOC_BIMC 110
#define MSM8996_SLAVE_VMEM 111
#define MSM8996_SLAVE_SERVICE_MNOC 112
#define MSM8996_SLAVE_PNOC_A1NOC 113
#define MSM8996_SLAVE_USB_HS 114
#define MSM8996_SLAVE_SDCC_2 115
#define MSM8996_SLAVE_SDCC_4 116
#define MSM8996_SLAVE_TSIF 117
#define MSM8996_SLAVE_BLSP_2 118
#define MSM8996_SLAVE_SDCC_1 119
#define MSM8996_SLAVE_BLSP_1 120
#define MSM8996_SLAVE_PDM 121
#define MSM8996_SLAVE_AHB2PHY 122
#define MSM8996_SLAVE_APPSS 123
#define MSM8996_SLAVE_LPASS 124
#define MSM8996_SLAVE_USB3 125
#define MSM8996_SLAVE_SNOC_BIMC 126
#define MSM8996_SLAVE_SNOC_CNOC 127
#define MSM8996_SLAVE_OCIMEM 128
#define MSM8996_SLAVE_PIMEM 129
#define MSM8996_SLAVE_SNOC_VMEM 130
#define MSM8996_SLAVE_SNOC_PNOC 131
#define MSM8996_SLAVE_QDSS_STM 132
#define MSM8996_SLAVE_PCIE_0 133
#define MSM8996_SLAVE_PCIE_1 134
#define MSM8996_SLAVE_PCIE_2 135
#define MSM8996_SLAVE_SERVICE_SNOC 136
#endif /* __DRIVERS_INTERCONNECT_QCOM_MSM8996_H__ */

163
include/dt-bindings/interconnect/qcom,msm8996.h Normal file
View File

@ -0,0 +1,163 @@
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
/*
* Qualcomm MSM8996 interconnect IDs
*
* Copyright (c) 2021 Yassine Oudjana <y.oudjana@protonmail.com>
*/
#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_MSM8996_H
/* A0NOC */
#define MASTER_PCIE_0 0
#define MASTER_PCIE_1 1
#define MASTER_PCIE_2 2
/* A1NOC */
#define MASTER_CNOC_A1NOC 0
#define MASTER_CRYPTO_CORE0 1
#define MASTER_PNOC_A1NOC 2
/* A2NOC */
#define MASTER_USB3 0
#define MASTER_IPA 1
#define MASTER_UFS 2
/* BIMC */
#define MASTER_AMPSS_M0 0
#define MASTER_GRAPHICS_3D 1
#define MASTER_MNOC_BIMC 2
#define MASTER_SNOC_BIMC 3
#define SLAVE_EBI_CH0 4
#define SLAVE_HMSS_L3 5
#define SLAVE_BIMC_SNOC_0 6
#define SLAVE_BIMC_SNOC_1 7
/* CNOC */
#define MASTER_SNOC_CNOC 0
#define MASTER_QDSS_DAP 1
#define SLAVE_CNOC_A1NOC 2
#define SLAVE_CLK_CTL 3
#define SLAVE_TCSR 4
#define SLAVE_TLMM 5
#define SLAVE_CRYPTO_0_CFG 6
#define SLAVE_MPM 7
#define SLAVE_PIMEM_CFG 8
#define SLAVE_IMEM_CFG 9
#define SLAVE_MESSAGE_RAM 10
#define SLAVE_BIMC_CFG 11
#define SLAVE_PMIC_ARB 12
#define SLAVE_PRNG 13
#define SLAVE_DCC_CFG 14
#define SLAVE_RBCPR_MX 15
#define SLAVE_QDSS_CFG 16
#define SLAVE_RBCPR_CX 17
#define SLAVE_QDSS_RBCPR_APU 18
#define SLAVE_CNOC_MNOC_CFG 19
#define SLAVE_SNOC_CFG 20
#define SLAVE_SNOC_MPU_CFG 21
#define SLAVE_EBI1_PHY_CFG 22
#define SLAVE_A0NOC_CFG 23
#define SLAVE_PCIE_1_CFG 24
#define SLAVE_PCIE_2_CFG 25
#define SLAVE_PCIE_0_CFG 26
#define SLAVE_PCIE20_AHB2PHY 27
#define SLAVE_A0NOC_MPU_CFG 28
#define SLAVE_UFS_CFG 29
#define SLAVE_A1NOC_CFG 30
#define SLAVE_A1NOC_MPU_CFG 31
#define SLAVE_A2NOC_CFG 32
#define SLAVE_A2NOC_MPU_CFG 33
#define SLAVE_SSC_CFG 34
#define SLAVE_A0NOC_SMMU_CFG 35
#define SLAVE_A1NOC_SMMU_CFG 36
#define SLAVE_A2NOC_SMMU_CFG 37
#define SLAVE_LPASS_SMMU_CFG 38
#define SLAVE_CNOC_MNOC_MMSS_CFG 39
/* MNOC */
#define MASTER_CNOC_MNOC_CFG 0
#define MASTER_CPP 1
#define MASTER_JPEG 2
#define MASTER_MDP_PORT0 3
#define MASTER_MDP_PORT1 4
#define MASTER_ROTATOR 5
#define MASTER_VIDEO_P0 6
#define MASTER_VFE 7
#define MASTER_SNOC_VMEM 8
#define MASTER_VIDEO_P0_OCMEM 9
#define MASTER_CNOC_MNOC_MMSS_CFG 10
#define SLAVE_MNOC_BIMC 11
#define SLAVE_VMEM 12
#define SLAVE_SERVICE_MNOC 13
#define SLAVE_MMAGIC_CFG 14
#define SLAVE_CPR_CFG 15
#define SLAVE_MISC_CFG 16
#define SLAVE_VENUS_THROTTLE_CFG 17
#define SLAVE_VENUS_CFG 18
#define SLAVE_VMEM_CFG 19
#define SLAVE_DSA_CFG 20
#define SLAVE_MMSS_CLK_CFG 21
#define SLAVE_DSA_MPU_CFG 22
#define SLAVE_MNOC_MPU_CFG 23
#define SLAVE_DISPLAY_CFG 24
#define SLAVE_DISPLAY_THROTTLE_CFG 25
#define SLAVE_CAMERA_CFG 26
#define SLAVE_CAMERA_THROTTLE_CFG 27
#define SLAVE_GRAPHICS_3D_CFG 28
#define SLAVE_SMMU_MDP_CFG 29
#define SLAVE_SMMU_ROT_CFG 30
#define SLAVE_SMMU_VENUS_CFG 31
#define SLAVE_SMMU_CPP_CFG 32
#define SLAVE_SMMU_JPEG_CFG 33
#define SLAVE_SMMU_VFE_CFG 34
/* PNOC */
#define MASTER_SNOC_PNOC 0
#define MASTER_SDCC_1 1
#define MASTER_SDCC_2 2
#define MASTER_SDCC_4 3
#define MASTER_USB_HS 4
#define MASTER_BLSP_1 5
#define MASTER_BLSP_2 6
#define MASTER_TSIF 7
#define SLAVE_PNOC_A1NOC 8
#define SLAVE_USB_HS 9
#define SLAVE_SDCC_2 10
#define SLAVE_SDCC_4 11
#define SLAVE_TSIF 12
#define SLAVE_BLSP_2 13
#define SLAVE_SDCC_1 14
#define SLAVE_BLSP_1 15
#define SLAVE_PDM 16
#define SLAVE_AHB2PHY 17
/* SNOC */
#define MASTER_HMSS 0
#define MASTER_QDSS_BAM 1
#define MASTER_SNOC_CFG 2
#define MASTER_BIMC_SNOC_0 3
#define MASTER_BIMC_SNOC_1 4
#define MASTER_A0NOC_SNOC 5
#define MASTER_A1NOC_SNOC 6
#define MASTER_A2NOC_SNOC 7
#define MASTER_QDSS_ETR 8
#define SLAVE_A0NOC_SNOC 9
#define SLAVE_A1NOC_SNOC 10
#define SLAVE_A2NOC_SNOC 11
#define SLAVE_HMSS 12
#define SLAVE_LPASS 13
#define SLAVE_USB3 14
#define SLAVE_SNOC_BIMC 15
#define SLAVE_SNOC_CNOC 16
#define SLAVE_IMEM 17
#define SLAVE_PIMEM 18
#define SLAVE_SNOC_VMEM 19
#define SLAVE_SNOC_PNOC 20
#define SLAVE_QDSS_STM 21
#define SLAVE_PCIE_0 22
#define SLAVE_PCIE_1 23
#define SLAVE_PCIE_2 24
#define SLAVE_SERVICE_SNOC 25
#endif