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mmc: omap_hsmmc: fix timeout for cmd and data soft reset
With HSMMC_HAS_UPDATED_RESET reset of cmd/data (SRC/SRD) can be to quick and can be missed resulting in wait for software timeout. With cpu_relax timeout can be long and unpredictable. Use udelay instead for timeout implementation. Reported-by: Yuzheng Ma <mayuzheng@kedacom.com> Tested-by: Yuzheng Ma <mayuzheng@kedacom.com> Reviewed-by: Hein Tibosch <hein_tibosch@yahoo.es> Signed-off-by: Jianpeng Ma <majianpeng@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -119,7 +119,8 @@
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BRR_EN | BWR_EN | TC_EN | CC_EN)
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#define MMC_AUTOSUSPEND_DELAY 100
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#define MMC_TIMEOUT_MS 20
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#define MMC_TIMEOUT_MS 20 /* 20 mSec */
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#define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */
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#define OMAP_MMC_MIN_CLOCK 400000
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#define OMAP_MMC_MAX_CLOCK 52000000
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#define DRIVER_NAME "omap_hsmmc"
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@ -967,8 +968,7 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
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unsigned long bit)
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{
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unsigned long i = 0;
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unsigned long limit = (loops_per_jiffy *
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msecs_to_jiffies(MMC_TIMEOUT_MS));
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unsigned long limit = MMC_TIMEOUT_US;
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OMAP_HSMMC_WRITE(host->base, SYSCTL,
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OMAP_HSMMC_READ(host->base, SYSCTL) | bit);
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@ -980,13 +980,13 @@ static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host,
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if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) {
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while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit))
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&& (i++ < limit))
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cpu_relax();
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udelay(1);
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}
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i = 0;
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while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) &&
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(i++ < limit))
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cpu_relax();
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udelay(1);
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if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit)
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dev_err(mmc_dev(host->mmc),
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