drm/msm: Add a common function to free kernel buffer objects

Buffer objects allocated with msm_gem_kernel_new() are mostly
freed the same way so we can save a few lines of code with a
common function.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Jordan Crouse 2018-11-07 15:35:46 -07:00 committed by Rob Clark
parent d6852b4b2d
commit 1e29dff004
7 changed files with 26 additions and 50 deletions

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@ -1220,15 +1220,6 @@ static int a5xx_crashdumper_init(struct msm_gpu *gpu,
return PTR_ERR_OR_ZERO(dumper->ptr); return PTR_ERR_OR_ZERO(dumper->ptr);
} }
static void a5xx_crashdumper_free(struct msm_gpu *gpu,
struct a5xx_crashdumper *dumper)
{
msm_gem_put_iova(dumper->bo, gpu->aspace);
msm_gem_put_vaddr(dumper->bo);
drm_gem_object_put(dumper->bo);
}
static int a5xx_crashdumper_run(struct msm_gpu *gpu, static int a5xx_crashdumper_run(struct msm_gpu *gpu,
struct a5xx_crashdumper *dumper) struct a5xx_crashdumper *dumper)
{ {
@ -1321,7 +1312,7 @@ static void a5xx_gpu_state_get_hlsq_regs(struct msm_gpu *gpu,
if (a5xx_crashdumper_run(gpu, &dumper)) { if (a5xx_crashdumper_run(gpu, &dumper)) {
kfree(a5xx_state->hlsqregs); kfree(a5xx_state->hlsqregs);
a5xx_crashdumper_free(gpu, &dumper); msm_gem_kernel_put(dumper.bo, gpu->aspace, true);
return; return;
} }
@ -1329,7 +1320,7 @@ static void a5xx_gpu_state_get_hlsq_regs(struct msm_gpu *gpu,
memcpy(a5xx_state->hlsqregs, dumper.ptr + (256 * SZ_1K), memcpy(a5xx_state->hlsqregs, dumper.ptr + (256 * SZ_1K),
count * sizeof(u32)); count * sizeof(u32));
a5xx_crashdumper_free(gpu, &dumper); msm_gem_kernel_put(dumper.bo, gpu->aspace, true);
} }
static struct msm_gpu_state *a5xx_gpu_state_get(struct msm_gpu *gpu) static struct msm_gpu_state *a5xx_gpu_state_get(struct msm_gpu *gpu)

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@ -298,7 +298,7 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace, MSM_BO_UNCACHED | MSM_BO_GPU_READONLY, gpu->aspace,
&a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova); &a5xx_gpu->gpmu_bo, &a5xx_gpu->gpmu_iova);
if (IS_ERR(ptr)) if (IS_ERR(ptr))
goto err; return;
while (cmds_size > 0) { while (cmds_size > 0) {
int i; int i;
@ -317,15 +317,4 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
msm_gem_put_vaddr(a5xx_gpu->gpmu_bo); msm_gem_put_vaddr(a5xx_gpu->gpmu_bo);
a5xx_gpu->gpmu_dwords = dwords; a5xx_gpu->gpmu_dwords = dwords;
return;
err:
if (a5xx_gpu->gpmu_iova)
msm_gem_put_iova(a5xx_gpu->gpmu_bo, gpu->aspace);
if (a5xx_gpu->gpmu_bo)
drm_gem_object_put(a5xx_gpu->gpmu_bo);
a5xx_gpu->gpmu_bo = NULL;
a5xx_gpu->gpmu_iova = 0;
a5xx_gpu->gpmu_dwords = 0;
} }

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@ -267,18 +267,8 @@ void a5xx_preempt_fini(struct msm_gpu *gpu)
struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu);
int i; int i;
for (i = 0; i < gpu->nr_rings; i++) { for (i = 0; i < gpu->nr_rings; i++)
if (!a5xx_gpu->preempt_bo[i]) msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace, true);
continue;
msm_gem_put_vaddr(a5xx_gpu->preempt_bo[i]);
if (a5xx_gpu->preempt_iova[i])
msm_gem_put_iova(a5xx_gpu->preempt_bo[i], gpu->aspace);
drm_gem_object_put(a5xx_gpu->preempt_bo[i]);
a5xx_gpu->preempt_bo[i] = NULL;
}
} }
void a5xx_preempt_init(struct msm_gpu *gpu) void a5xx_preempt_init(struct msm_gpu *gpu)

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@ -312,6 +312,8 @@ void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size, void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
uint32_t flags, struct msm_gem_address_space *aspace, uint32_t flags, struct msm_gem_address_space *aspace,
struct drm_gem_object **bo, uint64_t *iova); struct drm_gem_object **bo, uint64_t *iova);
void msm_gem_kernel_put(struct drm_gem_object *bo,
struct msm_gem_address_space *aspace, bool locked);
struct drm_gem_object *msm_gem_import(struct drm_device *dev, struct drm_gem_object *msm_gem_import(struct drm_device *dev,
struct dma_buf *dmabuf, struct sg_table *sgt); struct dma_buf *dmabuf, struct sg_table *sgt);

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@ -1079,3 +1079,18 @@ void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
{ {
return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, true); return _msm_gem_kernel_new(dev, size, flags, aspace, bo, iova, true);
} }
void msm_gem_kernel_put(struct drm_gem_object *bo,
struct msm_gem_address_space *aspace, bool locked)
{
if (IS_ERR_OR_NULL(bo))
return;
msm_gem_put_vaddr(bo);
msm_gem_put_iova(bo, aspace);
if (locked)
drm_gem_object_put(bo);
else
drm_gem_object_put_unlocked(bo);
}

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@ -981,11 +981,7 @@ fail:
gpu->rb[i] = NULL; gpu->rb[i] = NULL;
} }
if (gpu->memptrs_bo) { msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace, false);
msm_gem_put_vaddr(gpu->memptrs_bo);
msm_gem_put_iova(gpu->memptrs_bo, gpu->aspace);
drm_gem_object_put_unlocked(gpu->memptrs_bo);
}
platform_set_drvdata(pdev, NULL); platform_set_drvdata(pdev, NULL);
return ret; return ret;
@ -1004,11 +1000,7 @@ void msm_gpu_cleanup(struct msm_gpu *gpu)
gpu->rb[i] = NULL; gpu->rb[i] = NULL;
} }
if (gpu->memptrs_bo) { msm_gem_kernel_put(gpu->memptrs_bo, gpu->aspace, false);
msm_gem_put_vaddr(gpu->memptrs_bo);
msm_gem_put_iova(gpu->memptrs_bo, gpu->aspace);
drm_gem_object_put_unlocked(gpu->memptrs_bo);
}
if (!IS_ERR_OR_NULL(gpu->aspace)) { if (!IS_ERR_OR_NULL(gpu->aspace)) {
gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu, gpu->aspace->mmu->funcs->detach(gpu->aspace->mmu,

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@ -73,10 +73,7 @@ void msm_ringbuffer_destroy(struct msm_ringbuffer *ring)
msm_fence_context_free(ring->fctx); msm_fence_context_free(ring->fctx);
if (ring->bo) { msm_gem_kernel_put(ring->bo, ring->gpu->aspace, false);
msm_gem_put_iova(ring->bo, ring->gpu->aspace);
msm_gem_put_vaddr(ring->bo);
drm_gem_object_put_unlocked(ring->bo);
}
kfree(ring); kfree(ring);
} }