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OpenRISC updates for 5.4
Few small things for 5.4: - Fixup ethoc ethernet device tree descriptors which were previously broken, now ethernet works on FPGAs running OpenRISC! - Switch ioremap to use uncached semantics - from Christoph Hellwig -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE2cRzVK74bBA6Je/xw7McLV5mJ+QFAl2AAJUACgkQw7McLV5m J+R/eA//c6MbD18UZLlX7Q4khBc+1bMEwhRWPa7nnAV28Fy+0dAoa/2BUJU4KmEn +zeBvl0kUqPtAA1/jqGNRU32kz0DrT8A2Mos2VgHW5nhr5Uo99FPSF+GFNkIogAw U1KBviJs5R/Ujpp49adU4nDz8sOmZoNgs/J4AWBe8SPFtRQTCcYgjwxKz1P/Rx30 uTc3EUpcxZQZATEzl+fih4F9DGJ03B+TcP7yg+NFiW8zXsHVtRU0/sf72YPTRkJZ rb34FCJwgpR2I3qxwk6fpSZQFP+EAaWAlkGfiFCur95r//x7fNItQ4CY1lqiOyYI aCznCwHLXVyTk83Wk0usgtoPwpVLiv/84OkO7FZiwZ6g5ewgjB/ELTMht14d38NC 7GFzHg04Zq7z1twJ9o0MhDx/Ycj2i/zqKU0xl+aLAjGhiQkcNFOO8e0QfZGefaxc 9DDrMcKH4XUbFDs5UJiMgZo+NjcrOcbkiUCiFj4TAWL/n+Tz/wYIMJkqDyDQYBzy vh2DkDFqmm4bFyOQdYBiFa1aors93JvfkNet9yYMwpjWJRZozBaHBAuQOkal2mo/ 9kXQnmHg0UxS/T7bwCNvfTfdIkyVAa3VJ/YHJNTg3dMhZpP73lEbzhveTilm6JE2 13D4K6ln8+2S/JzyGnA96yYSrVJfsOFSuRn5gOgqCWXAXu8sNUY= =9DBC -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://github.com/openrisc/linux Pull OpenRISC updates from Stafford Horne: "Few small things for 5.4: - Fixup ethoc ethernet device tree descriptors which were previously broken, now ethernet works on FPGAs running OpenRISC! - Switch ioremap to use uncached semantics - from Christoph Hellwig" * tag 'for-linus' of git://github.com/openrisc/linux: openrisc: map as uncached in ioremap or1k: dts: Add ethoc device to SMP devicetree or1k: dts: Fix ethoc network configuration in or1ksim devicetree
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commit
1e24aaabde
@ -49,8 +49,9 @@
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};
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enet0: ethoc@92000000 {
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compatible = "opencores,ethmac-rtlsvn338";
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reg = <0x92000000 0x100>;
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compatible = "opencores,ethoc";
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reg = <0x92000000 0x800>;
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interrupts = <4>;
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big-endian;
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};
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};
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@ -60,4 +60,10 @@
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clock-frequency = <20000000>;
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};
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enet0: ethoc@92000000 {
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compatible = "opencores,ethoc";
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reg = <0x92000000 0x800>;
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interrupts = <4>;
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big-endian;
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};
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};
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@ -25,25 +25,11 @@
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#define PIO_OFFSET 0
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#define PIO_MASK 0
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#define ioremap_nocache ioremap_nocache
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#define ioremap_nocache ioremap
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#include <asm-generic/io.h>
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#include <asm/pgtable.h>
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extern void __iomem *__ioremap(phys_addr_t offset, unsigned long size,
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pgprot_t prot);
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static inline void __iomem *ioremap(phys_addr_t offset, size_t size)
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{
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return __ioremap(offset, size, PAGE_KERNEL);
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}
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/* #define _PAGE_CI 0x002 */
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static inline void __iomem *ioremap_nocache(phys_addr_t offset,
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unsigned long size)
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{
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return __ioremap(offset, size,
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__pgprot(pgprot_val(PAGE_KERNEL) | _PAGE_CI));
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}
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void __iomem *ioremap(phys_addr_t offset, unsigned long size);
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extern void iounmap(void *addr);
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#endif
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@ -97,7 +97,7 @@ extern void paging_init(void);
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/* Define some higher level generic page attributes.
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*
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* If you change _PAGE_CI definition be sure to change it in
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* io.h for ioremap_nocache() too.
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* io.h for ioremap() too.
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*/
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/*
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@ -34,8 +34,7 @@ static unsigned int fixmaps_used __initdata;
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* have to convert them into an offset in a page-aligned mapping, but the
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* caller shouldn't need to know that small detail.
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*/
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void __iomem *__ref
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__ioremap(phys_addr_t addr, unsigned long size, pgprot_t prot)
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void __iomem *__ref ioremap(phys_addr_t addr, unsigned long size)
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{
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phys_addr_t p;
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unsigned long v;
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@ -66,7 +65,8 @@ __ioremap(phys_addr_t addr, unsigned long size, pgprot_t prot)
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fixmaps_used += (size >> PAGE_SHIFT);
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}
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if (ioremap_page_range(v, v + size, p, prot)) {
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if (ioremap_page_range(v, v + size, p,
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__pgprot(pgprot_val(PAGE_KERNEL) | _PAGE_CI))) {
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if (likely(mem_init_done))
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vfree(area->addr);
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else
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@ -76,7 +76,7 @@ __ioremap(phys_addr_t addr, unsigned long size, pgprot_t prot)
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return (void __iomem *)(offset + (char *)v);
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}
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EXPORT_SYMBOL(__ioremap);
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EXPORT_SYMBOL(ioremap);
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void iounmap(void *addr)
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{
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