Input: ads7846 - make transfer buffers DMA safe

req.sample needs its own cacheline otherwise accessing req.msg fetches
it in again.

Note: This effect doesn't occur if the underlying SPI driver doesn't use
DMA at all.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Jonathan Cameron <jic23@cam.ac.uk>
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
This commit is contained in:
Alexander Stein 2011-05-05 08:40:14 -07:00 committed by Dmitry Torokhov
parent bf283707d5
commit 1dbe7dada2

View File

@ -281,17 +281,25 @@ struct ser_req {
u8 command;
u8 ref_off;
u16 scratch;
__be16 sample;
struct spi_message msg;
struct spi_transfer xfer[6];
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
*/
__be16 sample ____cacheline_aligned;
};
struct ads7845_ser_req {
u8 command[3];
u8 pwrdown[3];
u8 sample[3];
struct spi_message msg;
struct spi_transfer xfer[2];
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
*/
u8 sample[3] ____cacheline_aligned;
};
static int ads7846_read12_ser(struct device *dev, unsigned command)