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ASoC: dwc: support dw i2s in slave mode
dw i2s controller can work in slave mode, codec being master. dw i2s is made to support master/slave operation, by reading dwc register. Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -38,6 +38,8 @@ struct i2s_clk_config_data {
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struct i2s_platform_data {
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#define DWC_I2S_PLAY (1 << 0)
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#define DWC_I2S_RECORD (1 << 1)
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#define DW_I2S_SLAVE (1 << 2)
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#define DW_I2S_MASTER (1 << 3)
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unsigned int cap;
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int channel;
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u32 snd_fmts;
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@ -273,23 +273,25 @@ static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
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config->sample_rate = params_rate(params);
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if (dev->i2s_clk_cfg) {
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ret = dev->i2s_clk_cfg(config);
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if (ret < 0) {
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dev_err(dev->dev, "runtime audio clk config fail\n");
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return ret;
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}
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} else {
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u32 bitclk = config->sample_rate * config->data_width * 2;
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if (dev->capability & DW_I2S_MASTER) {
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if (dev->i2s_clk_cfg) {
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ret = dev->i2s_clk_cfg(config);
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if (ret < 0) {
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dev_err(dev->dev, "runtime audio clk config fail\n");
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return ret;
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}
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} else {
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u32 bitclk = config->sample_rate *
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config->data_width * 2;
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ret = clk_set_rate(dev->clk, bitclk);
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if (ret) {
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dev_err(dev->dev, "Can't set I2S clock rate: %d\n",
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ret);
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return ret;
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ret = clk_set_rate(dev->clk, bitclk);
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if (ret) {
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dev_err(dev->dev, "Can't set I2S clock rate: %d\n",
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ret);
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return ret;
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}
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}
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}
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return 0;
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}
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@ -357,7 +359,8 @@ static int dw_i2s_suspend(struct snd_soc_dai *dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
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clk_disable(dev->clk);
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if (dev->capability & DW_I2S_MASTER)
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clk_disable(dev->clk);
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return 0;
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}
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@ -365,7 +368,8 @@ static int dw_i2s_resume(struct snd_soc_dai *dai)
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{
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struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
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clk_enable(dev->clk);
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if (dev->capability & DW_I2S_MASTER)
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clk_enable(dev->clk);
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return 0;
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}
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@ -443,6 +447,14 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
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dw_i2s_dai->capture.rates = rates;
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}
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if (COMP1_MODE_EN(comp1)) {
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dev_dbg(dev->dev, "designware: i2s master mode supported\n");
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dev->capability |= DW_I2S_MASTER;
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} else {
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dev_dbg(dev->dev, "designware: i2s slave mode supported\n");
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dev->capability |= DW_I2S_SLAVE;
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}
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return 0;
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}
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@ -529,6 +541,7 @@ static int dw_i2s_probe(struct platform_device *pdev)
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struct resource *res;
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int ret;
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struct snd_soc_dai_driver *dw_i2s_dai;
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const char *clk_id;
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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@ -550,33 +563,36 @@ static int dw_i2s_probe(struct platform_device *pdev)
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return PTR_ERR(dev->i2s_base);
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dev->dev = &pdev->dev;
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if (pdata) {
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ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
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if (ret < 0)
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return ret;
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dev->capability = pdata->cap;
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dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
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if (!dev->i2s_clk_cfg) {
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dev_err(&pdev->dev, "no clock configure method\n");
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return -ENODEV;
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}
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dev->clk = devm_clk_get(&pdev->dev, NULL);
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clk_id = NULL;
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ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
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} else {
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clk_id = "i2sclk";
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ret = dw_configure_dai_by_dt(dev, dw_i2s_dai, res);
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if (ret < 0)
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return ret;
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dev->clk = devm_clk_get(&pdev->dev, "i2sclk");
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}
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret < 0)
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return ret;
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if (dev->capability & DW_I2S_MASTER) {
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if (pdata) {
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dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
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if (!dev->i2s_clk_cfg) {
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dev_err(&pdev->dev, "no clock configure method\n");
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return -ENODEV;
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}
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}
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dev->clk = devm_clk_get(&pdev->dev, clk_id);
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if (IS_ERR(dev->clk))
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return PTR_ERR(dev->clk);
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ret = clk_prepare_enable(dev->clk);
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if (ret < 0)
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return ret;
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}
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dev_set_drvdata(&pdev->dev, dev);
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ret = devm_snd_soc_register_component(&pdev->dev, &dw_i2s_component,
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dw_i2s_dai, 1);
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@ -597,7 +613,8 @@ static int dw_i2s_probe(struct platform_device *pdev)
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return 0;
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err_clk_disable:
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clk_disable_unprepare(dev->clk);
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if (dev->capability & DW_I2S_MASTER)
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clk_disable_unprepare(dev->clk);
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return ret;
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}
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@ -605,7 +622,8 @@ static int dw_i2s_remove(struct platform_device *pdev)
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{
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struct dw_i2s_dev *dev = dev_get_drvdata(&pdev->dev);
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clk_disable_unprepare(dev->clk);
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if (dev->capability & DW_I2S_MASTER)
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clk_disable_unprepare(dev->clk);
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return 0;
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}
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