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blackfin: Add STMMAC platform data to enable dwmac1000 driver on BF60x.
- Enable GMAC - Set propler DMA PBL - Disable DMA store and forward mode - Select PTP input clock from MII clock. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Steven Miao <realmz6@gmail.com>
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@ -104,6 +104,7 @@ static struct platform_device bfin_rotary_device = {
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#if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
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#include <linux/stmmac.h>
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#include <linux/phy.h>
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static unsigned short pins[] = P_RMII0;
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@ -111,11 +112,26 @@ static struct stmmac_mdio_bus_data phy_private_data = {
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.phy_mask = 1,
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};
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static struct stmmac_dma_cfg eth_dma_cfg = {
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.pbl = 2,
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};
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int stmmac_ptp_clk_init(struct platform_device *pdev)
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{
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bfin_write32(PADS0_EMAC_PTP_CLKSEL, 0);
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return 0;
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}
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static struct plat_stmmacenet_data eth_private_data = {
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.has_gmac = 1,
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.bus_id = 0,
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.enh_desc = 1,
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.phy_addr = 1,
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.mdio_bus_data = &phy_private_data,
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.dma_cfg = ð_dma_cfg,
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.force_thresh_dma_mode = 1,
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.interface = PHY_INTERFACE_MODE_RMII,
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.init = stmmac_ptp_clk_init,
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};
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static struct platform_device bfin_eth_device = {
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@ -839,6 +839,16 @@
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#define PORTG_LOCK 0xFFC03344 /* PORTG Port x GPIO Lock Register */
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#define PORTG_REVID 0xFFC0337C /* PORTG Port x GPIO Revision ID */
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/* ==================================================
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Pads Controller Registers
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================================================== */
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/* =========================
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PADS0
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========================= */
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#define PADS0_EMAC_PTP_CLKSEL 0xFFC03404 /* PADS0 Clock Selection for EMAC and PTP */
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#define PADS0_TWI_VSEL 0xFFC03408 /* PADS0 TWI Voltage Selection */
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#define PADS0_PORTS_HYST 0xFFC03440 /* PADS0 Hysteresis Enable Register */
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/* =========================
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PINT Registers
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