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thermal: exynos: use correct offset for TMU_CONTROL register on Exynos5260
In exynos5260_tmu_registers tmu_ctrl entry is erroneously assigned twice. The second assignment (to EXYNOS_TMU_REG_CONTROL1 define which represents 0x24 value) overrides the first one (to EXYNOS_TMU_REG_CONTROL define which represents 0x20 value) which results in the wrong (according to the Exynos5260 SoC documentation that I have) offset being used for TMU_CONTROL register. Fix it by removing the wrong assignment and then remove no longer used EXYNOS_TMU_REG_CONTROL1 define. Cc: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Cc: Amit Daniel Kachhap <amit.daniel@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Eduardo Valentin <edubezval@gmail.com> Cc: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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@ -264,7 +264,6 @@ struct exynos_tmu_init_data const exynos5250_default_tmu_data = {
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static const struct exynos_tmu_registers exynos5260_tmu_registers = {
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.triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
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.tmu_ctrl = EXYNOS_TMU_REG_CONTROL1,
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.therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
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.therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
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.therm_trip_en_shift = EXYNOS_TMU_THERM_TRIP_EN_SHIFT,
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@ -75,7 +75,6 @@
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#define EXYNOS_MAX_TRIGGER_PER_REG 4
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/* Exynos5260 specific */
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#define EXYNOS_TMU_REG_CONTROL1 0x24
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#define EXYNOS5260_TMU_REG_INTEN 0xC0
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#define EXYNOS5260_TMU_REG_INTSTAT 0xC4
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#define EXYNOS5260_TMU_REG_INTCLEAR 0xC8
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