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ixgbe: Add SR-IOV features to main module
Adds SR-IOV features supported by the 82599 controller to the main driver module. If the CONFIG_PCI_IOV kernel option is selected then the SR-IOV features are enabled. Use the max_vfs module option to allocate up to 63 virtual functions per physical port. Signed-off-by: Greg Rose <gregory.v.rose@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Greg Rose
David S. Miller
parent
096a58fdec
commit
1cdd1ec878
@ -45,6 +45,7 @@
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#include "ixgbe.h"
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#include "ixgbe_common.h"
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#include "ixgbe_dcb_82599.h"
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#include "ixgbe_sriov.h"
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char ixgbe_driver_name[] = "ixgbe";
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static const char ixgbe_driver_string[] =
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@ -124,6 +125,13 @@ static struct notifier_block dca_notifier = {
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};
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#endif
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#ifdef CONFIG_PCI_IOV
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static unsigned int max_vfs;
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module_param(max_vfs, uint, 0);
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MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
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"per physical function");
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#endif /* CONFIG_PCI_IOV */
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MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
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MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
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MODULE_LICENSE("GPL");
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@ -131,6 +139,41 @@ MODULE_VERSION(DRV_VERSION);
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#define DEFAULT_DEBUG_LEVEL_SHIFT 3
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static inline void ixgbe_disable_sriov(struct ixgbe_adapter *adapter)
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{
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struct ixgbe_hw *hw = &adapter->hw;
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u32 gcr;
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u32 gpie;
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u32 vmdctl;
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#ifdef CONFIG_PCI_IOV
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/* disable iov and allow time for transactions to clear */
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pci_disable_sriov(adapter->pdev);
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#endif
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/* turn off device IOV mode */
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gcr = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
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gcr &= ~(IXGBE_GCR_EXT_SRIOV);
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IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr);
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gpie = IXGBE_READ_REG(hw, IXGBE_GPIE);
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gpie &= ~IXGBE_GPIE_VTMODE_MASK;
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IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
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/* set default pool back to 0 */
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vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
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vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
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IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
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/* take a breather then clean up driver data */
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msleep(100);
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if (adapter->vfinfo)
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kfree(adapter->vfinfo);
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adapter->vfinfo = NULL;
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adapter->num_vfs = 0;
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adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
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}
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static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
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{
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u32 ctrl_ext;
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@ -1020,6 +1063,11 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
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/* set up to autoclear timer, and the vectors */
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mask = IXGBE_EIMS_ENABLE_MASK;
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if (adapter->num_vfs)
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mask &= ~(IXGBE_EIMS_OTHER |
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IXGBE_EIMS_MAILBOX |
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IXGBE_EIMS_LSC);
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else
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mask &= ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
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}
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@ -1249,6 +1297,9 @@ static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
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if (eicr & IXGBE_EICR_LSC)
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ixgbe_check_lsc(adapter);
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if (eicr & IXGBE_EICR_MAILBOX)
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ixgbe_msg_task(adapter);
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if (hw->mac.type == ixgbe_mac_82598EB)
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ixgbe_check_fan_failure(adapter, eicr);
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@ -1763,6 +1814,8 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
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mask |= IXGBE_EIMS_ECC;
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mask |= IXGBE_EIMS_GPI_SDP1;
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mask |= IXGBE_EIMS_GPI_SDP2;
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if (adapter->num_vfs)
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mask |= IXGBE_EIMS_MAILBOX;
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}
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if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
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adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
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@ -1771,6 +1824,11 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
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ixgbe_irq_enable_queues(adapter, ~0);
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IXGBE_WRITE_FLUSH(&adapter->hw);
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if (adapter->num_vfs > 32) {
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u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
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}
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}
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/**
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@ -1900,6 +1958,8 @@ static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
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if (adapter->num_vfs > 32)
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IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
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}
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IXGBE_WRITE_FLUSH(&adapter->hw);
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if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
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@ -1984,18 +2044,32 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
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if (hw->mac.type == ixgbe_mac_82599EB) {
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u32 rttdcs;
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u32 mask;
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/* disable the arbiter while setting MTQC */
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rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
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rttdcs |= IXGBE_RTTDCS_ARBDIS;
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IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
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/* set transmit pool layout */
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mask = (IXGBE_FLAG_SRIOV_ENABLED | IXGBE_FLAG_DCB_ENABLED);
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switch (adapter->flags & mask) {
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case (IXGBE_FLAG_SRIOV_ENABLED):
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IXGBE_WRITE_REG(hw, IXGBE_MTQC,
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(IXGBE_MTQC_VT_ENA | IXGBE_MTQC_64VF));
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break;
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case (IXGBE_FLAG_DCB_ENABLED):
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/* We enable 8 traffic classes, DCB only */
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if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
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IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
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IXGBE_MTQC_8TC_8TQ));
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else
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IXGBE_WRITE_REG(hw, IXGBE_MTQC,
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(IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ));
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break;
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default:
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IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
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break;
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}
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/* re-eable the arbiter */
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rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
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@ -2054,12 +2128,16 @@ static u32 ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
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#ifdef CONFIG_IXGBE_DCB
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| IXGBE_FLAG_DCB_ENABLED
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#endif
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| IXGBE_FLAG_SRIOV_ENABLED
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);
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switch (mask) {
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case (IXGBE_FLAG_RSS_ENABLED):
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mrqc = IXGBE_MRQC_RSSEN;
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break;
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case (IXGBE_FLAG_SRIOV_ENABLED):
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mrqc = IXGBE_MRQC_VMDQEN;
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break;
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#ifdef CONFIG_IXGBE_DCB
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case (IXGBE_FLAG_DCB_ENABLED):
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mrqc = IXGBE_MRQC_RT8TCEN;
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@ -2140,6 +2218,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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int rx_buf_len;
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/* Decide whether to use packet split mode or not */
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/* Do not use packet split if we're in SR-IOV Mode */
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if (!adapter->num_vfs)
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adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
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/* Set the RX buffer length according to the mode */
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@ -2152,7 +2232,9 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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IXGBE_PSRTYPE_IPV4HDR |
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IXGBE_PSRTYPE_IPV6HDR |
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IXGBE_PSRTYPE_L2HDR;
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IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
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IXGBE_WRITE_REG(hw,
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IXGBE_PSRTYPE(adapter->num_vfs),
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psrtype);
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}
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} else {
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if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
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@ -2238,6 +2320,30 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
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}
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if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
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u32 vt_reg_bits;
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u32 reg_offset, vf_shift;
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u32 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
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vt_reg_bits = IXGBE_VMD_CTL_VMDQ_EN
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| IXGBE_VT_CTL_REPLEN;
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vt_reg_bits |= (adapter->num_vfs <<
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IXGBE_VT_CTL_POOL_SHIFT);
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IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl | vt_reg_bits);
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, 0);
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vf_shift = adapter->num_vfs % 32;
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reg_offset = adapter->num_vfs / 32;
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IXGBE_WRITE_REG(hw, IXGBE_VFRE(0), 0);
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IXGBE_WRITE_REG(hw, IXGBE_VFRE(1), 0);
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IXGBE_WRITE_REG(hw, IXGBE_VFTE(0), 0);
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IXGBE_WRITE_REG(hw, IXGBE_VFTE(1), 0);
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/* Enable only the PF's pool for Tx/Rx */
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IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (1 << vf_shift));
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IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (1 << vf_shift));
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IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
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ixgbe_set_vmolr(hw, adapter->num_vfs);
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}
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/* Program MRQC for the distribution of queues */
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mrqc = ixgbe_setup_mrqc(adapter);
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@ -2269,6 +2375,20 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
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}
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
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if (adapter->num_vfs) {
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u32 reg;
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/* Map PF MAC address in RAR Entry 0 to first pool
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* following VFs */
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hw->mac.ops.set_vmdq(hw, 0, adapter->num_vfs);
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/* Set up VF register offsets for selected VT Mode, i.e.
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* 64 VFs for SR-IOV */
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reg = IXGBE_READ_REG(hw, IXGBE_GCR_EXT);
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reg |= IXGBE_GCR_EXT_SRIOV;
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IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, reg);
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}
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rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
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if (adapter->flags & IXGBE_FLAG_RSS_ENABLED ||
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@ -2449,6 +2569,8 @@ void ixgbe_set_rx_mode(struct net_device *netdev)
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addr_list = netdev->mc_list->dmi_addr;
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hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
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ixgbe_addr_list_itr);
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if (adapter->num_vfs)
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ixgbe_restore_vf_multicasts(adapter);
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}
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static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
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@ -2709,6 +2831,10 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
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/* MSI only */
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gpie = 0;
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}
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if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
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gpie &= ~IXGBE_GPIE_VTMODE_MASK;
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gpie |= IXGBE_GPIE_VTMODE_64;
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}
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/* XXX: to interrupt immediately for EICS writes, enable this */
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/* gpie |= IXGBE_GPIE_EIMEN; */
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IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
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@ -2783,6 +2909,18 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
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txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
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txdctl |= IXGBE_TXDCTL_ENABLE;
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IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(j), txdctl);
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if (hw->mac.type == ixgbe_mac_82599EB) {
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int wait_loop = 10;
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/* poll for Tx Enable ready */
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do {
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msleep(1);
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txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(j));
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} while (--wait_loop &&
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!(txdctl & IXGBE_TXDCTL_ENABLE));
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if (!wait_loop)
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DPRINTK(DRV, ERR, "Could not enable "
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"Tx Queue %d\n", j);
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}
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}
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for (i = 0; i < num_rx_rings; i++) {
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@ -2918,7 +3056,8 @@ void ixgbe_reset(struct ixgbe_adapter *adapter)
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}
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/* reprogram the RAR[0] in case user changed it. */
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hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
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hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
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IXGBE_RAH_AV);
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}
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/**
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@ -3286,6 +3425,19 @@ static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
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}
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#endif /* IXGBE_FCOE */
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/**
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* ixgbe_set_sriov_queues: Allocate queues for IOV use
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* @adapter: board private structure to initialize
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*
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* IOV doesn't actually use anything, so just NAK the
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* request for now and let the other queue routines
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* figure out what to do.
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*/
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static inline bool ixgbe_set_sriov_queues(struct ixgbe_adapter *adapter)
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{
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return false;
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}
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/*
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* ixgbe_set_num_queues: Allocate queues for device, feature dependant
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* @adapter: board private structure to initialize
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@ -3299,6 +3451,15 @@ static inline bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
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**/
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static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
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{
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/* Start with base case */
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adapter->num_rx_queues = 1;
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adapter->num_tx_queues = 1;
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adapter->num_rx_pools = adapter->num_rx_queues;
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adapter->num_rx_queues_per_pool = 1;
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if (ixgbe_set_sriov_queues(adapter))
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return;
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#ifdef IXGBE_FCOE
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if (ixgbe_set_fcoe_queues(adapter))
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goto done;
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@ -3569,6 +3730,24 @@ static inline bool ixgbe_cache_ring_fcoe(struct ixgbe_adapter *adapter)
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}
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#endif /* IXGBE_FCOE */
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/**
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* ixgbe_cache_ring_sriov - Descriptor ring to register mapping for sriov
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* @adapter: board private structure to initialize
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*
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* SR-IOV doesn't use any descriptor rings but changes the default if
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* no other mapping is used.
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*
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*/
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static inline bool ixgbe_cache_ring_sriov(struct ixgbe_adapter *adapter)
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{
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adapter->rx_ring[0].reg_idx = adapter->num_vfs * 2;
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adapter->tx_ring[0].reg_idx = adapter->num_vfs * 2;
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if (adapter->num_vfs)
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return true;
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else
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return false;
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}
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/**
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* ixgbe_cache_ring_register - Descriptor ring to register mapping
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* @adapter: board private structure to initialize
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@ -3586,6 +3765,9 @@ static void ixgbe_cache_ring_register(struct ixgbe_adapter *adapter)
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adapter->rx_ring[0].reg_idx = 0;
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adapter->tx_ring[0].reg_idx = 0;
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if (ixgbe_cache_ring_sriov(adapter))
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return;
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#ifdef IXGBE_FCOE
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if (ixgbe_cache_ring_fcoe(adapter))
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return;
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@ -3695,6 +3877,9 @@ static int ixgbe_set_interrupt_capability(struct ixgbe_adapter *adapter)
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adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
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adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
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adapter->atr_sample_rate = 0;
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if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
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ixgbe_disable_sriov(adapter);
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ixgbe_set_num_queues(adapter);
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err = pci_enable_msi(adapter->pdev);
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@ -5474,7 +5659,8 @@ static int ixgbe_set_mac(struct net_device *netdev, void *p)
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memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
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memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
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hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV);
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hw->mac.ops.set_rar(hw, 0, hw->mac.addr, adapter->num_vfs,
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IXGBE_RAH_AV);
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return 0;
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}
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@ -5607,6 +5793,61 @@ static const struct net_device_ops ixgbe_netdev_ops = {
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#endif /* IXGBE_FCOE */
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};
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|
||||
static void __devinit ixgbe_probe_vf(struct ixgbe_adapter *adapter,
|
||||
const struct ixgbe_info *ii)
|
||||
{
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
struct ixgbe_hw *hw = &adapter->hw;
|
||||
int err;
|
||||
|
||||
if (hw->mac.type != ixgbe_mac_82599EB || !max_vfs)
|
||||
return;
|
||||
|
||||
/* The 82599 supports up to 64 VFs per physical function
|
||||
* but this implementation limits allocation to 63 so that
|
||||
* basic networking resources are still available to the
|
||||
* physical function
|
||||
*/
|
||||
adapter->num_vfs = (max_vfs > 63) ? 63 : max_vfs;
|
||||
adapter->flags |= IXGBE_FLAG_SRIOV_ENABLED;
|
||||
err = pci_enable_sriov(adapter->pdev, adapter->num_vfs);
|
||||
if (err) {
|
||||
DPRINTK(PROBE, ERR,
|
||||
"Failed to enable PCI sriov: %d\n", err);
|
||||
goto err_novfs;
|
||||
}
|
||||
/* If call to enable VFs succeeded then allocate memory
|
||||
* for per VF control structures.
|
||||
*/
|
||||
adapter->vfinfo =
|
||||
kcalloc(adapter->num_vfs,
|
||||
sizeof(struct vf_data_storage), GFP_KERNEL);
|
||||
if (adapter->vfinfo) {
|
||||
/* Now that we're sure SR-IOV is enabled
|
||||
* and memory allocated set up the mailbox parameters
|
||||
*/
|
||||
ixgbe_init_mbx_params_pf(hw);
|
||||
memcpy(&hw->mbx.ops, ii->mbx_ops,
|
||||
sizeof(hw->mbx.ops));
|
||||
|
||||
/* Disable RSC when in SR-IOV mode */
|
||||
adapter->flags2 &= ~(IXGBE_FLAG2_RSC_CAPABLE |
|
||||
IXGBE_FLAG2_RSC_ENABLED);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Oh oh */
|
||||
DPRINTK(PROBE, ERR,
|
||||
"Unable to allocate memory for VF "
|
||||
"Data Storage - SRIOV disabled\n");
|
||||
pci_disable_sriov(adapter->pdev);
|
||||
|
||||
err_novfs:
|
||||
adapter->flags &= ~IXGBE_FLAG_SRIOV_ENABLED;
|
||||
adapter->num_vfs = 0;
|
||||
#endif /* CONFIG_PCI_IOV */
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_probe - Device Initialization Routine
|
||||
* @pdev: PCI device information struct
|
||||
@ -5781,6 +6022,8 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
||||
goto err_sw_init;
|
||||
}
|
||||
|
||||
ixgbe_probe_vf(adapter, ii);
|
||||
|
||||
netdev->features = NETIF_F_SG |
|
||||
NETIF_F_IP_CSUM |
|
||||
NETIF_F_HW_VLAN_TX |
|
||||
@ -5801,6 +6044,9 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
||||
netdev->vlan_features |= NETIF_F_IPV6_CSUM;
|
||||
netdev->vlan_features |= NETIF_F_SG;
|
||||
|
||||
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
|
||||
adapter->flags &= ~(IXGBE_FLAG_RSS_ENABLED |
|
||||
IXGBE_FLAG_DCB_ENABLED);
|
||||
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
|
||||
adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
|
||||
|
||||
@ -5927,6 +6173,13 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
|
||||
ixgbe_setup_dca(adapter);
|
||||
}
|
||||
#endif
|
||||
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
|
||||
DPRINTK(PROBE, INFO, "IOV is enabled with %d VFs\n",
|
||||
adapter->num_vfs);
|
||||
for (i = 0; i < adapter->num_vfs; i++)
|
||||
ixgbe_vf_configuration(pdev, (i | 0x10000000));
|
||||
}
|
||||
|
||||
/* add san mac addr to netdev */
|
||||
ixgbe_add_sanmac_netdev(netdev);
|
||||
|
||||
@ -5939,6 +6192,8 @@ err_register:
|
||||
ixgbe_clear_interrupt_scheme(adapter);
|
||||
err_sw_init:
|
||||
err_eeprom:
|
||||
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
|
||||
ixgbe_disable_sriov(adapter);
|
||||
clear_bit(__IXGBE_SFP_MODULE_NOT_FOUND, &adapter->state);
|
||||
del_timer_sync(&adapter->sfp_timer);
|
||||
cancel_work_sync(&adapter->sfp_task);
|
||||
@ -6007,6 +6262,9 @@ static void __devexit ixgbe_remove(struct pci_dev *pdev)
|
||||
if (netdev->reg_state == NETREG_REGISTERED)
|
||||
unregister_netdev(netdev);
|
||||
|
||||
if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
|
||||
ixgbe_disable_sriov(adapter);
|
||||
|
||||
ixgbe_clear_interrupt_scheme(adapter);
|
||||
|
||||
ixgbe_release_hw_control(adapter);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user