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drm/i915: use 120MHz refclk in PCH eDP case too

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CPU eDP needs a different reference clock than PCH eDP, which uses the
standard PCH refclk of 120MHz.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Jesse Barnes 2010-10-07 16:01:17 -07:00 committed by Chris Wilson
parent 7f82328268
commit 1cb1b75e5e
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/i915/intel_display.c
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@ -3625,7 +3625,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
refclk / 1000); refclk / 1000);
} else if (!IS_GEN2(dev)) { } else if (!IS_GEN2(dev)) {
refclk = 96000; refclk = 96000;
if (HAS_PCH_SPLIT(dev)) if (HAS_PCH_SPLIT(dev) &&
(!has_edp_encoder || intel_encoder_is_pch_edp(&has_edp_encoder->base)))
refclk = 120000; /* 120Mhz refclk */ refclk = 120000; /* 120Mhz refclk */
} else { } else {
refclk = 48000; refclk = 48000;