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clk: mediatek: Delete MT8192 msdc gate
The msdc gate is part of the MMC driver. Delete the not used code. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220523102339.21927-3-matthias.bgg@kernel.org Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -12,28 +12,15 @@
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#include <dt-bindings/clock/mt8192-clk.h>
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static const struct mtk_gate_regs msdc_cg_regs = {
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.set_ofs = 0xb4,
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.clr_ofs = 0xb4,
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.sta_ofs = 0xb4,
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};
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static const struct mtk_gate_regs msdc_top_cg_regs = {
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.set_ofs = 0x0,
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.clr_ofs = 0x0,
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.sta_ofs = 0x0,
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};
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#define GATE_MSDC(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &msdc_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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#define GATE_MSDC_TOP(_id, _name, _parent, _shift) \
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GATE_MTK(_id, _name, _parent, &msdc_top_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr_inv)
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static const struct mtk_gate msdc_clks[] = {
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GATE_MSDC(CLK_MSDC_AXI_WRAP, "msdc_axi_wrap", "axi_sel", 22),
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};
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static const struct mtk_gate msdc_top_clks[] = {
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GATE_MSDC_TOP(CLK_MSDC_TOP_AES_0P, "msdc_top_aes_0p", "aes_msdcfde_sel", 0),
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GATE_MSDC_TOP(CLK_MSDC_TOP_SRC_0P, "msdc_top_src_0p", "infra_msdc0_src", 1),
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@ -52,11 +39,6 @@ static const struct mtk_gate msdc_top_clks[] = {
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GATE_MSDC_TOP(CLK_MSDC_TOP_AHB2AXI_BRG_AXI, "msdc_top_ahb2axi_brg_axi", "axi_sel", 14),
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};
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static const struct mtk_clk_desc msdc_desc = {
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.clks = msdc_clks,
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.num_clks = ARRAY_SIZE(msdc_clks),
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};
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static const struct mtk_clk_desc msdc_top_desc = {
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.clks = msdc_top_clks,
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.num_clks = ARRAY_SIZE(msdc_top_clks),
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@ -64,9 +46,6 @@ static const struct mtk_clk_desc msdc_top_desc = {
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static const struct of_device_id of_match_clk_mt8192_msdc[] = {
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{
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.compatible = "mediatek,mt8192-msdc",
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.data = &msdc_desc,
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}, {
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.compatible = "mediatek,mt8192-msdc_top",
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.data = &msdc_top_desc,
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}, {
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