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ASoC: Intel: avs: PCI driver implementation
HD-Audio bus is a PCI device. Add all functions necessary to probe such device along with its removal sequence. Behaviour implemented for all standard operations is similar to existing solutions: sound/pci/hda and sound/soc/intel/skylake. Signed-off-by: Amadeusz Sławiński <amadeuszx.slawinski@linux.intel.com> Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Link: https://lore.kernel.org/r/20220516101116.190192-13-cezary.rojewski@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
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1affc44ea5
@ -15,7 +15,8 @@ enum {
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SND_INTEL_DSP_DRIVER_LEGACY,
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SND_INTEL_DSP_DRIVER_SST,
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SND_INTEL_DSP_DRIVER_SOF,
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SND_INTEL_DSP_DRIVER_LAST = SND_INTEL_DSP_DRIVER_SOF
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SND_INTEL_DSP_DRIVER_AVS,
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SND_INTEL_DSP_DRIVER_LAST = SND_INTEL_DSP_DRIVER_AVS
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};
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#if IS_ENABLED(CONFIG_SND_INTEL_DSP_CONFIG)
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@ -216,6 +216,7 @@ config SND_SOC_INTEL_AVS
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depends on COMMON_CLK
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select SND_SOC_ACPI if ACPI
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select SND_SOC_TOPOLOGY
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select SND_HDA
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select SND_HDA_EXT_CORE
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select SND_HDA_DSP_LOADER
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select SND_INTEL_DSP_CONFIG
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@ -126,6 +126,7 @@ struct avs_dev {
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char **lib_names;
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struct completion fw_ready;
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struct work_struct probe_work;
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struct nhlt_acpi_table *nhlt;
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struct list_head comp_list;
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@ -14,9 +14,17 @@
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// foundation of this driver
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//
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <sound/hda_codec.h>
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#include <sound/hda_i915.h>
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#include <sound/hda_register.h>
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#include <sound/hdaudio.h>
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#include <sound/hdaudio_ext.h>
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#include <sound/intel-dsp-config.h>
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#include <sound/intel-nhlt.h>
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#include "avs.h"
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#include "cldma.h"
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static void
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avs_hda_update_config_dword(struct hdac_bus *bus, u32 reg, u32 mask, u32 value)
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@ -59,3 +67,489 @@ void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable)
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value = enable ? AZX_VS_EM2_L1SEN : 0;
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snd_hdac_chip_updatel(&adev->base.core, VS_EM2, AZX_VS_EM2_L1SEN, value);
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}
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static int avs_hdac_bus_init_streams(struct hdac_bus *bus)
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{
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unsigned int cp_streams, pb_streams;
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unsigned int gcap;
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gcap = snd_hdac_chip_readw(bus, GCAP);
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cp_streams = (gcap >> 8) & 0x0F;
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pb_streams = (gcap >> 12) & 0x0F;
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bus->num_streams = cp_streams + pb_streams;
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snd_hdac_ext_stream_init_all(bus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
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snd_hdac_ext_stream_init_all(bus, cp_streams, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
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return snd_hdac_bus_alloc_stream_pages(bus);
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}
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static bool avs_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset)
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{
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struct hdac_ext_link *hlink;
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bool ret;
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avs_hdac_clock_gating_enable(bus, false);
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ret = snd_hdac_bus_init_chip(bus, full_reset);
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/* Reset stream-to-link mapping */
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list_for_each_entry(hlink, &bus->hlink_list, list)
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writel(0, hlink->ml_addr + AZX_REG_ML_LOSIDV);
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avs_hdac_clock_gating_enable(bus, true);
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/* Set DUM bit to address incorrect position reporting for capture
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* streams. In order to do so, CTRL needs to be out of reset state
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*/
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snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
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return ret;
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}
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static int probe_codec(struct hdac_bus *bus, int addr)
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{
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struct hda_codec *codec;
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unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
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(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
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unsigned int res = -1;
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int ret;
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mutex_lock(&bus->cmd_mutex);
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snd_hdac_bus_send_cmd(bus, cmd);
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snd_hdac_bus_get_response(bus, addr, &res);
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mutex_unlock(&bus->cmd_mutex);
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if (res == -1)
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return -EIO;
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dev_dbg(bus->dev, "codec #%d probed OK: 0x%x\n", addr, res);
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codec = snd_hda_codec_device_init(to_hda_bus(bus), addr, "hdaudioB%dD%d", bus->idx, addr);
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if (IS_ERR(codec)) {
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dev_err(bus->dev, "init codec failed: %ld\n", PTR_ERR(codec));
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return PTR_ERR(codec);
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}
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/*
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* Allow avs_core suspend by forcing suspended state on all
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* of its codec child devices. Component interested in
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* dealing with hda codecs directly takes pm responsibilities
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*/
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pm_runtime_set_suspended(hda_codec_dev(codec));
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/* configure effectively creates new ASoC component */
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ret = snd_hda_codec_configure(codec);
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if (ret < 0) {
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dev_err(bus->dev, "failed to config codec %d\n", ret);
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return ret;
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}
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return 0;
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}
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static void avs_hdac_bus_probe_codecs(struct hdac_bus *bus)
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{
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int c;
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/* First try to probe all given codec slots */
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for (c = 0; c < HDA_MAX_CODECS; c++) {
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if (!(bus->codec_mask & BIT(c)))
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continue;
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if (!probe_codec(bus, c))
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/* success, continue probing */
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continue;
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/*
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* Some BIOSen give you wrong codec addresses
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* that don't exist
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*/
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dev_warn(bus->dev, "Codec #%d probe error; disabling it...\n", c);
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bus->codec_mask &= ~BIT(c);
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/*
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* More badly, accessing to a non-existing
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* codec often screws up the controller bus,
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* and disturbs the further communications.
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* Thus if an error occurs during probing,
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* better to reset the controller bus to get
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* back to the sanity state.
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*/
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snd_hdac_bus_stop_chip(bus);
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avs_hdac_bus_init_chip(bus, true);
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}
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}
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static void avs_hda_probe_work(struct work_struct *work)
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{
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struct avs_dev *adev = container_of(work, struct avs_dev, probe_work);
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struct hdac_bus *bus = &adev->base.core;
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struct hdac_ext_link *hlink;
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int ret;
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pm_runtime_set_active(bus->dev); /* clear runtime_error flag */
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ret = snd_hdac_i915_init(bus);
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if (ret < 0)
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dev_info(bus->dev, "i915 init unsuccessful: %d\n", ret);
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, true);
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avs_hdac_bus_init_chip(bus, true);
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avs_hdac_bus_probe_codecs(bus);
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snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
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/* with all codecs probed, links can be powered down */
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list_for_each_entry(hlink, &bus->hlink_list, list)
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snd_hdac_ext_bus_link_put(bus, hlink);
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snd_hdac_ext_bus_ppcap_enable(bus, true);
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snd_hdac_ext_bus_ppcap_int_enable(bus, true);
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ret = avs_dsp_first_boot_firmware(adev);
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if (ret < 0)
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return;
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adev->nhlt = intel_nhlt_init(adev->dev);
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if (!adev->nhlt)
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dev_info(bus->dev, "platform has no NHLT\n");
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avs_register_all_boards(adev);
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/* configure PM */
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pm_runtime_set_autosuspend_delay(bus->dev, 2000);
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pm_runtime_use_autosuspend(bus->dev);
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pm_runtime_mark_last_busy(bus->dev);
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pm_runtime_put_autosuspend(bus->dev);
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pm_runtime_allow(bus->dev);
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}
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static void hdac_stream_update_pos(struct hdac_stream *stream, u64 buffer_size)
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{
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u64 prev_pos, pos, num_bytes;
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div64_u64_rem(stream->curr_pos, buffer_size, &prev_pos);
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pos = snd_hdac_stream_get_pos_posbuf(stream);
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if (pos < prev_pos)
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num_bytes = (buffer_size - prev_pos) + pos;
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else
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num_bytes = pos - prev_pos;
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stream->curr_pos += num_bytes;
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}
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/* called from IRQ */
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static void hdac_update_stream(struct hdac_bus *bus, struct hdac_stream *stream)
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{
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if (stream->substream) {
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snd_pcm_period_elapsed(stream->substream);
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} else if (stream->cstream) {
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u64 buffer_size = stream->cstream->runtime->buffer_size;
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hdac_stream_update_pos(stream, buffer_size);
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snd_compr_fragment_elapsed(stream->cstream);
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}
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}
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static irqreturn_t hdac_bus_irq_handler(int irq, void *context)
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{
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struct hdac_bus *bus = context;
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u32 mask, int_enable;
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u32 status;
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int ret = IRQ_NONE;
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if (!pm_runtime_active(bus->dev))
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return ret;
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spin_lock(&bus->reg_lock);
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status = snd_hdac_chip_readl(bus, INTSTS);
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if (status == 0 || status == UINT_MAX) {
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spin_unlock(&bus->reg_lock);
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return ret;
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}
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/* clear rirb int */
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status = snd_hdac_chip_readb(bus, RIRBSTS);
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if (status & RIRB_INT_MASK) {
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if (status & RIRB_INT_RESPONSE)
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snd_hdac_bus_update_rirb(bus);
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snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
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}
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mask = (0x1 << bus->num_streams) - 1;
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status = snd_hdac_chip_readl(bus, INTSTS);
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status &= mask;
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if (status) {
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/* Disable stream interrupts; Re-enable in bottom half */
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int_enable = snd_hdac_chip_readl(bus, INTCTL);
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snd_hdac_chip_writel(bus, INTCTL, (int_enable & (~mask)));
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ret = IRQ_WAKE_THREAD;
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} else {
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ret = IRQ_HANDLED;
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}
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spin_unlock(&bus->reg_lock);
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return ret;
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}
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static irqreturn_t hdac_bus_irq_thread(int irq, void *context)
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{
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struct hdac_bus *bus = context;
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u32 status;
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u32 int_enable;
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u32 mask;
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unsigned long flags;
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status = snd_hdac_chip_readl(bus, INTSTS);
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snd_hdac_bus_handle_stream_irq(bus, status, hdac_update_stream);
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/* Re-enable stream interrupts */
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mask = (0x1 << bus->num_streams) - 1;
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spin_lock_irqsave(&bus->reg_lock, flags);
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int_enable = snd_hdac_chip_readl(bus, INTCTL);
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snd_hdac_chip_writel(bus, INTCTL, (int_enable | mask));
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spin_unlock_irqrestore(&bus->reg_lock, flags);
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return IRQ_HANDLED;
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}
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static int avs_hdac_acquire_irq(struct avs_dev *adev)
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{
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struct hdac_bus *bus = &adev->base.core;
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struct pci_dev *pci = to_pci_dev(bus->dev);
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int ret;
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/* request one and check that we only got one interrupt */
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ret = pci_alloc_irq_vectors(pci, 1, 1, PCI_IRQ_MSI | PCI_IRQ_LEGACY);
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if (ret != 1) {
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dev_err(adev->dev, "Failed to allocate IRQ vector: %d\n", ret);
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return ret;
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}
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ret = pci_request_irq(pci, 0, hdac_bus_irq_handler, hdac_bus_irq_thread, bus,
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KBUILD_MODNAME);
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if (ret < 0) {
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dev_err(adev->dev, "Failed to request stream IRQ handler: %d\n", ret);
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goto free_vector;
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}
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ret = pci_request_irq(pci, 0, avs_dsp_irq_handler, avs_dsp_irq_thread, adev,
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KBUILD_MODNAME);
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if (ret < 0) {
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dev_err(adev->dev, "Failed to request IPC IRQ handler: %d\n", ret);
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goto free_stream_irq;
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}
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return 0;
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free_stream_irq:
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pci_free_irq(pci, 0, bus);
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free_vector:
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pci_free_irq_vectors(pci);
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return ret;
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}
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static int avs_bus_init(struct avs_dev *adev, struct pci_dev *pci, const struct pci_device_id *id)
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{
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struct hda_bus *bus = &adev->base;
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struct avs_ipc *ipc;
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struct device *dev = &pci->dev;
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int ret;
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ret = snd_hdac_ext_bus_init(&bus->core, dev, NULL, NULL);
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if (ret < 0)
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return ret;
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bus->core.use_posbuf = 1;
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bus->core.bdl_pos_adj = 0;
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bus->core.sync_write = 1;
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bus->pci = pci;
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bus->mixer_assigned = -1;
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mutex_init(&bus->prepare_mutex);
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ipc = devm_kzalloc(dev, sizeof(*ipc), GFP_KERNEL);
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if (!ipc)
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return -ENOMEM;
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ret = avs_ipc_init(ipc, dev);
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if (ret < 0)
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return ret;
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adev->dev = dev;
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adev->spec = (const struct avs_spec *)id->driver_data;
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adev->ipc = ipc;
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adev->hw_cfg.dsp_cores = hweight_long(AVS_MAIN_CORE_MASK);
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INIT_WORK(&adev->probe_work, avs_hda_probe_work);
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INIT_LIST_HEAD(&adev->comp_list);
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INIT_LIST_HEAD(&adev->path_list);
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INIT_LIST_HEAD(&adev->fw_list);
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init_completion(&adev->fw_ready);
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spin_lock_init(&adev->path_list_lock);
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mutex_init(&adev->modres_mutex);
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mutex_init(&adev->comp_list_mutex);
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mutex_init(&adev->path_mutex);
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return 0;
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}
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static int avs_pci_probe(struct pci_dev *pci, const struct pci_device_id *id)
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{
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struct hdac_bus *bus;
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struct avs_dev *adev;
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struct device *dev = &pci->dev;
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int ret;
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ret = snd_intel_dsp_driver_probe(pci);
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if (ret != SND_INTEL_DSP_DRIVER_ANY && ret != SND_INTEL_DSP_DRIVER_AVS)
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return -ENODEV;
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ret = pcim_enable_device(pci);
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if (ret < 0)
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return ret;
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adev = devm_kzalloc(dev, sizeof(*adev), GFP_KERNEL);
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if (!adev)
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return -ENOMEM;
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ret = avs_bus_init(adev, pci, id);
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if (ret < 0) {
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dev_err(dev, "failed to init avs bus: %d\n", ret);
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return ret;
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}
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ret = pci_request_regions(pci, "AVS HDAudio");
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if (ret < 0)
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return ret;
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bus = &adev->base.core;
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bus->addr = pci_resource_start(pci, 0);
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bus->remap_addr = pci_ioremap_bar(pci, 0);
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if (!bus->remap_addr) {
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dev_err(bus->dev, "ioremap error\n");
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ret = -ENXIO;
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goto err_remap_bar0;
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}
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adev->dsp_ba = pci_ioremap_bar(pci, 4);
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if (!adev->dsp_ba) {
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dev_err(bus->dev, "ioremap error\n");
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ret = -ENXIO;
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goto err_remap_bar4;
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}
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snd_hdac_bus_parse_capabilities(bus);
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if (bus->mlcap)
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snd_hdac_ext_bus_get_ml_capabilities(bus);
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if (!dma_set_mask(dev, DMA_BIT_MASK(64))) {
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dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(dev, DMA_BIT_MASK(32));
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dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
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}
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ret = avs_hdac_bus_init_streams(bus);
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if (ret < 0) {
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dev_err(dev, "failed to init streams: %d\n", ret);
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goto err_init_streams;
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}
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|
||||
ret = avs_hdac_acquire_irq(adev);
|
||||
if (ret < 0) {
|
||||
dev_err(bus->dev, "failed to acquire irq: %d\n", ret);
|
||||
goto err_acquire_irq;
|
||||
}
|
||||
|
||||
pci_set_master(pci);
|
||||
pci_set_drvdata(pci, bus);
|
||||
device_disable_async_suspend(dev);
|
||||
|
||||
schedule_work(&adev->probe_work);
|
||||
|
||||
return 0;
|
||||
|
||||
err_acquire_irq:
|
||||
snd_hdac_bus_free_stream_pages(bus);
|
||||
snd_hdac_stream_free_all(bus);
|
||||
err_init_streams:
|
||||
iounmap(adev->dsp_ba);
|
||||
err_remap_bar4:
|
||||
iounmap(bus->remap_addr);
|
||||
err_remap_bar0:
|
||||
pci_release_regions(pci);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void avs_pci_remove(struct pci_dev *pci)
|
||||
{
|
||||
struct hdac_device *hdev, *save;
|
||||
struct hdac_bus *bus = pci_get_drvdata(pci);
|
||||
struct avs_dev *adev = hdac_to_avs(bus);
|
||||
|
||||
cancel_work_sync(&adev->probe_work);
|
||||
avs_ipc_block(adev->ipc);
|
||||
|
||||
avs_unregister_all_boards(adev);
|
||||
|
||||
if (adev->nhlt)
|
||||
intel_nhlt_free(adev->nhlt);
|
||||
|
||||
if (avs_platattr_test(adev, CLDMA))
|
||||
hda_cldma_free(&code_loader);
|
||||
|
||||
snd_hdac_stop_streams_and_chip(bus);
|
||||
avs_dsp_op(adev, int_control, false);
|
||||
snd_hdac_ext_bus_ppcap_int_enable(bus, false);
|
||||
|
||||
/* it is safe to remove all codecs from the system now */
|
||||
list_for_each_entry_safe(hdev, save, &bus->codec_list, list)
|
||||
snd_hda_codec_unregister(hdac_to_hda_codec(hdev));
|
||||
|
||||
snd_hdac_bus_free_stream_pages(bus);
|
||||
snd_hdac_stream_free_all(bus);
|
||||
/* reverse ml_capabilities */
|
||||
snd_hdac_link_free_all(bus);
|
||||
snd_hdac_ext_bus_exit(bus);
|
||||
|
||||
avs_dsp_core_disable(adev, GENMASK(adev->hw_cfg.dsp_cores - 1, 0));
|
||||
snd_hdac_ext_bus_ppcap_enable(bus, false);
|
||||
|
||||
/* snd_hdac_stop_streams_and_chip does that already? */
|
||||
snd_hdac_bus_stop_chip(bus);
|
||||
snd_hdac_display_power(bus, HDA_CODEC_IDX_CONTROLLER, false);
|
||||
if (bus->audio_component)
|
||||
snd_hdac_i915_exit(bus);
|
||||
|
||||
avs_module_info_free(adev);
|
||||
pci_free_irq(pci, 0, adev);
|
||||
pci_free_irq(pci, 0, bus);
|
||||
pci_free_irq_vectors(pci);
|
||||
iounmap(bus->remap_addr);
|
||||
iounmap(adev->dsp_ba);
|
||||
pci_release_regions(pci);
|
||||
|
||||
/* Firmware is not needed anymore */
|
||||
avs_release_firmwares(adev);
|
||||
|
||||
/* pm_runtime_forbid() can rpm_resume() which we do not want */
|
||||
pm_runtime_disable(&pci->dev);
|
||||
pm_runtime_forbid(&pci->dev);
|
||||
pm_runtime_enable(&pci->dev);
|
||||
pm_runtime_get_noresume(&pci->dev);
|
||||
}
|
||||
|
||||
static const struct pci_device_id avs_ids[] = {
|
||||
{ 0 }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(pci, avs_ids);
|
||||
|
||||
static struct pci_driver avs_pci_driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id_table = avs_ids,
|
||||
.probe = avs_pci_probe,
|
||||
.remove = avs_pci_remove,
|
||||
};
|
||||
module_pci_driver(avs_pci_driver);
|
||||
|
||||
MODULE_AUTHOR("Cezary Rojewski <cezary.rojewski@intel.com>");
|
||||
MODULE_AUTHOR("Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>");
|
||||
MODULE_DESCRIPTION("Intel cAVS sound driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
@ -6,7 +6,6 @@
|
||||
// Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
|
||||
//
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <sound/hdaudio_ext.h>
|
||||
#include "avs.h"
|
||||
#include "registers.h"
|
||||
@ -322,5 +321,3 @@ int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id)
|
||||
ida_free(&adev->ppl_ida, instance_id);
|
||||
return ret;
|
||||
}
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
|
@ -14,6 +14,7 @@
|
||||
#define AZX_PGCTL_LSRMD_MASK BIT(4)
|
||||
#define AZX_CGCTL_MISCBDCGE_MASK BIT(6)
|
||||
#define AZX_VS_EM2_L1SEN BIT(13)
|
||||
#define AZX_VS_EM2_DUM BIT(23)
|
||||
|
||||
/* Intel HD Audio General DSP Registers */
|
||||
#define AVS_ADSP_GEN_BASE 0x0
|
||||
|
Loading…
Reference in New Issue
Block a user