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PCI: pciehp: Remove error checks when accessing PCIe Capability
There's not much point in checking the return value from every config space access because the only likely errors are design-time things like unaligned accesses or invalid register numbers. The checking clutters the code significantly, so this patch removes it. No functional change. Reference: http://lkml.kernel.org/r/CA+55aFzP4xEbcNmZ+MS0SQ3LrULzSq+dBiT_X9U-bPpR-Ukgrw@mail.gmail.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas
parent
cd84d34074
commit
1a84b99ccb
@ -112,10 +112,10 @@ static int pcie_poll_cmd(struct controller *ctrl)
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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u16 slot_status;
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int err, timeout = 1000;
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int timeout = 1000;
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err = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) {
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (slot_status & PCI_EXP_SLTSTA_CC) {
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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PCI_EXP_SLTSTA_CC);
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return 1;
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@ -123,9 +123,8 @@ static int pcie_poll_cmd(struct controller *ctrl)
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while (timeout > 0) {
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msleep(10);
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timeout -= 10;
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err = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA,
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&slot_status);
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if (!err && (slot_status & PCI_EXP_SLTSTA_CC)) {
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (slot_status & PCI_EXP_SLTSTA_CC) {
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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PCI_EXP_SLTSTA_CC);
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return 1;
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@ -157,19 +156,12 @@ static void pcie_wait_cmd(struct controller *ctrl, int poll)
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static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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int retval = 0;
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u16 slot_status;
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u16 slot_ctrl;
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mutex_lock(&ctrl->ctrl_lock);
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
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__func__);
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goto out;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (slot_status & PCI_EXP_SLTSTA_CC) {
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if (!ctrl->no_cmd_complete) {
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/*
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@ -193,24 +185,17 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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}
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}
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
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goto out;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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slot_ctrl &= ~mask;
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slot_ctrl |= (cmd & mask);
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ctrl->cmd_busy = 1;
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smp_mb();
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retval = pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
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if (retval)
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ctrl_err(ctrl, "Cannot write to SLOTCTRL register\n");
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pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
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/*
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* Wait for command completion.
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*/
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if (!retval && !ctrl->no_cmd_complete) {
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if (!ctrl->no_cmd_complete) {
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int poll = 0;
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/*
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* if hotplug interrupt is not enabled or command
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@ -222,20 +207,17 @@ static int pcie_write_cmd(struct controller *ctrl, u16 cmd, u16 mask)
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poll = 1;
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pcie_wait_cmd(ctrl, poll);
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}
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out:
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mutex_unlock(&ctrl->ctrl_lock);
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return retval;
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return 0;
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}
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static bool check_link_active(struct controller *ctrl)
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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bool ret = false;
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u16 lnk_status;
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bool ret;
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if (pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status))
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return ret;
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pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
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ret = !!(lnk_status & PCI_EXP_LNKSTA_DLLLA);
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if (ret)
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@ -299,9 +281,8 @@ static bool pci_bus_check_dev(struct pci_bus *bus, int devfn)
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int pciehp_check_link_status(struct controller *ctrl)
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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bool found;
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u16 lnk_status;
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int retval = 0;
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bool found = false;
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/*
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* Data Link Layer Link Active Reporting must be capable for
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@ -318,53 +299,37 @@ int pciehp_check_link_status(struct controller *ctrl)
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found = pci_bus_check_dev(ctrl->pcie->port->subordinate,
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PCI_DEVFN(0, 0));
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retval = pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
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if (retval) {
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ctrl_err(ctrl, "Cannot read LNKSTATUS register\n");
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status);
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ctrl_dbg(ctrl, "%s: lnk_status = %x\n", __func__, lnk_status);
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if ((lnk_status & PCI_EXP_LNKSTA_LT) ||
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!(lnk_status & PCI_EXP_LNKSTA_NLW)) {
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ctrl_err(ctrl, "Link Training Error occurs \n");
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retval = -1;
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return retval;
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return -1;
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}
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pcie_update_link_speed(ctrl->pcie->port->subordinate, lnk_status);
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if (!found && !retval)
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retval = -1;
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if (!found)
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return -1;
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return retval;
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return 0;
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}
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static int __pciehp_link_set(struct controller *ctrl, bool enable)
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{
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struct pci_dev *pdev = ctrl_dev(ctrl);
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u16 lnk_ctrl;
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int retval = 0;
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retval = pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &lnk_ctrl);
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if (retval) {
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ctrl_err(ctrl, "Cannot read LNKCTRL register\n");
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &lnk_ctrl);
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if (enable)
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lnk_ctrl &= ~PCI_EXP_LNKCTL_LD;
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else
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lnk_ctrl |= PCI_EXP_LNKCTL_LD;
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retval = pcie_capability_write_word(pdev, PCI_EXP_LNKCTL, lnk_ctrl);
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if (retval) {
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ctrl_err(ctrl, "Cannot write LNKCTRL register\n");
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return retval;
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}
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pcie_capability_write_word(pdev, PCI_EXP_LNKCTL, lnk_ctrl);
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ctrl_dbg(ctrl, "%s: lnk_ctrl = %x\n", __func__, lnk_ctrl);
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return retval;
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return 0;
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}
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static int pciehp_link_enable(struct controller *ctrl)
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@ -383,14 +348,8 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status)
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struct pci_dev *pdev = ctrl_dev(ctrl);
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u16 slot_ctrl;
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u8 atten_led_state;
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int retval = 0;
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x, value read %x\n", __func__,
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
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@ -423,13 +382,8 @@ int pciehp_get_power_status(struct slot *slot, u8 *status)
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struct pci_dev *pdev = ctrl_dev(ctrl);
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u16 slot_ctrl;
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u8 pwr_state;
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int retval = 0;
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTCTRL register\n", __func__);
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTCTL, &slot_ctrl);
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ctrl_dbg(ctrl, "%s: SLOTCTRL %x value read %x\n", __func__,
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pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_ctrl);
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@ -447,55 +401,35 @@ int pciehp_get_power_status(struct slot *slot, u8 *status)
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break;
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}
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return retval;
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return 0;
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}
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int pciehp_get_latch_status(struct slot *slot, u8 *status)
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{
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struct controller *ctrl = slot->ctrl;
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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u16 slot_status;
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int retval;
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
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__func__);
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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*status = !!(slot_status & PCI_EXP_SLTSTA_MRLSS);
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return 0;
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}
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int pciehp_get_adapter_status(struct slot *slot, u8 *status)
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{
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struct controller *ctrl = slot->ctrl;
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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u16 slot_status;
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int retval;
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
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__func__);
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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*status = !!(slot_status & PCI_EXP_SLTSTA_PDS);
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return 0;
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}
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int pciehp_query_power_fault(struct slot *slot)
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{
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struct controller *ctrl = slot->ctrl;
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struct pci_dev *pdev = ctrl_dev(ctrl);
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struct pci_dev *pdev = ctrl_dev(slot->ctrl);
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u16 slot_status;
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int retval;
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (retval) {
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ctrl_err(ctrl, "Cannot check for power fault\n");
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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return !!(slot_status & PCI_EXP_SLTSTA_PFD);
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}
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@ -570,25 +504,13 @@ int pciehp_power_on_slot(struct slot * slot)
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u16 slot_cmd;
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u16 cmd_mask;
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u16 slot_status;
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int retval = 0;
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int retval;
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/* Clear sticky power-fault bit from previous power failures */
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retval = pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS register\n",
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__func__);
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return retval;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
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slot_status &= PCI_EXP_SLTSTA_PFD;
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if (slot_status) {
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retval = pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, slot_status);
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if (retval) {
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ctrl_err(ctrl,
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"%s: Cannot write to SLOTSTATUS register\n",
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__func__);
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return retval;
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}
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}
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if (slot_status)
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, slot_status);
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ctrl->power_fault_detected = 0;
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slot_cmd = POWER_ON;
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@ -649,12 +571,7 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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*/
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intr_loc = 0;
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do {
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if (pcie_capability_read_word(pdev, PCI_EXP_SLTSTA,
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&detected)) {
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ctrl_err(ctrl, "%s: Cannot read SLOTSTATUS\n",
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__func__);
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return IRQ_NONE;
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}
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pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &detected);
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detected &= (PCI_EXP_SLTSTA_ABP | PCI_EXP_SLTSTA_PFD |
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PCI_EXP_SLTSTA_MRLSC | PCI_EXP_SLTSTA_PDC |
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@ -663,13 +580,9 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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intr_loc |= detected;
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if (!intr_loc)
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return IRQ_NONE;
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if (detected &&
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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intr_loc)) {
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ctrl_err(ctrl, "%s: Cannot write to SLOTSTATUS\n",
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__func__);
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return IRQ_NONE;
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}
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if (detected)
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
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intr_loc);
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} while (detected);
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ctrl_dbg(ctrl, "%s: intr_loc %x\n", __func__, intr_loc);
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@ -894,11 +807,7 @@ struct controller *pcie_init(struct pcie_device *dev)
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goto abort;
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}
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ctrl->pcie = dev;
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if (pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap)) {
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ctrl_err(ctrl, "Cannot read SLOTCAP register\n");
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goto abort_ctrl;
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}
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pcie_capability_read_dword(pdev, PCI_EXP_SLTCAP, &slot_cap);
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ctrl->slot_cap = slot_cap;
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mutex_init(&ctrl->ctrl_lock);
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init_waitqueue_head(&ctrl->queue);
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@ -914,18 +823,14 @@ struct controller *pcie_init(struct pcie_device *dev)
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ctrl->no_cmd_complete = 1;
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/* Check if Data Link Layer Link Active Reporting is implemented */
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if (pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap)) {
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ctrl_err(ctrl, "%s: Cannot read LNKCAP register\n", __func__);
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goto abort_ctrl;
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}
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pcie_capability_read_dword(pdev, PCI_EXP_LNKCAP, &link_cap);
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if (link_cap & PCI_EXP_LNKCAP_DLLLARC) {
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ctrl_dbg(ctrl, "Link Active Reporting supported\n");
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ctrl->link_active_reporting = 1;
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}
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/* Clear all remaining event bits in Slot Status register */
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if (pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, 0x1f))
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goto abort_ctrl;
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pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, 0x1f);
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/* Disable software notification */
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pcie_disable_notification(ctrl);
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