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x86/mce: Fix mce regression from recent cleanup
In commit 33d7885b59
x86/mce: Update MCE severity condition check
We simplified the rules to recognise each classification of recoverable
machine check combining the instruction and data fetch rules into a
single entry based on clarifications in the June 2013 SDM that all
recoverable events would be reported on the unaffected processor with
MCG_STATUS.EIPV=0 and MCG_STATUS.RIPV=1. Unfortunately the simplified
rule has a couple of bugs. Fix them here.
Acked-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -111,8 +111,8 @@ static struct severity {
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#ifdef CONFIG_MEMORY_FAILURE
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#ifdef CONFIG_MEMORY_FAILURE
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MCESEV(
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MCESEV(
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KEEP, "Action required but unaffected thread is continuable",
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KEEP, "Action required but unaffected thread is continuable",
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR),
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SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
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MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV)
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MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
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),
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),
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MCESEV(
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MCESEV(
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AR, "Action required: data load error in a user process",
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AR, "Action required: data load error in a user process",
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