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drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@ -53,6 +53,8 @@ MODULE_FIRMWARE("amdgpu/tonga_sdma.bin");
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MODULE_FIRMWARE("amdgpu/tonga_sdma1.bin");
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MODULE_FIRMWARE("amdgpu/carrizo_sdma.bin");
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MODULE_FIRMWARE("amdgpu/carrizo_sdma1.bin");
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MODULE_FIRMWARE("amdgpu/fiji_sdma.bin");
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MODULE_FIRMWARE("amdgpu/fiji_sdma1.bin");
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static const u32 sdma_offsets[SDMA_MAX_INSTANCE] =
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{
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@ -80,6 +82,24 @@ static const u32 tonga_mgcg_cgcg_init[] =
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mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100
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};
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static const u32 golden_settings_fiji_a10[] =
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{
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mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007,
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mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
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mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
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mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
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mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007,
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mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
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mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
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mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
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};
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static const u32 fiji_mgcg_cgcg_init[] =
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{
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mmSDMA0_CLK_CTRL, 0xff000ff0, 0x00000100,
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mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100
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};
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static const u32 cz_golden_settings_a11[] =
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{
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mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007,
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@ -122,6 +142,14 @@ static const u32 cz_mgcg_cgcg_init[] =
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static void sdma_v3_0_init_golden_registers(struct amdgpu_device *adev)
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{
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switch (adev->asic_type) {
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case CHIP_FIJI:
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amdgpu_program_register_sequence(adev,
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fiji_mgcg_cgcg_init,
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(const u32)ARRAY_SIZE(fiji_mgcg_cgcg_init));
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amdgpu_program_register_sequence(adev,
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golden_settings_fiji_a10,
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(const u32)ARRAY_SIZE(golden_settings_fiji_a10));
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break;
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case CHIP_TONGA:
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amdgpu_program_register_sequence(adev,
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tonga_mgcg_cgcg_init,
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@ -167,6 +195,9 @@ static int sdma_v3_0_init_microcode(struct amdgpu_device *adev)
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case CHIP_TONGA:
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chip_name = "tonga";
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break;
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case CHIP_FIJI:
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chip_name = "fiji";
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break;
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case CHIP_CARRIZO:
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chip_name = "carrizo";
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break;
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@ -1209,6 +1209,13 @@ static const struct amdgpu_ip_block_version fiji_ip_blocks[] =
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.rev = 0,
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.funcs = &gfx_v8_0_ip_funcs,
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},
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{
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.type = AMD_IP_BLOCK_TYPE_SDMA,
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.major = 3,
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.minor = 0,
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.rev = 0,
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.funcs = &sdma_v3_0_ip_funcs,
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},
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};
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static const struct amdgpu_ip_block_version cz_ip_blocks[] =
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