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arm-soc: mvebu platform changes

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This series contains changes for the Marvell EBU platforms (mvebu,
 orion, kirkwood, dove) that were not part of the first set of pull
 requests because of dependencies on the MMC tree, and being submitted
 a little late.
 
 Notable changes are:
 
 * More devices get moved out of board files into device tree
   descriptions. The remaining devices listed in there have patches
   that will get sent for 3.10, after which we can remove a lot of the
   board files entirely. We are doing the pinctrl and mmc drivers here,
   ethernet and PCI still remain.
 
 * SMP support for mvebu is improved with support for the
   local interrupt controller.
 
 * The Guruplug board file gets replaced with a DT description.
 
 Unfortunately, the dependency on the MMC tree turned out to be a much
 larger problem than expected, when the MMC maintainer rebased the patches
 in his tree that all of the patches in this branch are based on, which
 caused merge conflicts between the new and old versions of those patches.
 
 To work around the merge conflicts, this branch rebases all patches
 on top of the respective MMC patches that did get merged into 3.9.
 The patches are all identical to the versions that were part of
 linux-next, but have a new commit date.
 
 Merge conflicts:
 
 * in board-nsa310.c, the gpio.h inclusion was removed prematurely and
   put back as a bug fix earlier. With this series it is really not needed
   any more.
 
 * The patch to add rtc support was already applied by Andrew Morton,
   and conflicts with a second copy that was in this series, which adds
   a lot of other devices to arch/arm/boot/dts/armada-370-xp.dtsi.
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Merge tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC mvebu platform changes from Olof Johansson:
 "This series contains changes for the Marvell EBU platforms (mvebu,
  orion, kirkwood, dove) that were not part of the first set of pull
  requests because of dependencies on the MMC tree, and being submitted
  a little late.

  Notable changes are:

   - More devices get moved out of board files into device tree
     descriptions.  The remaining devices listed in there have patches
     that will get sent for 3.10, after which we can remove a lot of the
     board files entirely.  We are doing the pinctrl and mmc drivers
     here, ethernet and PCI still remain.

   - SMP support for mvebu is improved with support for the local
     interrupt controller.

   - The Guruplug board file gets replaced with a DT description.

  Unfortunately, the dependency on the MMC tree turned out to be a much
  larger problem than expected, when the MMC maintainer rebased the
  patches in his tree that all of the patches in this branch are based
  on, which caused merge conflicts between the new and old versions of
  those patches.

  To work around the merge conflicts, this branch rebases all patches on
  top of the respective MMC patches that did get merged into 3.9.  The
  patches are all identical to the versions that were part of
  linux-next, but have a new commit date."

* tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (90 commits)
  arm: mvebu: enable the SD card slot on Armada 370 Reference Design board
  ARM: kirkwood: topkick: init mvsdio via DT
  ARM: kirkwood: nsa310: convert to pinctrl
  ARM: Kirkwood: topkick: Enable i2c bus.
  ARM: kirkwood: topkick: convert to pinctrl
  ARM: dove: convert serial DT nodes to clocks property
  arm: mvebu: Add SPI flash on Armada 370 DB board
  arm: mvebu: Add SPI flash on Armada XP-DB board
  arm: mvebu: Add SPI flash on Armada XP-GP board
  arm: mvebu: Add support for SPI controller in Armada 370/XP
  clocksource: update and move armada-370-xp-timer documentation to timer directory
  arm: mvebu: update DT to support local timers
  ARM: Dove: convert usb host controller to DT
  arm: mvebu: Enable USB controllers on Armada 370/XP boards
  arm: mvebu: Add support for USB host controllers in Armada 370/XP
  arm: mvebu: add button for OpenBlocks AX3-4
  ARM: Kirkwood: Convert NS2 to gpio-poweroff.
  ARM: Kirkwood: Convert NSA310 I2C to device tree
  ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver
  ARM: Kirkwood: Convert NSA310 to DT based regulators.
  ...
This commit is contained in:
Linus Torvalds 2013-02-28 20:09:24 -08:00
commit 1a32c58bb9
44 changed files with 1314 additions and 371 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/devicetree/bindings/arm/armada-370-xp-timer.txt → Documentation/devicetree/bindings/timer/marvell,armada-370-xp-timer.txt
View File

@ -1,10 +1,13 @@
Marvell Armada 370 and Armada XP Global Timers
----------------------------------------------
Marvell Armada 370 and Armada XP Timers
---------------------------------------
Required properties:
- compatible: Should be "marvell,armada-370-xp-timer"
- interrupts: Should contain the list of Global Timer interrupts
- reg: Should contain the base address of the Global Timer registers
- interrupts: Should contain the list of Global Timer interrupts and
then local timer interrupts
- reg: Should contain location and length for timers register. First
pair for the Global Timer registers, second pair for the
local/private timers.
- clocks: clock driving the timer hardware
Optional properties:

3
arch/arm/boot/dts/Makefile
View File

@ -56,6 +56,7 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
kirkwood-goflexnet.dtb \
kirkwood-guruplug-server-plus.dtb \
kirkwood-ib62x0.dtb \
kirkwood-iconnect.dtb \
kirkwood-iomega_ix2_200.dtb \
@ -78,7 +79,9 @@ dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
msm8960-cdp.dtb
dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
armada-370-mirabox.dtb \
armada-370-rd.dtb \
armada-xp-db.dtb \
armada-xp-gp.dtb \
armada-xp-openblocks-ax3-4.dtb
dtb-$(CONFIG_ARCH_MXC) += \
imx25-karo-tx25.dtb \

35
arch/arm/boot/dts/armada-370-db.dts
View File

@ -59,5 +59,40 @@
phy = <&phy1>;
phy-mode = "rgmii-id";
};
mvsdio@d00d4000 {
pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default";
/*
* This device is disabled by default, because
* using the SD card connector requires
* changing the default CON40 connector
* "DB-88F6710_MPP_2xRGMII_DEVICE_Jumper" to a
* different connector
* "DB-88F6710_MPP_RGMII_SD_Jumper".
*/
status = "disabled";
/* No CD or WP GPIOs */
};
usb@d0050000 {
status = "okay";
};
usb@d0051000 {
status = "okay";
};
spi0: spi@d0010600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mx25l25635e";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <50000000>;
};
};
};
};

18
arch/arm/boot/dts/armada-370-mirabox.dts
View File

@ -52,5 +52,23 @@
phy = <&phy1>;
phy-mode = "rgmii-id";
};
mvsdio@d00d4000 {
pinctrl-0 = <&sdio_pins2>;
pinctrl-names = "default";
status = "okay";
/*
* No CD or WP GPIOs: SDIO interface used for
* Wifi/Bluetooth chip
*/
};
usb@d0050000 {
status = "okay";
};
usb@d0051000 {
status = "okay";
};
};
};

68
arch/arm/boot/dts/armada-370-rd.dts Normal file
View File

@ -0,0 +1,68 @@
/*
* Device Tree file for Marvell Armada 370 Reference Design board
* (RD-88F6710-A1)
*
* Copied from arch/arm/boot/dts/armada-370-db.dts
*
* Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
/include/ "armada-370.dtsi"
/ {
model = "Marvell Armada 370 Reference Design";
compatible = "marvell,a370-rd", "marvell,armada370", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; /* 512 MB */
};
soc {
serial@d0012000 {
clock-frequency = <200000000>;
status = "okay";
};
sata@d00a0000 {
nr-ports = <2>;
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
};
ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "sgmii";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
mvsdio@d00d4000 {
pinctrl-0 = <&sdio_pins1>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
};
};

49
arch/arm/boot/dts/armada-370-xp.dtsi
View File

@ -68,8 +68,9 @@
timer@d0020300 {
compatible = "marvell,armada-370-xp-timer";
reg = <0xd0020300 0x30>;
interrupts = <37>, <38>, <39>, <40>;
reg = <0xd0020300 0x30>,
<0xd0021040 0x30>;
interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
clocks = <&coreclk 2>;
};
@ -137,6 +138,50 @@
reg = <0xd0010300 0x20>;
interrupts = <50>;
};
mvsdio@d00d4000 {
compatible = "marvell,orion-sdio";
reg = <0xd00d4000 0x200>;
interrupts = <54>;
clocks = <&gateclk 17>;
status = "disabled";
};
usb@d0050000 {
compatible = "marvell,orion-ehci";
reg = <0xd0050000 0x500>;
interrupts = <45>;
status = "disabled";
};
usb@d0051000 {
compatible = "marvell,orion-ehci";
reg = <0xd0051000 0x500>;
interrupts = <46>;
status = "disabled";
};
spi0: spi@d0010600 {
compatible = "marvell,orion-spi";
reg = <0xd0010600 0x28>;
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
interrupts = <30>;
clocks = <&coreclk 0>;
status = "disabled";
};
spi1: spi@d0010680 {
compatible = "marvell,orion-spi";
reg = <0xd0010680 0x28>;
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
interrupts = <92>;
clocks = <&coreclk 0>;
status = "disabled";
};
};
};

21
arch/arm/boot/dts/armada-370.dtsi
View File

@ -47,6 +47,18 @@
pinctrl {
compatible = "marvell,mv88f6710-pinctrl";
reg = <0xd0018000 0x38>;
sdio_pins1: sdio-pins1 {
marvell,pins = "mpp9", "mpp11", "mpp12",
"mpp13", "mpp14", "mpp15";
marvell,function = "sd0";
};
sdio_pins2: sdio-pins2 {
marvell,pins = "mpp47", "mpp48", "mpp49",
"mpp50", "mpp51", "mpp52";
marvell,function = "sd0";
};
};
gpio0: gpio@d0018100 {
@ -132,5 +144,14 @@
dmacap,memset;
};
};
usb@d0050000 {
clocks = <&coreclk 0>;
};
usb@d0051000 {
clocks = <&coreclk 0>;
};
};
};

31
arch/arm/boot/dts/armada-xp-db.dts
View File

@ -90,5 +90,36 @@
phy = <&phy3>;
phy-mode = "sgmii";
};
mvsdio@d00d4000 {
pinctrl-0 = <&sdio_pins>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
usb@d0050000 {
status = "okay";
};
usb@d0051000 {
status = "okay";
};
usb@d0052000 {
status = "okay";
};
spi0: spi@d0010600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "m25p64";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <20000000>;
};
};
};
};

113
arch/arm/boot/dts/armada-xp-gp.dts Normal file
View File

@ -0,0 +1,113 @@
/*
* Device Tree file for Marvell Armada XP development board
* (DB-MV784MP-GP)
*
* Copyright (C) 2013 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
/include/ "armada-xp-mv78460.dtsi"
/ {
model = "Marvell Armada XP Development Board DB-MV784MP-GP";
compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
/*
* 4 GB of plug-in RAM modules by default but only 3GB
* are visible, the amount of memory available can be
* changed by the bootloader according the size of the
* module actually plugged
*/
reg = <0x00000000 0xC0000000>;
};
soc {
serial@d0012000 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012100 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012200 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012300 {
clock-frequency = <250000000>;
status = "okay";
};
sata@d00a0000 {
nr-ports = <2>;
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <16>;
};
phy1: ethernet-phy@1 {
reg = <17>;
};
phy2: ethernet-phy@2 {
reg = <18>;
};
phy3: ethernet-phy@3 {
reg = <19>;
};
};
ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
ethernet@d0030000 {
status = "okay";
phy = <&phy2>;
phy-mode = "rgmii-id";
};
ethernet@d0034000 {
status = "okay";
phy = <&phy3>;
phy-mode = "rgmii-id";
};
spi0: spi@d0010600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
};
};
};
};

6
arch/arm/boot/dts/armada-xp-mv78230.dtsi
View File

@ -47,6 +47,12 @@
pinctrl {
compatible = "marvell,mv78230-pinctrl";
reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@d0018100 {

6
arch/arm/boot/dts/armada-xp-mv78260.dtsi
View File

@ -48,6 +48,12 @@
pinctrl {
compatible = "marvell,mv78260-pinctrl";
reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@d0018100 {

6
arch/arm/boot/dts/armada-xp-mv78460.dtsi
View File

@ -63,6 +63,12 @@
pinctrl {
compatible = "marvell,mv78460-pinctrl";
reg = <0xd0018000 0x38>;
sdio_pins: sdio-pins {
marvell,pins = "mpp30", "mpp31", "mpp32",
"mpp33", "mpp34", "mpp35";
marvell,function = "sd0";
};
};
gpio0: gpio@d0018100 {

18
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View File

@ -66,6 +66,18 @@
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
button@1 {
label = "Init Button";
linux,code = <116>;
gpios = <&gpio1 28 0>;
};
};
mdio {
phy0: ethernet-phy@0 {
reg = <0>;
@ -121,5 +133,11 @@
nr-ports = <2>;
status = "okay";
};
usb@d0050000 {
status = "okay";
};
usb@d0051000 {
status = "okay";
};
};
};

19
arch/arm/boot/dts/armada-xp.dtsi
View File

@ -30,7 +30,7 @@
};
mpic: interrupt-controller@d0020000 {
reg = <0xd0020a00 0x1d0>,
reg = <0xd0020a00 0x2d0>,
<0xd0021070 0x58>;
};
@ -134,5 +134,22 @@
dmacap,memset;
};
};
usb@d0050000 {
clocks = <&gateclk 18>;
};
usb@d0051000 {
clocks = <&gateclk 19>;
};
usb@d0052000 {
compatible = "marvell,orion-ehci";
reg = <0xd0052000 0x500>;
interrupts = <47>;
clocks = <&gateclk 20>;
status = "disabled";
};
};
};

28
arch/arm/boot/dts/dove-cubox.dts
View File

@ -17,12 +17,33 @@
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_gpio_18>;
pinctrl-names = "default";
power {
label = "Power";
gpios = <&gpio0 18 1>;
linux,default-trigger = "default-on";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usb_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 1 0>;
};
};
};
&uart0 { status = "okay"; };
@ -47,9 +68,14 @@
};
&pinctrl {
pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
pinctrl-0 = <&pmx_gpio_1 &pmx_gpio_12>;
pinctrl-names = "default";
pmx_gpio_1: pmx-gpio-1 {
marvell,pins = "mpp1";
marvell,function = "gpio";
};
pmx_gpio_12: pmx-gpio-12 {
marvell,pins = "mpp12";
marvell,function = "gpio";

24
arch/arm/boot/dts/dove.dtsi
View File

@ -55,7 +55,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <7>;
clock-frequency = <166666667>;
clocks = <&core_clk 0>;
status = "disabled";
};
@ -64,7 +64,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <8>;
clock-frequency = <166666667>;
clocks = <&core_clk 0>;
status = "disabled";
};
@ -73,7 +73,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <9>;
clock-frequency = <166666667>;
clocks = <&core_clk 0>;
status = "disabled";
};
@ -82,7 +82,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <10>;
clock-frequency = <166666667>;
clocks = <&core_clk 0>;
status = "disabled";
};
@ -156,6 +156,22 @@
status = "disabled";
};
ehci0: usb-host@50000 {
compatible = "marvell,orion-ehci";
reg = <0x50000 0x1000>;
interrupts = <24>;
clocks = <&gate_clk 0>;
status = "okay";
};
ehci1: usb-host@51000 {
compatible = "marvell,orion-ehci";
reg = <0x51000 0x1000>;
interrupts = <25>;
clocks = <&gate_clk 1>;
status = "okay";
};
sdio0: sdio@92000 {
compatible = "marvell,dove-sdhci";
reg = <0x92000 0x100>;

17
arch/arm/boot/dts/kirkwood-6282.dtsi
View File

@ -5,6 +5,12 @@
compatible = "marvell,88f6282-pinctrl";
reg = <0x10000 0x20>;
pmx_nand: pmx-nand {
marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
"mpp4", "mpp5", "mpp18", "mpp19";
marvell,function = "nand";
};
pmx_sata0: pmx-sata0 {
marvell,pins = "mpp5", "mpp21", "mpp23";
marvell,function = "sata0";
@ -21,6 +27,12 @@
marvell,pins = "mpp8", "mpp9";
marvell,function = "twsi0";
};
pmx_twsi1: pmx-twsi1 {
marvell,pins = "mpp36", "mpp37";
marvell,function = "twsi1";
};
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11";
marvell,function = "uart0";
@ -30,6 +42,11 @@
marvell,pins = "mpp13", "mpp14";
marvell,function = "uart1";
};
pmx_sdio: pmx-sdio {
marvell,pins = "mpp12", "mpp13", "mpp14",
"mpp15", "mpp16", "mpp17";
marvell,function = "sdio";
};
};
i2c@11100 {

7
arch/arm/boot/dts/kirkwood-dreamplug.dts
View File

@ -74,6 +74,13 @@
status = "okay";
nr-ports = <1>;
};
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
};
gpio-leds {

94
arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts Normal file
View File

@ -0,0 +1,94 @@
/dts-v1/;
/include/ "kirkwood.dtsi"
/include/ "kirkwood-6281.dtsi"
/ {
model = "Globalscale Technologies Guruplug Server Plus";
compatible = "globalscale,guruplug-server-plus", "globalscale,guruplug", "marvell,kirkwood-88f6281", "marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
};
ocp@f1000000 {
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_led_health_r &pmx_led_health_g
&pmx_led_wmode_r &pmx_led_wmode_g >;
pinctrl-names = "default";
pmx_led_health_r: pmx-led-health-r {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
pmx_led_health_g: pmx-led-health-g {
marvell,pins = "mpp47";
marvell,function = "gpio";
};
pmx_led_wmode_r: pmx-led-wmode-r {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
pmx_led_wmode_g: pmx-led-wmode-g {
marvell,pins = "mpp49";
marvell,function = "gpio";
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
};
nand@3000000 {
status = "okay";
partition@0 {
label = "u-boot";
reg = <0x00000000 0x00100000>;
read-only;
};
partition@100000 {
label = "uImage";
reg = <0x00100000 0x00400000>;
};
partition@500000 {
label = "data";
reg = <0x00500000 0x1fb00000>;
};
};
sata@80000 {
status = "okay";
nr-ports = <1>;
};
};
gpio-leds {
compatible = "gpio-leds";
health-r {
label = "guruplug:red:health";
gpios = <&gpio1 14 1>;
};
health-g {
label = "guruplug:green:health";
gpios = <&gpio1 15 1>;
};
wmode-r {
label = "guruplug:red:wmode";
gpios = <&gpio1 16 1>;
};
wmode-g {
label = "guruplug:green:wmode";
gpios = <&gpio1 17 1>;
};
};
};

11
arch/arm/boot/dts/kirkwood-mplcec4.dts
View File

@ -20,12 +20,11 @@
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_nand &pmx_uart0
&pmx_led_health &pmx_sdio
&pmx_led_health
&pmx_sata0 &pmx_sata1
&pmx_led_user1o
&pmx_led_user1g &pmx_led_user0o
&pmx_led_user0g &pmx_led_misc
&pmx_sdio_cd
>;
pinctrl-names = "default";
@ -133,6 +132,14 @@
status = "okay";
};
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio &pmx_sdio_cd>;
pinctrl-names = "default";
status = "okay";
cd-gpios = <&gpio1 15 0>;
/* No WP GPIO */
};
};
gpio-leds {

6
arch/arm/boot/dts/kirkwood-ns2-common.dtsi
View File

@ -76,4 +76,10 @@
gpios = <&gpio0 12 0>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio0 31 0>;
};
};

126
arch/arm/boot/dts/kirkwood-nsa310.dts
View File

@ -16,6 +16,105 @@
};
ocp@f1000000 {
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_led_esata_green
&pmx_led_esata_red
&pmx_led_usb_green
&pmx_led_usb_red
&pmx_usb_power_off
&pmx_led_sys_green
&pmx_led_sys_red
&pmx_btn_reset
&pmx_btn_copy
&pmx_led_copy_green
&pmx_led_copy_red
&pmx_led_hdd_green
&pmx_led_hdd_red
&pmx_unknown
&pmx_btn_power
&pmx_pwr_off >;
pinctrl-names = "default";
pmx_led_esata_green: pmx-led-esata-green {
marvell,pins = "mpp12";
marvell,function = "gpio";
};
pmx_led_esata_red: pmx-led-esata-red {
marvell,pins = "mpp13";
marvell,function = "gpio";
};
pmx_led_usb_green: pmx-led-usb-green {
marvell,pins = "mpp15";
marvell,function = "gpio";
};
pmx_led_usb_red: pmx-led-usb-red {
marvell,pins = "mpp16";
marvell,function = "gpio";
};
pmx_usb_power_off: pmx-usb-power-off {
marvell,pins = "mpp21";
marvell,function = "gpio";
};
pmx_led_sys_green: pmx-led-sys-green {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
pmx_led_sys_red: pmx-led-sys-red {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_btn_reset: pmx-btn-reset {
marvell,pins = "mpp36";
marvell,function = "gpio";
};
pmx_btn_copy: pmx-btn-copy {
marvell,pins = "mpp37";
marvell,function = "gpio";
};
pmx_led_copy_green: pmx-led-copy-green {
marvell,pins = "mpp39";
marvell,function = "gpio";
};
pmx_led_copy_red: pmx-led-copy-red {
marvell,pins = "mpp40";
marvell,function = "gpio";
};
pmx_led_hdd_green: pmx-led-hdd-green {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
pmx_led_hdd_red: pmx-led-hdd-red {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
pmx_unknown: pmx-unknown {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
pmx_btn_power: pmx-btn-power {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
pmx_pwr_off: pmx-pwr-off {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
};
serial@12000 {
clock-frequency = <200000000>;
@ -29,6 +128,11 @@
i2c@11000 {
status = "okay";
adt7476: adt7476a@2e {
compatible = "adt7476";
reg = <0x2e>;
};
};
nand@3000000 {
@ -141,4 +245,26 @@
gpios = <&gpio1 8 0>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio1 16 0>;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
usb0_power_off: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power Off";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 21 0>;
};
};
};

116
arch/arm/boot/dts/kirkwood-openblocks_a6.dts
View File

@ -75,6 +75,122 @@
reg = <0x30>;
};
};
pinctrl: pinctrl@10000 {
pinctrl-0 = < &pmx_nand &pmx_uart0
&pmx_uart1 &pmx_twsi1
&pmx_dip_sw0 &pmx_dip_sw1
&pmx_dip_sw2 &pmx_dip_sw3
&pmx_gpio_0 &pmx_gpio_1
&pmx_gpio_2 &pmx_gpio_3
&pmx_gpio_4 &pmx_gpio_5
&pmx_gpio_6 &pmx_gpio_7
&pmx_led_red &pmx_led_green
&pmx_led_yellow >;
pinctrl-names = "default";
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp10", "mpp11", "mpp15",
"mpp16";
marvell,function = "uart0";
};
pmx_uart1: pmx-uart1 {
marvell,pins = "mpp13", "mpp14", "mpp8",
"mpp9";
marvell,function = "uart1";
};
pmx_sysrst: pmx-sysrst {
marvell,pins = "mpp6";
marvell,function = "sysrst";
};
pmx_dip_sw0: pmx-dip-sw0 {
marvell,pins = "mpp20";
marvell,function = "gpio";
};
pmx_dip_sw1: pmx-dip-sw1 {
marvell,pins = "mpp21";
marvell,function = "gpio";
};
pmx_dip_sw2: pmx-dip-sw2 {
marvell,pins = "mpp22";
marvell,function = "gpio";
};
pmx_dip_sw3: pmx-dip-sw3 {
marvell,pins = "mpp23";
marvell,function = "gpio";
};
pmx_gpio_0: pmx-gpio-0 {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_gpio_1: pmx-gpio-1 {
marvell,pins = "mpp25";
marvell,function = "gpio";
};
pmx_gpio_2: pmx-gpio-2 {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
pmx_gpio_3: pmx-gpio-3 {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
pmx_gpio_4: pmx-gpio-4 {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
pmx_gpio_5: pmx-gpio-5 {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_gpio_6: pmx-gpio-6 {
marvell,pins = "mpp30";
marvell,function = "gpio";
};
pmx_gpio_7: pmx-gpio-7 {
marvell,pins = "mpp31";
marvell,function = "gpio";
};
pmx_gpio_init: pmx-init {
marvell,pins = "mpp38";
marvell,function = "gpio";
};
pmx_usb_oc: pmx-usb-oc {
marvell,pins = "mpp39";
marvell,function = "gpio";
};
pmx_led_red: pmx-led-red {
marvell,pins = "mpp41";
marvell,function = "gpio";
};
pmx_led_green: pmx-led-green {
marvell,pins = "mpp42";
marvell,function = "gpio";
};
pmx_led_yellow: pmx-led-yellow {
marvell,pins = "mpp43";
marvell,function = "gpio";
};
};
};
gpio-leds {

102
arch/arm/boot/dts/kirkwood-topkick.dts
View File

@ -1,6 +1,7 @@
/dts-v1/;
/include/ "kirkwood.dtsi"
/include/ "kirkwood-6282.dtsi"
/ {
model = "Univeral Scientific Industrial Co. Topkick-1281P2";
@ -16,6 +17,96 @@
};
ocp@f1000000 {
pinctrl: pinctrl@10000 {
/*
* GPIO LED layout
*
* /-SYS_LED(2)
* |
* | /-DISK_LED
* | |
* | | /-WLAN_LED(2)
* | | |
* [SW] [*] [*] [*]
*/
/*
* Switch positions
*
* /-SW_LEFT(2)
* |
* | /-SW_IDLE
* | |
* | | /-SW_RIGHT
* | | |
* PS [L] [I] [R] LEDS
*/
pinctrl-0 = < &pmx_led_disk_yellow
&pmx_sata0_pwr_enable
&pmx_led_sys_red
&pmx_led_sys_blue
&pmx_led_wifi_green
&pmx_sw_left
&pmx_sw_right
&pmx_sw_idle
&pmx_sw_left2
&pmx_led_wifi_yellow
&pmx_uart0
&pmx_nand
&pmx_twsi0 >;
pinctrl-names = "default";
pmx_led_disk_yellow: pmx-led-disk-yellow {
marvell,pins = "mpp21";
marvell,function = "gpio";
};
pmx_sata0_pwr_enable: pmx-sata0-pwr-enable {
marvell,pins = "mpp36";
marvell,function = "gpio";
};
pmx_led_sys_red: pmx-led-sys-red {
marvell,pins = "mpp37";
marvell,function = "gpio";
};
pmx_led_sys_blue: pmx-led-sys-blue {
marvell,pins = "mpp38";
marvell,function = "gpio";
};
pmx_led_wifi_green: pmx-led-wifi-green {
marvell,pins = "mpp39";
marvell,function = "gpio";
};
pmx_sw_left: pmx-sw-left {
marvell,pins = "mpp43";
marvell,function = "gpio";
};
pmx_sw_right: pmx-sw-right {
marvell,pins = "mpp44";
marvell,function = "gpio";
};
pmx_sw_idle: pmx-sw-idle {
marvell,pins = "mpp45";
marvell,function = "gpio";
};
pmx_sw_left2: pmx-sw-left2 {
marvell,pins = "mpp46";
marvell,function = "gpio";
};
pmx_led_wifi_yellow: pmx-led-wifi-yellow {
marvell,pins = "mpp48";
marvell,function = "gpio";
};
};
serial@12000 {
clock-frequency = <200000000>;
status = "ok";
@ -54,6 +145,17 @@
status = "okay";
nr-ports = <1>;
};
i2c@11000 {
status = "ok";
};
mvsdio@90000 {
pinctrl-0 = <&pmx_sdio>;
pinctrl-names = "default";
status = "okay";
/* No CD or WP GPIOs */
};
};
gpio-leds {

8
arch/arm/boot/dts/kirkwood.dtsi
View File

@ -193,5 +193,13 @@
clocks = <&gate_clk 17>;
status = "okay";
};
mvsdio@90000 {
compatible = "marvell,orion-sdio";
reg = <0x90000 0x200>;
interrupts = <28>;
clocks = <&gate_clk 4>;
status = "disabled";
};
};
};

28
arch/arm/configs/dove_defconfig
View File

@ -1,26 +1,24 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_EXPERT=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_DOVE=y
CONFIG_MACH_DOVE_DB=y
CONFIG_MACH_CM_A510=y
CONFIG_MACH_DOVE_DT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_HIGHMEM=y
CONFIG_USE_OF=y
CONFIG_ATAGS=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_VFP=y
CONFIG_NET=y
CONFIG_PACKET=y
@ -32,8 +30,9 @@ CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
@ -57,7 +56,6 @@ CONFIG_ATA=y
CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_MV643XX_ETH=y
# CONFIG_NETDEV_10000 is not set
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
@ -68,10 +66,7 @@ CONFIG_LEGACY_PTY_COUNT=16
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
@ -81,13 +76,11 @@ CONFIG_SPI=y
CONFIG_SPI_ORION=y
# CONFIG_HWMON is not set
CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_DOVE=y
CONFIG_NEW_LEDS=y
@ -104,6 +97,7 @@ CONFIG_MV_XOR=y
CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y
# CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y
CONFIG_ISO9660_FS=y
CONFIG_JOLIET=y
CONFIG_UDF_FS=m
@ -112,24 +106,20 @@ CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_2=y
CONFIG_NLS_UTF8=y
CONFIG_PRINTK_TIME=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
CONFIG_TIMER_STATS=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_PCBC=m
@ -138,7 +128,6 @@ CONFIG_CRYPTO_MD4=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_TEA=y
CONFIG_CRYPTO_TWOFISH=y
@ -147,5 +136,4 @@ CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_DEV_MV_CESA=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_LIBCRC32C=y

26
arch/arm/configs/mvebu_defconfig
View File

@ -14,16 +14,20 @@ CONFIG_MACH_ARMADA_XP=y
# CONFIG_CACHE_L2X0 is not set
# CONFIG_SWP_EMULATE is not set
CONFIG_SMP=y
# CONFIG_LOCAL_TIMERS is not set
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
# CONFIG_COMPACTION is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_VFP=y
CONFIG_NET=y
CONFIG_INET=y
CONFIG_BT=y
CONFIG_BT_MRVL=y
CONFIG_BT_MRVL_SDIO=y
CONFIG_CFG80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_BLK_DEV_SD=y
CONFIG_ATA=y
@ -31,16 +35,34 @@ CONFIG_SATA_MV=y
CONFIG_NETDEVICES=y
CONFIG_MVNETA=y
CONFIG_MARVELL_PHY=y
CONFIG_MWIFIEX=y
CONFIG_MWIFIEX_SDIO=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_I2C=y
CONFIG_SPI=y
CONFIG_SPI_ORION=y
CONFIG_I2C_MV64XXX=y
CONFIG_MTD=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_M25P80=y
CONFIG_SERIAL_8250_DW=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
# CONFIG_USB_SUPPORT is not set
CONFIG_USB_SUPPORT=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_MMC=y
CONFIG_MMC_MVSDIO=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=m
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_S35390A=y
CONFIG_RTC_DRV_MV=y
CONFIG_DMADEVICES=y
CONFIG_MV_XOR=y
# CONFIG_IOMMU_SUPPORT is not set

7
arch/arm/mach-dove/Kconfig
View File

@ -2,8 +2,12 @@ if ARCH_DOVE
menu "Marvell Dove Implementations"
config DOVE_LEGACY
bool
config MACH_DOVE_DB
bool "Marvell DB-MV88AP510 Development Board"
select DOVE_LEGACY
select I2C_BOARDINFO
help
Say 'Y' here if you want your kernel to support the
@ -11,6 +15,7 @@ config MACH_DOVE_DB
config MACH_CM_A510
bool "CompuLab CM-A510 Board"
select DOVE_LEGACY
help
Say 'Y' here if you want your kernel to support the
CompuLab CM-A510 Board.
@ -19,6 +24,8 @@ config MACH_DOVE_DT
bool "Marvell Dove Flattened Device Tree"
select MVEBU_CLK_CORE
select MVEBU_CLK_GATING
select REGULATOR
select REGULATOR_FIXED_VOLTAGE
select USE_OF
help
Say 'Y' here if you want your kernel to support the

4
arch/arm/mach-dove/Makefile
View File

@ -1,4 +1,6 @@
obj-y += common.o addr-map.o irq.o mpp.o
obj-y += common.o addr-map.o irq.o
obj-$(CONFIG_DOVE_LEGACY) += mpp.o
obj-$(CONFIG_PCI) += pcie.o
obj-$(CONFIG_MACH_DOVE_DB) += dove-db-setup.o
obj-$(CONFIG_MACH_DOVE_DT) += board-dt.o
obj-$(CONFIG_MACH_CM_A510) += cm-a510.o

92
arch/arm/mach-dove/board-dt.c Normal file
View File

@ -0,0 +1,92 @@
/*
* arch/arm/mach-dove/board-dt.c
*
* Marvell Dove 88AP510 System On Chip FDT Board
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/init.h>
#include <linux/clk-provider.h>
#include <linux/clk/mvebu.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_data/usb-ehci-orion.h>
#include <asm/hardware/cache-tauros2.h>
#include <asm/mach/arch.h>
#include <mach/pm.h>
#include <plat/common.h>
#include <plat/irq.h>
#include "common.h"
/*
* There are still devices that doesn't even know about DT,
* get clock gates here and add a clock lookup.
*/
static void __init dove_legacy_clk_init(void)
{
struct device_node *np = of_find_compatible_node(NULL, NULL,
"marvell,dove-gating-clock");
struct of_phandle_args clkspec;
clkspec.np = np;
clkspec.args_count = 1;
clkspec.args[0] = CLOCK_GATING_BIT_GBE;
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
}
static void __init dove_of_clk_init(void)
{
mvebu_clocks_init();
dove_legacy_clk_init();
}
static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
};
static void __init dove_dt_init(void)
{
pr_info("Dove 88AP510 SoC\n");
#ifdef CONFIG_CACHE_TAUROS2
tauros2_init(0);
#endif
dove_setup_cpu_mbus();
/* Setup root of clk tree */
dove_of_clk_init();
/* Internal devices not ported to DT yet */
dove_ge00_init(&dove_dt_ge00_data);
dove_pcie_init(1, 1);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char * const dove_dt_board_compat[] = {
"marvell,dove",
NULL
};
DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
.map_io = dove_map_io,
.init_early = dove_init_early,
.init_irq = orion_dt_init_irq,
.init_time = dove_timer_init,
.init_machine = dove_dt_init,
.restart = dove_restart,
.dt_compat = dove_dt_board_compat,
MACHINE_END

85
arch/arm/mach-dove/common.c
View File

@ -360,88 +360,3 @@ void dove_restart(char mode, const char *cmd)
while (1)
;
}
#if defined(CONFIG_MACH_DOVE_DT)
/*
* There are still devices that doesn't even know about DT,
* get clock gates here and add a clock lookup.
*/
static void __init dove_legacy_clk_init(void)
{
struct device_node *np = of_find_compatible_node(NULL, NULL,
"marvell,dove-gating-clock");
struct of_phandle_args clkspec;
clkspec.np = np;
clkspec.args_count = 1;
clkspec.args[0] = CLOCK_GATING_BIT_USB0;
orion_clkdev_add(NULL, "orion-ehci.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_USB1;
orion_clkdev_add(NULL, "orion-ehci.1",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_GBE;
orion_clkdev_add(NULL, "mv643xx_eth_port.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
}
static void __init dove_of_clk_init(void)
{
mvebu_clocks_init();
dove_legacy_clk_init();
}
static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
};
static void __init dove_dt_init(void)
{
pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
(dove_tclk + 499999) / 1000000);
#ifdef CONFIG_CACHE_TAUROS2
tauros2_init(0);
#endif
dove_setup_cpu_mbus();
/* Setup root of clk tree */
dove_of_clk_init();
/* Internal devices not ported to DT yet */
dove_rtc_init();
dove_ge00_init(&dove_dt_ge00_data);
dove_ehci0_init();
dove_ehci1_init();
dove_pcie_init(1, 1);
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static const char * const dove_dt_board_compat[] = {
"marvell,dove",
NULL
};
DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
.map_io = dove_map_io,
.init_early = dove_init_early,
.init_irq = orion_dt_init_irq,
.init_time = dove_timer_init,
.init_machine = dove_dt_init,
.restart = dove_restart,
.dt_compat = dove_dt_board_compat,
MACHINE_END
#endif

7
arch/arm/mach-kirkwood/Kconfig
View File

@ -58,6 +58,13 @@ config ARCH_KIRKWOOD_DT
Say 'Y' here if you want your kernel to support the
Marvell Kirkwood using flattened device tree.
config MACH_GURUPLUG_DT
bool "Marvell GuruPlug Reference Board (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT
help
Say 'Y' here if you want your kernel to support the
Marvell GuruPlug Reference Board (Flattened Device Tree).
config MACH_DREAMPLUG_DT
bool "Marvell DreamPlug (Flattened Device Tree)"
select ARCH_KIRKWOOD_DT

1
arch/arm/mach-kirkwood/Makefile
View File

@ -21,6 +21,7 @@ obj-$(CONFIG_MACH_T5325) += t5325-setup.o
obj-$(CONFIG_ARCH_KIRKWOOD_DT) += board-dt.o
obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o
obj-$(CONFIG_MACH_GURUPLUG_DT) += board-guruplug.o
obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o

6
arch/arm/mach-kirkwood/board-dreamplug.c
View File

@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include <linux/platform_data/mmc-mvsdio.h>
#include "common.h"
static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
@ -26,10 +25,6 @@ static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(1),
};
static struct mvsdio_platform_data dreamplug_mvsdio_data = {
/* unfortunately the CD signal has not been connected */
};
void __init dreamplug_init(void)
{
/*
@ -37,5 +32,4 @@ void __init dreamplug_init(void)
*/
kirkwood_ge00_init(&dreamplug_ge00_data);
kirkwood_ge01_init(&dreamplug_ge01_data);
kirkwood_sdio_init(&dreamplug_mvsdio_data);
}

16
arch/arm/mach-kirkwood/board-dt.c
View File

@ -55,10 +55,6 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add("0", "pcie",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_USB0;
orion_clkdev_add(NULL, "orion-ehci.0",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_PEX1;
orion_clkdev_add("1", "pcie",
of_clk_get_from_provider(&clkspec));
@ -66,11 +62,6 @@ static void __init kirkwood_legacy_clk_init(void)
clkspec.args[0] = CGC_BIT_GE1;
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
of_clk_get_from_provider(&clkspec));
clkspec.args[0] = CGC_BIT_SDIO;
orion_clkdev_add(NULL, "mvsdio",
of_clk_get_from_provider(&clkspec));
}
static void __init kirkwood_of_clk_init(void)
@ -107,6 +98,9 @@ static void __init kirkwood_dt_init(void)
if (of_machine_is_compatible("globalscale,dreamplug"))
dreamplug_init();
if (of_machine_is_compatible("globalscale,guruplug"))
guruplug_dt_init();
if (of_machine_is_compatible("dlink,dns-kirkwood"))
dnskw_init();
@ -150,14 +144,12 @@ static void __init kirkwood_dt_init(void)
if (of_machine_is_compatible("usi,topkick"))
usi_topkick_init();
if (of_machine_is_compatible("zyxel,nsa310"))
nsa310_init();
of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL);
}
static const char * const kirkwood_dt_board_compat[] = {
"globalscale,dreamplug",
"globalscale,guruplug",
"dlink,dns-320",
"dlink,dns-325",
"iom,iconnect",

39
arch/arm/mach-kirkwood/board-guruplug.c Normal file
View File

@ -0,0 +1,39 @@
/*
* arch/arm/mach-kirkwood/board-guruplug.c
*
* Marvell Guruplug Reference Board Init for drivers not converted to
* flattened device tree yet.
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include <linux/platform_data/mmc-mvsdio.h>
#include "common.h"
static struct mv643xx_eth_platform_data guruplug_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mv643xx_eth_platform_data guruplug_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(1),
};
static struct mvsdio_platform_data guruplug_mvsdio_data = {
/* unfortunately the CD signal has not been connected */
};
void __init guruplug_dt_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_ge00_init(&guruplug_ge00_data);
kirkwood_ge01_init(&guruplug_ge01_data);
kirkwood_sdio_init(&guruplug_mvsdio_data);
}

7
arch/arm/mach-kirkwood/board-mplcec4.c
View File

@ -12,7 +12,6 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/platform_data/mmc-mvsdio.h>
#include "common.h"
static struct mv643xx_eth_platform_data mplcec4_ge00_data = {
@ -23,11 +22,6 @@ static struct mv643xx_eth_platform_data mplcec4_ge01_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(2),
};
static struct mvsdio_platform_data mplcec4_mvsdio_data = {
.gpio_card_detect = 47, /* MPP47 used as SD card detect */
};
void __init mplcec4_init(void)
{
/*
@ -35,7 +29,6 @@ void __init mplcec4_init(void)
*/
kirkwood_ge00_init(&mplcec4_ge00_data);
kirkwood_ge01_init(&mplcec4_ge01_data);
kirkwood_sdio_init(&mplcec4_mvsdio_data);
kirkwood_pcie_init(KW_PCIE0);
}

14
arch/arm/mach-kirkwood/board-ns2.c
View File

@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include <linux/of.h>
#include "common.h"
@ -23,13 +22,6 @@ static struct mv643xx_eth_platform_data ns2_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(8),
};
#define NS2_GPIO_POWER_OFF 31
static void ns2_power_off(void)
{
gpio_set_value(NS2_GPIO_POWER_OFF, 1);
}
void __init ns2_init(void)
{
/*
@ -39,10 +31,4 @@ void __init ns2_init(void)
of_machine_is_compatible("lacie,netspace_mini_v2"))
ns2_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
kirkwood_ge00_init(&ns2_ge00_data);
if (gpio_request(NS2_GPIO_POWER_OFF, "power-off") == 0 &&
gpio_direction_output(NS2_GPIO_POWER_OFF, 0) == 0)
pm_power_off = ns2_power_off;
else
pr_err("ns2: failed to configure power-off GPIO\n");
}

70
arch/arm/mach-kirkwood/board-nsa310.c
View File

@ -10,79 +10,9 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <mach/kirkwood.h>
#include <linux/of.h>
#include "common.h"
#include "mpp.h"
#define NSA310_GPIO_USB_POWER_OFF 21
#define NSA310_GPIO_POWER_OFF 48
static unsigned int nsa310_mpp_config[] __initdata = {
MPP12_GPIO, /* led esata green */
MPP13_GPIO, /* led esata red */
MPP15_GPIO, /* led usb green */
MPP16_GPIO, /* led usb red */
MPP21_GPIO, /* control usb power off */
MPP28_GPIO, /* led sys green */
MPP29_GPIO, /* led sys red */
MPP36_GPIO, /* key reset */
MPP37_GPIO, /* key copy */
MPP39_GPIO, /* led copy green */
MPP40_GPIO, /* led copy red */
MPP41_GPIO, /* led hdd green */
MPP42_GPIO, /* led hdd red */
MPP44_GPIO, /* ?? */
MPP46_GPIO, /* key power */
MPP48_GPIO, /* control power off */
0
};
static struct i2c_board_info __initdata nsa310_i2c_info[] = {
{ I2C_BOARD_INFO("adt7476", 0x2e) },
};
static void nsa310_power_off(void)
{
gpio_set_value(NSA310_GPIO_POWER_OFF, 1);
}
static int __init nsa310_gpio_request(unsigned int gpio, unsigned long flags,
const char *label)
{
int err;
err = gpio_request_one(gpio, flags, label);
if (err)
pr_err("NSA-310: can't setup GPIO%u (%s), err=%d\n",
gpio, label, err);
return err;
}
static void __init nsa310_gpio_init(void)
{
int err;
err = nsa310_gpio_request(NSA310_GPIO_POWER_OFF, GPIOF_OUT_INIT_LOW,
"Power Off");
if (!err)
pm_power_off = nsa310_power_off;
nsa310_gpio_request(NSA310_GPIO_USB_POWER_OFF, GPIOF_OUT_INIT_LOW,
"USB Power Off");
}
void __init nsa310_init(void)
{
kirkwood_mpp_conf(nsa310_mpp_config);
nsa310_gpio_init();
i2c_register_board_info(0, ARRAY_AND_SIZE(nsa310_i2c_info));
}
static int __init nsa310_pci_init(void)
{

44
arch/arm/mach-kirkwood/board-openblocks_a6.c
View File

@ -11,60 +11,16 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/clk.h>
#include <linux/clk-private.h>
#include "common.h"
#include "mpp.h"
static struct mv643xx_eth_platform_data openblocks_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static unsigned int openblocks_a6_mpp_config[] __initdata = {
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP8_UART1_RTS,
MPP9_UART1_CTS,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP13_UART1_TXD,
MPP14_UART1_RXD,
MPP15_UART0_RTS,
MPP16_UART0_CTS,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GPIO, /* DIP SW0 */
MPP21_GPIO, /* DIP SW1 */
MPP22_GPIO, /* DIP SW2 */
MPP23_GPIO, /* DIP SW3 */
MPP24_GPIO, /* GPIO 0 */
MPP25_GPIO, /* GPIO 1 */
MPP26_GPIO, /* GPIO 2 */
MPP27_GPIO, /* GPIO 3 */
MPP28_GPIO, /* GPIO 4 */
MPP29_GPIO, /* GPIO 5 */
MPP30_GPIO, /* GPIO 6 */
MPP31_GPIO, /* GPIO 7 */
MPP36_TW1_SDA,
MPP37_TW1_SCK,
MPP38_GPIO, /* INIT */
MPP39_GPIO, /* USB OC */
MPP41_GPIO, /* LED: Red */
MPP42_GPIO, /* LED: Green */
MPP43_GPIO, /* LED: Yellow */
0,
};
void __init openblocks_a6_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_mpp_conf(openblocks_a6_mpp_config);
kirkwood_ge00_init(&openblocks_ge00_data);
}

48
arch/arm/mach-kirkwood/board-usi_topkick.c
View File

@ -14,64 +14,16 @@
#include <linux/init.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include <linux/platform_data/mmc-mvsdio.h>
#include "common.h"
#include "mpp.h"
static struct mv643xx_eth_platform_data topkick_ge00_data = {
.phy_addr = MV643XX_ETH_PHY_ADDR(0),
};
static struct mvsdio_platform_data topkick_mvsdio_data = {
/* unfortunately the CD signal has not been connected */
};
/*
* GPIO LED layout
*
* /-SYS_LED(2)
* |
* | /-DISK_LED
* | |
* | | /-WLAN_LED(2)
* | | |
* [SW] [*] [*] [*]
*/
/*
* Switch positions
*
* /-SW_LEFT
* |
* | /-SW_IDLE
* | |
* | | /-SW_RIGHT
* | | |
* PS [L] [I] [R] LEDS
*/
static unsigned int topkick_mpp_config[] __initdata = {
MPP21_GPIO, /* DISK_LED (low active) - yellow */
MPP36_GPIO, /* SATA0 power enable (high active) */
MPP37_GPIO, /* SYS_LED2 (low active) - red */
MPP38_GPIO, /* SYS_LED (low active) - blue */
MPP39_GPIO, /* WLAN_LED (low active) - green */
MPP43_GPIO, /* SW_LEFT (low active) */
MPP44_GPIO, /* SW_RIGHT (low active) */
MPP45_GPIO, /* SW_IDLE (low active) */
MPP46_GPIO, /* SW_LEFT (low active) */
MPP48_GPIO, /* WLAN_LED2 (low active) - yellow */
0
};
void __init usi_topkick_init(void)
{
/*
* Basic setup. Needs to be called early.
*/
kirkwood_mpp_conf(topkick_mpp_config);
kirkwood_ge00_init(&topkick_ge00_data);
kirkwood_sdio_init(&topkick_mvsdio_data);
}

11
arch/arm/mach-kirkwood/common.h
View File

@ -60,6 +60,11 @@ void dreamplug_init(void);
#else
static inline void dreamplug_init(void) {};
#endif
#ifdef CONFIG_MACH_GURUPLUG_DT
void guruplug_dt_init(void);
#else
static inline void guruplug_dt_init(void) {};
#endif
#ifdef CONFIG_MACH_TS219_DT
void qnap_dt_ts219_init(void);
#else
@ -130,12 +135,6 @@ void ns2_init(void);
static inline void ns2_init(void) {};
#endif
#ifdef CONFIG_MACH_NSA310_DT
void nsa310_init(void);
#else
static inline void nsa310_init(void) {};
#endif
#ifdef CONFIG_MACH_OPENBLOCKS_A6_DT
void openblocks_a6_init(void);
#else

87
arch/arm/mach-mvebu/irq-armada-370-xp.c
View File

@ -34,6 +34,7 @@
#define ARMADA_370_XP_INT_CONTROL (0x00)
#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4)
#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
@ -41,28 +42,90 @@
#define ARMADA_370_XP_IN_DRBEL_MSK_OFFS (0xc)
#define ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS (0x8)
#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28)
#define ACTIVE_DOORBELLS (8)
static DEFINE_RAW_SPINLOCK(irq_controller_lock);
static void __iomem *per_cpu_int_base;
static void __iomem *main_int_base;
static struct irq_domain *armada_370_xp_mpic_domain;
/*
* In SMP mode:
* For shared global interrupts, mask/unmask global enable bit
* For CPU interrtups, mask/unmask the calling CPU's bit
*/
static void armada_370_xp_irq_mask(struct irq_data *d)
{
#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d);
if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
else
writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_SET_MASK_OFFS);
#else
writel(irqd_to_hwirq(d),
per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
#endif
}
static void armada_370_xp_irq_unmask(struct irq_data *d)
{
#ifdef CONFIG_SMP
irq_hw_number_t hwirq = irqd_to_hwirq(d);
if (hwirq > ARMADA_370_XP_MAX_PER_CPU_IRQS)
writel(hwirq, main_int_base +
ARMADA_370_XP_INT_SET_ENABLE_OFFS);
else
writel(hwirq, per_cpu_int_base +
ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
#else
writel(irqd_to_hwirq(d),
per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS);
#endif
}
#ifdef CONFIG_SMP
static int armada_xp_set_affinity(struct irq_data *d,
const struct cpumask *mask_val, bool force)
{
unsigned long reg;
unsigned long new_mask = 0;
unsigned long online_mask = 0;
unsigned long count = 0;
irq_hw_number_t hwirq = irqd_to_hwirq(d);
int cpu;
for_each_cpu(cpu, mask_val) {
new_mask |= 1 << cpu_logical_map(cpu);
count++;
}
/*
* Forbid mutlicore interrupt affinity
* This is required since the MPIC HW doesn't limit
* several CPUs from acknowledging the same interrupt.
*/
if (count > 1)
return -EINVAL;
for_each_cpu(cpu, cpu_online_mask)
online_mask |= 1 << cpu_logical_map(cpu);
raw_spin_lock(&irq_controller_lock);
reg = readl(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
reg = (reg & (~online_mask)) | new_mask;
writel(reg, main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq));
raw_spin_unlock(&irq_controller_lock);
return 0;
}
#endif
@ -82,10 +145,17 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h,
{
armada_370_xp_irq_mask(irq_get_irq_data(virq));
writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS);
irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
handle_level_irq);
irq_set_status_flags(virq, IRQ_LEVEL);
if (hw < ARMADA_370_XP_MAX_PER_CPU_IRQS) {
irq_set_percpu_devid(virq);
irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
handle_percpu_devid_irq);
} else {
irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip,
handle_level_irq);
}
set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
return 0;
@ -155,6 +225,15 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
#ifdef CONFIG_SMP
armada_xp_mpic_smp_cpu_init();
/*
* Set the default affinity from all CPUs to the boot cpu.
* This is required since the MPIC doesn't limit several CPUs
* from acknowledging the same interrupt.
*/
cpumask_clear(irq_default_affinity);
cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
#endif
return 0;
@ -173,7 +252,7 @@ asmlinkage void __exception_irq_entry armada_370_xp_handle_irq(struct pt_regs
if (irqnr > 1022)
break;
if (irqnr >= 8) {
if (irqnr > 0) {
irqnr = irq_find_mapping(armada_370_xp_mpic_domain,
irqnr);
handle_IRQ(irqnr, regs);

150
drivers/clocksource/time-armada-370-xp.c
View File

@ -27,8 +27,10 @@
#include <linux/of_address.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <asm/sched_clock.h>
#include <asm/sched_clock.h>
#include <asm/localtimer.h>
#include <linux/percpu.h>
/*
* Timer block registers.
*/
@ -49,6 +51,7 @@
#define TIMER1_RELOAD_OFF 0x0018
#define TIMER1_VAL_OFF 0x001c
#define LCL_TIMER_EVENTS_STATUS 0x0028
/* Global timers are connected to the coherency fabric clock, and the
below divider reduces their incrementing frequency. */
#define TIMER_DIVIDER_SHIFT 5
@ -57,14 +60,17 @@
/*
* SoC-specific data.
*/
static void __iomem *timer_base;
static int timer_irq;
static void __iomem *timer_base, *local_base;
static unsigned int timer_clk;
static bool timer25Mhz = true;
/*
* Number of timer ticks per jiffy.
*/
static u32 ticks_per_jiffy;
static struct clock_event_device __percpu **percpu_armada_370_xp_evt;
static u32 notrace armada_370_xp_read_sched_clock(void)
{
return ~readl(timer_base + TIMER0_VAL_OFF);
@ -78,24 +84,23 @@ armada_370_xp_clkevt_next_event(unsigned long delta,
struct clock_event_device *dev)
{
u32 u;
/*
* Clear clockevent timer interrupt.
*/
writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
/*
* Setup new clockevent timer value.
*/
writel(delta, timer_base + TIMER1_VAL_OFF);
writel(delta, local_base + TIMER0_VAL_OFF);
/*
* Enable the timer.
*/
u = readl(timer_base + TIMER_CTRL_OFF);
u = ((u & ~TIMER1_RELOAD_EN) | TIMER1_EN |
TIMER1_DIV(TIMER_DIVIDER_SHIFT));
writel(u, timer_base + TIMER_CTRL_OFF);
u = readl(local_base + TIMER_CTRL_OFF);
u = ((u & ~TIMER0_RELOAD_EN) | TIMER0_EN |
TIMER0_DIV(TIMER_DIVIDER_SHIFT));
writel(u, local_base + TIMER_CTRL_OFF);
return 0;
}
@ -107,37 +112,38 @@ armada_370_xp_clkevt_mode(enum clock_event_mode mode,
u32 u;
if (mode == CLOCK_EVT_MODE_PERIODIC) {
/*
* Setup timer to fire at 1/HZ intervals.
*/
writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
writel(ticks_per_jiffy - 1, local_base + TIMER0_RELOAD_OFF);
writel(ticks_per_jiffy - 1, local_base + TIMER0_VAL_OFF);
/*
* Enable timer.
*/
u = readl(timer_base + TIMER_CTRL_OFF);
writel((u | TIMER1_EN | TIMER1_RELOAD_EN |
TIMER1_DIV(TIMER_DIVIDER_SHIFT)),
timer_base + TIMER_CTRL_OFF);
u = readl(local_base + TIMER_CTRL_OFF);
writel((u | TIMER0_EN | TIMER0_RELOAD_EN |
TIMER0_DIV(TIMER_DIVIDER_SHIFT)),
local_base + TIMER_CTRL_OFF);
} else {
/*
* Disable timer.
*/
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
u = readl(local_base + TIMER_CTRL_OFF);
writel(u & ~TIMER0_EN, local_base + TIMER_CTRL_OFF);
/*
* ACK pending timer interrupt.
*/
writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
}
}
static struct clock_event_device armada_370_xp_clkevt = {
.name = "armada_370_xp_tick",
.name = "armada_370_xp_per_cpu_tick",
.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
.shift = 32,
.rating = 300,
@ -150,32 +156,78 @@ static irqreturn_t armada_370_xp_timer_interrupt(int irq, void *dev_id)
/*
* ACK timer interrupt and call event handler.
*/
struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
armada_370_xp_clkevt.event_handler(&armada_370_xp_clkevt);
writel(TIMER0_CLR_MASK, local_base + LCL_TIMER_EVENTS_STATUS);
evt->event_handler(evt);
return IRQ_HANDLED;
}
static struct irqaction armada_370_xp_timer_irq = {
.name = "armada_370_xp_tick",
.flags = IRQF_DISABLED | IRQF_TIMER,
.handler = armada_370_xp_timer_interrupt
/*
* Setup the local clock events for a CPU.
*/
static int __cpuinit armada_370_xp_timer_setup(struct clock_event_device *evt)
{
u32 u;
int cpu = smp_processor_id();
/* Use existing clock_event for cpu 0 */
if (!smp_processor_id())
return 0;
u = readl(local_base + TIMER_CTRL_OFF);
if (timer25Mhz)
writel(u | TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
else
writel(u & ~TIMER0_25MHZ, local_base + TIMER_CTRL_OFF);
evt->name = armada_370_xp_clkevt.name;
evt->irq = armada_370_xp_clkevt.irq;
evt->features = armada_370_xp_clkevt.features;
evt->shift = armada_370_xp_clkevt.shift;
evt->rating = armada_370_xp_clkevt.rating,
evt->set_next_event = armada_370_xp_clkevt_next_event,
evt->set_mode = armada_370_xp_clkevt_mode,
evt->cpumask = cpumask_of(cpu);
*__this_cpu_ptr(percpu_armada_370_xp_evt) = evt;
clockevents_config_and_register(evt, timer_clk, 1, 0xfffffffe);
enable_percpu_irq(evt->irq, 0);
return 0;
}
static void armada_370_xp_timer_stop(struct clock_event_device *evt)
{
evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt);
disable_percpu_irq(evt->irq);
}
static struct local_timer_ops armada_370_xp_local_timer_ops __cpuinitdata = {
.setup = armada_370_xp_timer_setup,
.stop = armada_370_xp_timer_stop,
};
void __init armada_370_xp_timer_init(void)
{
u32 u;
struct device_node *np;
unsigned int timer_clk;
int res;
np = of_find_compatible_node(NULL, NULL, "marvell,armada-370-xp-timer");
timer_base = of_iomap(np, 0);
WARN_ON(!timer_base);
local_base = of_iomap(np, 1);
if (of_find_property(np, "marvell,timer-25Mhz", NULL)) {
/* The fixed 25MHz timer is available so let's use it */
u = readl(local_base + TIMER_CTRL_OFF);
writel(u | TIMER0_25MHZ,
local_base + TIMER_CTRL_OFF);
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u | TIMER0_25MHZ | TIMER1_25MHZ,
writel(u | TIMER0_25MHZ,
timer_base + TIMER_CTRL_OFF);
timer_clk = 25000000;
} else {
@ -183,15 +235,23 @@ void __init armada_370_xp_timer_init(void)
struct clk *clk = of_clk_get(np, 0);
WARN_ON(IS_ERR(clk));
rate = clk_get_rate(clk);
u = readl(local_base + TIMER_CTRL_OFF);
writel(u & ~(TIMER0_25MHZ),
local_base + TIMER_CTRL_OFF);
u = readl(timer_base + TIMER_CTRL_OFF);
writel(u & ~(TIMER0_25MHZ | TIMER1_25MHZ),
writel(u & ~(TIMER0_25MHZ),
timer_base + TIMER_CTRL_OFF);
timer_clk = rate / TIMER_DIVIDER;
timer25Mhz = false;
}
/* We use timer 0 as clocksource, and timer 1 for
clockevents */
timer_irq = irq_of_parse_and_map(np, 1);
/*
* We use timer 0 as clocksource, and private(local) timer 0
* for clockevents
*/
armada_370_xp_clkevt.irq = irq_of_parse_and_map(np, 4);
ticks_per_jiffy = (timer_clk + HZ / 2) / HZ;
@ -216,12 +276,26 @@ void __init armada_370_xp_timer_init(void)
"armada_370_xp_clocksource",
timer_clk, 300, 32, clocksource_mmio_readl_down);
/*
* Setup clockevent timer (interrupt-driven).
*/
setup_irq(timer_irq, &armada_370_xp_timer_irq);
/* Register the clockevent on the private timer of CPU 0 */
armada_370_xp_clkevt.cpumask = cpumask_of(0);
clockevents_config_and_register(&armada_370_xp_clkevt,
timer_clk, 1, 0xfffffffe);
}
percpu_armada_370_xp_evt = alloc_percpu(struct clock_event_device *);
/*
* Setup clockevent timer (interrupt-driven).
*/
*__this_cpu_ptr(percpu_armada_370_xp_evt) = &armada_370_xp_clkevt;
res = request_percpu_irq(armada_370_xp_clkevt.irq,
armada_370_xp_timer_interrupt,
armada_370_xp_clkevt.name,
percpu_armada_370_xp_evt);
if (!res) {
enable_percpu_irq(armada_370_xp_clkevt.irq, 0);
#ifdef CONFIG_LOCAL_TIMERS
local_timer_register(&armada_370_xp_local_timer_ops);
#endif
}
}