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staging: et131x: clear up use of TRUEPHY defines
There are a large number of TRUEPHY defines in the driver, all of which are unused or unnecessary. Remove / replace these. As this results in et1310_phy_access_mii_bit() only being used for reading bits, also change it's name to et1310_phy_read_mii_bit(). Signed-off-by: Mark Einon <mark.einon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1494,10 +1494,10 @@ static int et131x_mii_write(struct et131x_adapter *adapter, u8 reg, u16 value)
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return status;
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return status;
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}
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}
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/* Still used from _mac for BIT_READ */
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static void et1310_phy_read_mii_bit(struct et131x_adapter *adapter,
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static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter,
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u16 regnum,
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u16 action, u16 regnum, u16 bitnum,
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u16 bitnum,
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u8 *value)
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u8 *value)
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{
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{
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u16 reg;
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u16 reg;
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u16 mask = 1 << bitnum;
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u16 mask = 1 << bitnum;
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@ -1505,22 +1505,7 @@ static void et1310_phy_access_mii_bit(struct et131x_adapter *adapter,
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/* Read the requested register */
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/* Read the requested register */
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et131x_mii_read(adapter, regnum, ®);
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et131x_mii_read(adapter, regnum, ®);
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switch (action) {
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*value = (reg & mask) >> bitnum;
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case TRUEPHY_BIT_READ:
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*value = (reg & mask) >> bitnum;
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break;
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case TRUEPHY_BIT_SET:
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et131x_mii_write(adapter, regnum, reg | mask);
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break;
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case TRUEPHY_BIT_CLEAR:
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et131x_mii_write(adapter, regnum, reg & ~mask);
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break;
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default:
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break;
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}
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}
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}
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static void et1310_config_flow_control(struct et131x_adapter *adapter)
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static void et1310_config_flow_control(struct et131x_adapter *adapter)
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@ -1532,27 +1517,19 @@ static void et1310_config_flow_control(struct et131x_adapter *adapter)
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} else {
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} else {
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char remote_pause, remote_async_pause;
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char remote_pause, remote_async_pause;
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et1310_phy_access_mii_bit(adapter,
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et1310_phy_read_mii_bit(adapter, 5, 10, &remote_pause);
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TRUEPHY_BIT_READ, 5, 10, &remote_pause);
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et1310_phy_read_mii_bit(adapter, 5, 11, &remote_async_pause);
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et1310_phy_access_mii_bit(adapter,
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TRUEPHY_BIT_READ, 5, 11,
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&remote_async_pause);
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if ((remote_pause == TRUEPHY_BIT_SET) &&
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if (remote_pause && remote_async_pause) {
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(remote_async_pause == TRUEPHY_BIT_SET)) {
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adapter->flowcontrol = adapter->wanted_flow;
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adapter->flowcontrol = adapter->wanted_flow;
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} else if ((remote_pause == TRUEPHY_BIT_SET) &&
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} else if (remote_pause && !remote_async_pause) {
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(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
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if (adapter->wanted_flow == FLOW_BOTH)
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if (adapter->wanted_flow == FLOW_BOTH)
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adapter->flowcontrol = FLOW_BOTH;
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adapter->flowcontrol = FLOW_BOTH;
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else
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else
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adapter->flowcontrol = FLOW_NONE;
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adapter->flowcontrol = FLOW_NONE;
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} else if ((remote_pause == TRUEPHY_BIT_CLEAR) &&
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} else if (!remote_pause && !remote_async_pause) {
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(remote_async_pause == TRUEPHY_BIT_CLEAR)) {
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adapter->flowcontrol = FLOW_NONE;
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adapter->flowcontrol = FLOW_NONE;
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} else {/* if (remote_pause == TRUEPHY_CLEAR_BIT &&
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} else {
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* remote_async_pause == TRUEPHY_SET_BIT)
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*/
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if (adapter->wanted_flow == FLOW_BOTH)
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if (adapter->wanted_flow == FLOW_BOTH)
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adapter->flowcontrol = FLOW_RXONLY;
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adapter->flowcontrol = FLOW_RXONLY;
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else
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else
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@ -1668,43 +1668,3 @@ struct address_map {
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#define LED_100TX_SHIFT 4
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#define LED_100TX_SHIFT 4
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/* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */
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/* MI Register 29 - 31: Reserved Reg(0x1D - 0x1E) */
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/* Defines for PHY access routines */
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/* Define bit operation flags */
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#define TRUEPHY_BIT_CLEAR 0
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#define TRUEPHY_BIT_SET 1
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#define TRUEPHY_BIT_READ 2
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/* Define read/write operation flags */
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#ifndef TRUEPHY_READ
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#define TRUEPHY_READ 0
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#define TRUEPHY_WRITE 1
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#define TRUEPHY_MASK 2
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#endif
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/* Define master/slave configuration values */
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#define TRUEPHY_CFG_SLAVE 0
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#define TRUEPHY_CFG_MASTER 1
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/* Define MDI/MDI-X settings */
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#define TRUEPHY_MDI 0
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#define TRUEPHY_MDIX 1
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#define TRUEPHY_AUTO_MDI_MDIX 2
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/* Define 10Base-T link polarities */
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#define TRUEPHY_POLARITY_NORMAL 0
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#define TRUEPHY_POLARITY_INVERTED 1
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/* Define auto-negotiation results */
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#define TRUEPHY_ANEG_NOT_COMPLETE 0
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#define TRUEPHY_ANEG_COMPLETE 1
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#define TRUEPHY_ANEG_DISABLED 2
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/* Define duplex advertisement flags */
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#define TRUEPHY_ADV_DUPLEX_NONE 0x00
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#define TRUEPHY_ADV_DUPLEX_FULL 0x01
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#define TRUEPHY_ADV_DUPLEX_HALF 0x02
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#define TRUEPHY_ADV_DUPLEX_BOTH \
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(TRUEPHY_ADV_DUPLEX_FULL | TRUEPHY_ADV_DUPLEX_HALF)
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