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- Address -Wmissing-prototype warnings
- Remove repeated 'the' in comments - Remove unused current_untag_mask() - Document urgent tip branch timing - Clean up MSR kernel-doc notation - Clean up paravirt_ops doc - Update Srivatsa S. Bhat's maintained areas - Remove unused extern declaration acpi_copy_wakeup_routine() -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEV76QKkVc4xCGURexaDWVMHDJkrAFAmSZ6xIACgkQaDWVMHDJ krB9aQ/+NjB4CiWLbrnOYj9QYG6p1GE7lfu2dzIDdmcNuiai8htopXys54Igy3Rq BbIoW4E0SGK5E2OD7nLe4fBA/LpsYZTwDhGUu3SiovxLOoC5qkF0Q+6aVypPJE5o q7kn0Eo9IDL1dO0EbJptFDJRjk3K5caEoyXJRelarjIfPRbDEhUFaybVRykMZN9I 4AOxrlb9WFggT4gUE4+N0kWyEqdgI9/aguavmasaG4lBHZ5JAHNQPNIa8bkVSAPL wULAzsrGp96V3tVxdjDCzD9aumk4xlJq7gk+v7mfx013dg7Cjs074Xoi2Y+TmaC7 fdIZiGPJIkNToW+nENVO7BYtACSQhXeVTGxLQO/HNTDc//ZWiIUoJT2U4qu/6e6F aAIGoLwv68H4BghS2qx6Gz+BTIfl35mcPUb75MQhu+D84QZoZWrdamCYhsvHeZzc uC3nojrb6PBOth9nJsRae+j1zpRe/DT2LvHSWPJgK6EygOAi05ZfYUll/6sb0vze IXkUrVV1BvDDVpY9/HnE8RpDCDolP0/ezK9zsw48arZtkc+Qmw2WlD/2D98E+pSb MJPelbVmpzWTaoR4jDzXJCXkWe7CQJ5uPQj5azAE9l7YvnxgCQP5xnm5sLU9eyLu RsOwRzss0+3z44x5rJi9nSxQJ0LHfTAzW8/ZmNSZGHzi0ClszK0= =N82i -----END PGP SIGNATURE----- Merge tag 'x86_cleanups_for_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 cleanups from Dave Hansen: "As usual, these are all over the map. The biggest cluster is work from Arnd to eliminate -Wmissing-prototype warnings: - Address -Wmissing-prototype warnings - Remove repeated 'the' in comments - Remove unused current_untag_mask() - Document urgent tip branch timing - Clean up MSR kernel-doc notation - Clean up paravirt_ops doc - Update Srivatsa S. Bhat's maintained areas - Remove unused extern declaration acpi_copy_wakeup_routine()" * tag 'x86_cleanups_for_6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (22 commits) x86/acpi: Remove unused extern declaration acpi_copy_wakeup_routine() Documentation: virt: Clean up paravirt_ops doc x86/mm: Remove unused current_untag_mask() x86/mm: Remove repeated word in comments x86/lib/msr: Clean up kernel-doc notation x86/platform: Avoid missing-prototype warnings for OLPC x86/mm: Add early_memremap_pgprot_adjust() prototype x86/usercopy: Include arch_wb_cache_pmem() declaration x86/vdso: Include vdso/processor.h x86/mce: Add copy_mc_fragile_handle_tail() prototype x86/fbdev: Include asm/fb.h as needed x86/hibernate: Declare global functions in suspend.h x86/entry: Add do_SYSENTER_32() prototype x86/quirks: Include linux/pnp.h for arch_pnpbios_disabled() x86/mm: Include asm/numa.h for set_highmem_pages_init() x86: Avoid missing-prototype warnings for doublefault code x86/fpu: Include asm/fpu/regset.h x86: Add dummy prototype for mk_early_pgtbl_32() x86/pci: Mark local functions as 'static' x86/ftrace: Move prepare_ftrace_return prototype to header ...
This commit is contained in:
commit
19300488c9
6
CREDITS
6
CREDITS
@ -383,6 +383,12 @@ E: tomas@nocrew.org
|
||||
W: http://tomas.nocrew.org/
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||||
D: dsp56k device driver
|
||||
|
||||
N: Srivatsa S. Bhat
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E: srivatsa@csail.mit.edu
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D: Maintainer of Generic Paravirt-Ops subsystem
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D: Maintainer of VMware hypervisor interface
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D: Maintainer of VMware virtual PTP clock driver (ptp_vmw)
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|
||||
N: Ross Biro
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||||
E: ross.biro@gmail.com
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D: Original author of the Linux networking code
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|
@ -421,6 +421,9 @@ allowing themselves a breath. Please respect that.
|
||||
The release candidate -rc1 is the starting point for new patches to be
|
||||
applied which are targeted for the next merge window.
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So called _urgent_ branches will be merged into mainline during the
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stabilization phase of each release.
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Git
|
||||
^^^
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|
@ -5,31 +5,31 @@ Paravirt_ops
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||||
============
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||||
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Linux provides support for different hypervisor virtualization technologies.
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Historically different binary kernels would be required in order to support
|
||||
different hypervisors, this restriction was removed with pv_ops.
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||||
Historically, different binary kernels would be required in order to support
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different hypervisors; this restriction was removed with pv_ops.
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||||
Linux pv_ops is a virtualization API which enables support for different
|
||||
hypervisors. It allows each hypervisor to override critical operations and
|
||||
allows a single kernel binary to run on all supported execution environments
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||||
including native machine -- without any hypervisors.
|
||||
|
||||
pv_ops provides a set of function pointers which represent operations
|
||||
corresponding to low level critical instructions and high level
|
||||
functionalities in various areas. pv-ops allows for optimizations at run
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||||
time by enabling binary patching of the low-ops critical operations
|
||||
corresponding to low-level critical instructions and high-level
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||||
functionalities in various areas. pv_ops allows for optimizations at run
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||||
time by enabling binary patching of the low-level critical operations
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||||
at boot time.
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||||
|
||||
pv_ops operations are classified into three categories:
|
||||
|
||||
- simple indirect call
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These operations correspond to high level functionality where it is
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||||
These operations correspond to high-level functionality where it is
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known that the overhead of indirect call isn't very important.
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- indirect call which allows optimization with binary patch
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Usually these operations correspond to low level critical instructions. They
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||||
Usually these operations correspond to low-level critical instructions. They
|
||||
are called frequently and are performance critical. The overhead is
|
||||
very important.
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||||
|
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- a set of macros for hand written assembly code
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Hand written assembly codes (.S files) also need paravirtualization
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because they include sensitive instructions or some of code paths in
|
||||
because they include sensitive instructions or some code paths in
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them are very performance critical.
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|
@ -15974,7 +15974,7 @@ F: include/uapi/linux/ppdev.h
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|
||||
PARAVIRT_OPS INTERFACE
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M: Juergen Gross <jgross@suse.com>
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M: Srivatsa S. Bhat (VMware) <srivatsa@csail.mit.edu>
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||||
R: Ajay Kaher <akaher@vmware.com>
|
||||
R: Alexey Makhalov <amakhalov@vmware.com>
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R: VMware PV-Drivers Reviewers <pv-drivers@vmware.com>
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||||
L: virtualization@lists.linux-foundation.org
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@ -22546,7 +22546,7 @@ S: Supported
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F: drivers/misc/vmw_balloon.c
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|
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VMWARE HYPERVISOR INTERFACE
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||||
M: Srivatsa S. Bhat (VMware) <srivatsa@csail.mit.edu>
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M: Ajay Kaher <akaher@vmware.com>
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M: Alexey Makhalov <amakhalov@vmware.com>
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R: VMware PV-Drivers Reviewers <pv-drivers@vmware.com>
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||||
L: virtualization@lists.linux-foundation.org
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@ -22573,8 +22573,8 @@ F: drivers/scsi/vmw_pvscsi.c
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F: drivers/scsi/vmw_pvscsi.h
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|
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VMWARE VIRTUAL PTP CLOCK DRIVER
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||||
M: Srivatsa S. Bhat (VMware) <srivatsa@csail.mit.edu>
|
||||
M: Deep Shah <sdeep@vmware.com>
|
||||
R: Ajay Kaher <akaher@vmware.com>
|
||||
R: Alexey Makhalov <amakhalov@vmware.com>
|
||||
R: VMware PV-Drivers Reviewers <pv-drivers@vmware.com>
|
||||
L: netdev@vger.kernel.org
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|
@ -8,6 +8,7 @@
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#include <linux/kernel.h>
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#include <linux/getcpu.h>
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#include <asm/segment.h>
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#include <vdso/processor.h>
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|
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notrace long
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__vdso_getcpu(unsigned *cpu, unsigned *node, struct getcpu_cache *unused)
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|
@ -2,6 +2,8 @@
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#ifndef _ASM_X86_DOUBLEFAULT_H
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#define _ASM_X86_DOUBLEFAULT_H
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|
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#include <linux/linkage.h>
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|
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#ifdef CONFIG_X86_32
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extern void doublefault_init_cpu_tss(void);
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#else
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@ -10,4 +12,6 @@ static inline void doublefault_init_cpu_tss(void)
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||||
}
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#endif
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||||
|
||||
asmlinkage void __noreturn doublefault_shim(void);
|
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|
||||
#endif /* _ASM_X86_DOUBLEFAULT_H */
|
||||
|
@ -106,6 +106,9 @@ struct dyn_arch_ftrace {
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|
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#ifndef __ASSEMBLY__
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|
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void prepare_ftrace_return(unsigned long ip, unsigned long *parent,
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unsigned long frame_pointer);
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|
||||
#if defined(CONFIG_FUNCTION_TRACER) && defined(CONFIG_DYNAMIC_FTRACE)
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extern void set_ftrace_ops_ro(void);
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#else
|
||||
|
@ -350,4 +350,7 @@ static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
|
||||
#endif
|
||||
|
||||
static inline void mce_hygon_feature_init(struct cpuinfo_x86 *c) { return mce_amd_feature_init(c); }
|
||||
|
||||
unsigned long copy_mc_fragile_handle_tail(char *to, char *from, unsigned len);
|
||||
|
||||
#endif /* _ASM_X86_MCE_H */
|
||||
|
@ -127,9 +127,11 @@ static inline int syscall_get_arch(struct task_struct *task)
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}
|
||||
|
||||
void do_syscall_64(struct pt_regs *regs, int nr);
|
||||
void do_int80_syscall_32(struct pt_regs *regs);
|
||||
long do_fast_syscall_32(struct pt_regs *regs);
|
||||
|
||||
#endif /* CONFIG_X86_32 */
|
||||
|
||||
void do_int80_syscall_32(struct pt_regs *regs);
|
||||
long do_fast_syscall_32(struct pt_regs *regs);
|
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long do_SYSENTER_32(struct pt_regs *regs);
|
||||
|
||||
#endif /* _ASM_X86_SYSCALL_H */
|
||||
|
@ -14,6 +14,8 @@
|
||||
#include <asm/processor-flags.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
DECLARE_PER_CPU(u64, tlbstate_untag_mask);
|
||||
|
||||
void __flush_tlb_all(void);
|
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|
||||
#define TLB_FLUSH_ALL -1UL
|
||||
@ -54,15 +56,6 @@ static inline void cr4_clear_bits(unsigned long mask)
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||||
local_irq_restore(flags);
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||||
}
|
||||
|
||||
#ifdef CONFIG_ADDRESS_MASKING
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DECLARE_PER_CPU(u64, tlbstate_untag_mask);
|
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|
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static inline u64 current_untag_mask(void)
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{
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return this_cpu_read(tlbstate_untag_mask);
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}
|
||||
#endif
|
||||
|
||||
#ifndef MODULE
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/*
|
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* 6 because 6 should be plenty and struct tlb_state will fit in two cache
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|
@ -12,7 +12,6 @@ extern int wakeup_pmode_return;
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|
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extern u8 wake_sleep_flags;
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|
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extern unsigned long acpi_copy_wakeup_routine(unsigned long);
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extern void wakeup_long64(void);
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|
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extern void do_suspend_lowlevel(void);
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|
@ -9,6 +9,7 @@
|
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#include <asm/processor.h>
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#include <asm/desc.h>
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#include <asm/traps.h>
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#include <asm/doublefault.h>
|
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|
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#define ptr_ok(x) ((x) > PAGE_OFFSET && (x) < PAGE_OFFSET + MAXMEM)
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|
||||
|
@ -525,9 +525,6 @@ static void *addr_from_call(void *ptr)
|
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return ptr + CALL_INSN_SIZE + call.disp;
|
||||
}
|
||||
|
||||
void prepare_ftrace_return(unsigned long ip, unsigned long *parent,
|
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unsigned long frame_pointer);
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|
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/*
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* If the ops->trampoline was not allocated, then it probably
|
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* has a static trampoline func, or is the ftrace caller itself.
|
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|
@ -69,6 +69,7 @@ asmlinkage __visible void __init __noreturn i386_start_kernel(void)
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* to the first kernel PMD. Note the upper half of each PMD or PTE are
|
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* always zero at this stage.
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*/
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void __init mk_early_pgtbl_32(void);
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void __init mk_early_pgtbl_32(void)
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{
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#ifdef __pa
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|
@ -1,6 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
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#include <linux/kernel.h>
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#include <linux/init.h>
|
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#include <linux/pnp.h>
|
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|
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#include <asm/setup.h>
|
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#include <asm/bios_ebda.h>
|
||||
|
@ -27,14 +27,14 @@ void msrs_free(struct msr *msrs)
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EXPORT_SYMBOL(msrs_free);
|
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|
||||
/**
|
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* Read an MSR with error handling
|
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*
|
||||
* msr_read - Read an MSR with error handling
|
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* @msr: MSR to read
|
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* @m: value to read into
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*
|
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* It returns read data only on success, otherwise it doesn't change the output
|
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* argument @m.
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*
|
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* Return: %0 for success, otherwise an error code
|
||||
*/
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static int msr_read(u32 msr, struct msr *m)
|
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{
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@ -49,10 +49,12 @@ static int msr_read(u32 msr, struct msr *m)
|
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}
|
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|
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/**
|
||||
* Write an MSR with error handling
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* msr_write - Write an MSR with error handling
|
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*
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||||
* @msr: MSR to write
|
||||
* @m: value to write
|
||||
*
|
||||
* Return: %0 for success, otherwise an error code
|
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*/
|
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static int msr_write(u32 msr, struct msr *m)
|
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{
|
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@ -88,12 +90,14 @@ static inline int __flip_bit(u32 msr, u8 bit, bool set)
|
||||
}
|
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|
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/**
|
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* Set @bit in a MSR @msr.
|
||||
* msr_set_bit - Set @bit in a MSR @msr.
|
||||
* @msr: MSR to write
|
||||
* @bit: bit number to set
|
||||
*
|
||||
* Retval:
|
||||
* < 0: An error was encountered.
|
||||
* = 0: Bit was already set.
|
||||
* > 0: Hardware accepted the MSR write.
|
||||
* Return:
|
||||
* * < 0: An error was encountered.
|
||||
* * = 0: Bit was already set.
|
||||
* * > 0: Hardware accepted the MSR write.
|
||||
*/
|
||||
int msr_set_bit(u32 msr, u8 bit)
|
||||
{
|
||||
@ -101,12 +105,14 @@ int msr_set_bit(u32 msr, u8 bit)
|
||||
}
|
||||
|
||||
/**
|
||||
* Clear @bit in a MSR @msr.
|
||||
* msr_clear_bit - Clear @bit in a MSR @msr.
|
||||
* @msr: MSR to write
|
||||
* @bit: bit number to clear
|
||||
*
|
||||
* Retval:
|
||||
* < 0: An error was encountered.
|
||||
* = 0: Bit was already cleared.
|
||||
* > 0: Hardware accepted the MSR write.
|
||||
* Return:
|
||||
* * < 0: An error was encountered.
|
||||
* * = 0: Bit was already cleared.
|
||||
* * > 0: Hardware accepted the MSR write.
|
||||
*/
|
||||
int msr_clear_bit(u32 msr, u8 bit)
|
||||
{
|
||||
|
@ -9,6 +9,7 @@
|
||||
#include <linux/export.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/highmem.h>
|
||||
#include <linux/libnvdimm.h>
|
||||
|
||||
/*
|
||||
* Zero Userspace
|
||||
|
@ -32,6 +32,7 @@
|
||||
#include <asm/traps.h>
|
||||
#include <asm/user.h>
|
||||
#include <asm/fpu/api.h>
|
||||
#include <asm/fpu/regset.h>
|
||||
|
||||
#include "fpu_system.h"
|
||||
#include "fpu_emu.h"
|
||||
|
@ -3,6 +3,7 @@
|
||||
#include <linux/export.h>
|
||||
#include <linux/swap.h> /* for totalram_pages */
|
||||
#include <linux/memblock.h>
|
||||
#include <asm/numa.h>
|
||||
|
||||
void __init set_highmem_pages_init(void)
|
||||
{
|
||||
|
@ -232,7 +232,7 @@ within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
|
||||
* points to #2, but almost all physical-to-virtual translations point to #1.
|
||||
*
|
||||
* This is so that we can have both a directmap of all physical memory *and*
|
||||
* take full advantage of the the limited (s32) immediate addressing range (2G)
|
||||
* take full advantage of the limited (s32) immediate addressing range (2G)
|
||||
* of x86_64.
|
||||
*
|
||||
* See Documentation/arch/x86/x86_64/mm.rst for more detail.
|
||||
|
@ -83,7 +83,7 @@ static void ehci_reg_read(struct sim_dev_reg *reg, u32 *value)
|
||||
*value |= 0x100;
|
||||
}
|
||||
|
||||
void sata_revid_init(struct sim_dev_reg *reg)
|
||||
static void sata_revid_init(struct sim_dev_reg *reg)
|
||||
{
|
||||
reg->sim_reg.value = 0x01060100;
|
||||
reg->sim_reg.mask = 0;
|
||||
@ -172,7 +172,7 @@ static inline void extract_bytes(u32 *value, int reg, int len)
|
||||
*value &= mask;
|
||||
}
|
||||
|
||||
int bridge_read(unsigned int devfn, int reg, int len, u32 *value)
|
||||
static int bridge_read(unsigned int devfn, int reg, int len, u32 *value)
|
||||
{
|
||||
u32 av_bridge_base, av_bridge_limit;
|
||||
int retval = 0;
|
||||
|
@ -234,7 +234,7 @@ static int __init olpc_dt_compatible_match(phandle node, const char *compat)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __init olpc_dt_fixup(void)
|
||||
static void __init olpc_dt_fixup(void)
|
||||
{
|
||||
phandle node;
|
||||
u32 board_rev;
|
||||
|
@ -10,6 +10,7 @@
|
||||
#include <linux/pci.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/vgaarb.h>
|
||||
#include <asm/fb.h>
|
||||
|
||||
int fb_is_primary_device(struct fb_info *info)
|
||||
{
|
||||
|
@ -68,6 +68,11 @@ void *devm_memremap(struct device *dev, resource_size_t offset,
|
||||
size_t size, unsigned long flags);
|
||||
void devm_memunmap(struct device *dev, void *addr);
|
||||
|
||||
/* architectures can override this */
|
||||
pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr,
|
||||
unsigned long size, pgprot_t prot);
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/*
|
||||
* The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
|
||||
|
@ -56,6 +56,8 @@ extern int olpc_ec_sci_query(u16 *sci_value);
|
||||
|
||||
extern bool olpc_ec_wakeup_available(void);
|
||||
|
||||
asmlinkage int xo1_do_sleep(u8 sleep_state);
|
||||
|
||||
#else
|
||||
|
||||
static inline int olpc_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf,
|
||||
|
@ -452,6 +452,10 @@ extern struct pbe *restore_pblist;
|
||||
int pfn_is_nosave(unsigned long pfn);
|
||||
|
||||
int hibernate_quiet_exec(int (*func)(void *data), void *data);
|
||||
int hibernate_resume_nonboot_cpu_disable(void);
|
||||
int arch_hibernation_header_save(void *addr, unsigned int max_size);
|
||||
int arch_hibernation_header_restore(void *addr);
|
||||
|
||||
#else /* CONFIG_HIBERNATION */
|
||||
static inline void register_nosave_region(unsigned long b, unsigned long e) {}
|
||||
static inline int swsusp_page_is_forbidden(struct page *p) { return 0; }
|
||||
|
@ -26,9 +26,6 @@ extern void __init hibernate_image_size_init(void);
|
||||
/* Maximum size of architecture specific data in a hibernation header */
|
||||
#define MAX_ARCH_HEADER_SIZE (sizeof(struct new_utsname) + 4)
|
||||
|
||||
extern int arch_hibernation_header_save(void *addr, unsigned int max_size);
|
||||
extern int arch_hibernation_header_restore(void *addr);
|
||||
|
||||
static inline int init_header_complete(struct swsusp_info *info)
|
||||
{
|
||||
return arch_hibernation_header_save(info, MAX_ARCH_HEADER_SIZE);
|
||||
@ -41,8 +38,6 @@ static inline const char *check_image_kernel(struct swsusp_info *info)
|
||||
}
|
||||
#endif /* CONFIG_ARCH_HIBERNATION_HEADER */
|
||||
|
||||
extern int hibernate_resume_nonboot_cpu_disable(void);
|
||||
|
||||
/*
|
||||
* Keep some memory free so that I/O operations can succeed without paging
|
||||
* [Might this be more than 4 MB?]
|
||||
|
@ -178,12 +178,6 @@ extern unsigned long highest_memmap_pfn;
|
||||
*/
|
||||
#define MAX_RECLAIM_RETRIES 16
|
||||
|
||||
/*
|
||||
* in mm/early_ioremap.c
|
||||
*/
|
||||
pgprot_t __init early_memremap_pgprot_adjust(resource_size_t phys_addr,
|
||||
unsigned long size, pgprot_t prot);
|
||||
|
||||
/*
|
||||
* in mm/vmscan.c:
|
||||
*/
|
||||
|
Loading…
Reference in New Issue
Block a user