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clk: mediatek: reset: add infra_ao reset support for MT8188
The infra_ao reset is needed for MT8188. - Add mtk_clk_rst_desc for MT8188. - Add register reset controller function for MT8188 infra_ao. - Add infra_ao_idx_map for MT8188. Signed-off-by: Runyang Chen <runyang.chen@mediatek.com> Link: https://lore.kernel.org/r/20230525075011.7032-3-runyang.chen@mediatek.com Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -5,6 +5,7 @@
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*/
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*/
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#include <dt-bindings/clock/mediatek,mt8188-clk.h>
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#include <dt-bindings/clock/mediatek,mt8188-clk.h>
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#include <dt-bindings/reset/mt8188-resets.h>
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#include <linux/clk-provider.h>
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#include <linux/clk-provider.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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@ -176,9 +177,32 @@ static const struct mtk_gate infra_ao_clks[] = {
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"infra_ao_aes_msdcfde_0p", "top_aes_msdcfde", 18),
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"infra_ao_aes_msdcfde_0p", "top_aes_msdcfde", 18),
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};
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};
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static u16 infra_ao_rst_ofs[] = {
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INFRA_RST0_SET_OFFSET,
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INFRA_RST1_SET_OFFSET,
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INFRA_RST2_SET_OFFSET,
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INFRA_RST3_SET_OFFSET,
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INFRA_RST4_SET_OFFSET,
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};
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static u16 infra_ao_idx_map[] = {
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[MT8188_INFRA_RST1_THERMAL_MCU_RST] = 1 * RST_NR_PER_BANK + 2,
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[MT8188_INFRA_RST1_THERMAL_CTRL_RST] = 1 * RST_NR_PER_BANK + 4,
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[MT8188_INFRA_RST3_PTP_CTRL_RST] = 3 * RST_NR_PER_BANK + 5,
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};
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static const struct mtk_clk_rst_desc infra_ao_rst_desc = {
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.version = MTK_RST_SET_CLR,
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.rst_bank_ofs = infra_ao_rst_ofs,
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.rst_bank_nr = ARRAY_SIZE(infra_ao_rst_ofs),
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.rst_idx_map = infra_ao_idx_map,
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.rst_idx_map_nr = ARRAY_SIZE(infra_ao_idx_map),
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};
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static const struct mtk_clk_desc infra_ao_desc = {
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static const struct mtk_clk_desc infra_ao_desc = {
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.clks = infra_ao_clks,
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.clks = infra_ao_clks,
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.num_clks = ARRAY_SIZE(infra_ao_clks),
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.num_clks = ARRAY_SIZE(infra_ao_clks),
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.rst_desc = &infra_ao_rst_desc,
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};
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};
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static const struct of_device_id of_match_clk_mt8188_infra_ao[] = {
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static const struct of_device_id of_match_clk_mt8188_infra_ao[] = {
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