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net: ti: icssg-prueth: add packet timestamping and ptp support
Add packet timestamping TS and PTP PHC clock support. For AM65x and AM64x: - IEP1 is not used - IEP0 is configured in shadow mode with 1ms cycle and shared between Linux and FW. It provides time and TS in number cycles, so special conversation in ns is required. - IEP0 shared between PRUeth ports. - IEP0 supports PPS, periodic output. - IEP0 settime() and enabling PPS required FW interraction. - RX TS provided with each packet in CPPI5 descriptor. - TX TS returned through separate ICSSG hw queues for each port. TX TS readiness is signaled by INTC IRQ. Only one packet at time can be requested for TX TS. Signed-off-by: Roger Quadros <rogerq@ti.com> Co-developed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Simon Horman <horms@kernel.org> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
c1e0230eea
commit
186734c158
@ -186,6 +186,7 @@ config CPMAC
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config TI_ICSSG_PRUETH
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tristate "TI Gigabit PRU Ethernet driver"
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select PHYLIB
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select TI_ICSS_IEP
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depends on PRU_REMOTEPROC
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depends on ARCH_K3 && OF && TI_K3_UDMA_GLUE_LAYER
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help
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@ -13,6 +13,7 @@
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#include <linux/regmap.h>
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struct icss_iep;
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extern const struct icss_iep_clockops prueth_iep_clockops;
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/* Firmware specific clock operations */
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struct icss_iep_clockops {
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@ -109,6 +109,26 @@ static void emac_get_ethtool_stats(struct net_device *ndev,
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*(data++) = emac->stats[i];
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}
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static int emac_get_ts_info(struct net_device *ndev,
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struct ethtool_ts_info *info)
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{
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struct prueth_emac *emac = netdev_priv(ndev);
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info->so_timestamping =
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SOF_TIMESTAMPING_TX_HARDWARE |
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SOF_TIMESTAMPING_TX_SOFTWARE |
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SOF_TIMESTAMPING_RX_HARDWARE |
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SOF_TIMESTAMPING_RX_SOFTWARE |
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SOF_TIMESTAMPING_SOFTWARE |
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SOF_TIMESTAMPING_RAW_HARDWARE;
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info->phc_index = icss_iep_get_ptp_clock_idx(emac->iep);
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info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
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info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | BIT(HWTSTAMP_FILTER_ALL);
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return 0;
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}
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static int emac_set_channels(struct net_device *ndev,
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struct ethtool_channels *ch)
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{
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@ -176,6 +196,7 @@ const struct ethtool_ops icssg_ethtool_ops = {
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.get_sset_count = emac_get_sset_count,
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.get_ethtool_stats = emac_get_ethtool_stats,
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.get_strings = emac_get_strings,
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.get_ts_info = emac_get_ts_info,
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.get_channels = emac_get_channels,
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.set_channels = emac_set_channels,
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.get_link_ksettings = emac_get_link_ksettings,
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@ -56,6 +56,8 @@
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/* CTRLMMR_ICSSG_RGMII_CTRL register bits */
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#define ICSSG_CTRL_RGMII_ID_MODE BIT(24)
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#define IEP_DEFAULT_CYCLE_TIME_NS 1000000 /* 1 ms */
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static void prueth_cleanup_rx_chns(struct prueth_emac *emac,
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struct prueth_rx_chn *rx_chn,
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int max_rflows)
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@ -471,6 +473,37 @@ static int prueth_dma_rx_push(struct prueth_emac *emac,
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desc_rx, desc_dma);
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}
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static u64 icssg_ts_to_ns(u32 hi_sw, u32 hi, u32 lo, u32 cycle_time_ns)
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{
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u32 iepcount_lo, iepcount_hi, hi_rollover_count;
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u64 ns;
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iepcount_lo = lo & GENMASK(19, 0);
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iepcount_hi = (hi & GENMASK(11, 0)) << 12 | lo >> 20;
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hi_rollover_count = hi >> 11;
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ns = ((u64)hi_rollover_count) << 23 | (iepcount_hi + hi_sw);
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ns = ns * cycle_time_ns + iepcount_lo;
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return ns;
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}
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static void emac_rx_timestamp(struct prueth_emac *emac,
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struct sk_buff *skb, u32 *psdata)
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{
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struct skb_shared_hwtstamps *ssh;
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u64 ns;
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u32 hi_sw = readl(emac->prueth->shram.va +
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TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET);
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ns = icssg_ts_to_ns(hi_sw, psdata[1], psdata[0],
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IEP_DEFAULT_CYCLE_TIME_NS);
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ssh = skb_hwtstamps(skb);
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memset(ssh, 0, sizeof(*ssh));
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ssh->hwtstamp = ns_to_ktime(ns);
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}
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static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)
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{
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struct prueth_rx_chn *rx_chn = &emac->rx_chns;
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@ -480,6 +513,7 @@ static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)
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struct sk_buff *skb, *new_skb;
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dma_addr_t desc_dma, buf_dma;
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void **swdata;
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u32 *psdata;
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int ret;
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ret = k3_udma_glue_pop_rx_chn(rx_chn->rx_chn, flow_id, &desc_dma);
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@ -497,6 +531,11 @@ static int emac_rx_packet(struct prueth_emac *emac, u32 flow_id)
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swdata = cppi5_hdesc_get_swdata(desc_rx);
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skb = *swdata;
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psdata = cppi5_hdesc_get_psdata(desc_rx);
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/* RX HW timestamp */
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if (emac->rx_ts_enabled)
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emac_rx_timestamp(emac, skb, psdata);
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cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
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k3_udma_glue_rx_cppi5_to_dma_addr(rx_chn->rx_chn, &buf_dma);
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pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
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@ -557,6 +596,86 @@ static void prueth_rx_cleanup(void *data, dma_addr_t desc_dma)
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dev_kfree_skb_any(skb);
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}
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static int emac_get_tx_ts(struct prueth_emac *emac,
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struct emac_tx_ts_response *rsp)
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{
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struct prueth *prueth = emac->prueth;
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int slice = prueth_emac_slice(emac);
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int addr;
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addr = icssg_queue_pop(prueth, slice == 0 ?
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ICSSG_TS_POP_SLICE0 : ICSSG_TS_POP_SLICE1);
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if (addr < 0)
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return addr;
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memcpy_fromio(rsp, prueth->shram.va + addr, sizeof(*rsp));
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/* return buffer back for to pool */
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icssg_queue_push(prueth, slice == 0 ?
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ICSSG_TS_PUSH_SLICE0 : ICSSG_TS_PUSH_SLICE1, addr);
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return 0;
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}
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static void tx_ts_work(struct prueth_emac *emac)
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{
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struct skb_shared_hwtstamps ssh;
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struct emac_tx_ts_response tsr;
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struct sk_buff *skb;
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int ret = 0;
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u32 hi_sw;
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u64 ns;
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/* There may be more than one pending requests */
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while (1) {
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ret = emac_get_tx_ts(emac, &tsr);
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if (ret) /* nothing more */
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break;
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if (tsr.cookie >= PRUETH_MAX_TX_TS_REQUESTS ||
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!emac->tx_ts_skb[tsr.cookie]) {
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netdev_err(emac->ndev, "Invalid TX TS cookie 0x%x\n",
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tsr.cookie);
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break;
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}
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skb = emac->tx_ts_skb[tsr.cookie];
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emac->tx_ts_skb[tsr.cookie] = NULL; /* free slot */
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if (!skb) {
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netdev_err(emac->ndev, "Driver Bug! got NULL skb\n");
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break;
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}
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hi_sw = readl(emac->prueth->shram.va +
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TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET);
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ns = icssg_ts_to_ns(hi_sw, tsr.hi_ts, tsr.lo_ts,
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IEP_DEFAULT_CYCLE_TIME_NS);
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memset(&ssh, 0, sizeof(ssh));
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ssh.hwtstamp = ns_to_ktime(ns);
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skb_tstamp_tx(skb, &ssh);
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dev_consume_skb_any(skb);
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if (atomic_dec_and_test(&emac->tx_ts_pending)) /* no more? */
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break;
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}
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}
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static int prueth_tx_ts_cookie_get(struct prueth_emac *emac)
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{
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int i;
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/* search and get the next free slot */
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for (i = 0; i < PRUETH_MAX_TX_TS_REQUESTS; i++) {
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if (!emac->tx_ts_skb[i]) {
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emac->tx_ts_skb[i] = ERR_PTR(-EBUSY); /* reserve slot */
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return i;
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}
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}
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return -EBUSY;
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}
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/**
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* emac_ndo_start_xmit - EMAC Transmit function
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* @skb: SKB pointer
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@ -577,6 +696,8 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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struct prueth_tx_chn *tx_chn;
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dma_addr_t desc_dma, buf_dma;
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int i, ret = 0, q_idx;
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bool in_tx_ts = 0;
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int tx_ts_cookie;
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void **swdata;
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u32 pkt_len;
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u32 *epib;
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@ -608,6 +729,18 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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epib = first_desc->epib;
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epib[0] = 0;
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epib[1] = 0;
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if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
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emac->tx_ts_enabled) {
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tx_ts_cookie = prueth_tx_ts_cookie_get(emac);
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if (tx_ts_cookie >= 0) {
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skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
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/* Request TX timestamp */
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epib[0] = (u32)tx_ts_cookie;
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epib[1] = 0x80000000; /* TX TS request */
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emac->tx_ts_skb[tx_ts_cookie] = skb_get(skb);
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in_tx_ts = 1;
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}
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}
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/* set dst tag to indicate internal qid at the firmware which is at
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* bit8..bit15. bit0..bit7 indicates port num for directed
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@ -629,7 +762,7 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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if (!next_desc) {
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netdev_err(ndev,
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"tx: failed to allocate frag. descriptor\n");
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goto free_desc_stop_q_busy;
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goto free_desc_stop_q_busy_cleanup_tx_ts;
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}
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buf_dma = skb_frag_dma_map(tx_chn->dma_dev, frag, 0, frag_size,
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@ -638,7 +771,7 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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netdev_err(ndev, "tx: Failed to map skb page\n");
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k3_cppi_desc_pool_free(tx_chn->desc_pool, next_desc);
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ret = NETDEV_TX_OK;
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goto drop_free_descs;
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goto cleanup_tx_ts;
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}
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cppi5_hdesc_reset_hbdesc(next_desc);
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@ -670,6 +803,9 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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goto drop_free_descs;
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}
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if (in_tx_ts)
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atomic_inc(&emac->tx_ts_pending);
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if (k3_cppi_desc_pool_avail(tx_chn->desc_pool) < MAX_SKB_FRAGS) {
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netif_tx_stop_queue(netif_txq);
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/* Barrier, so that stop_queue visible to other cpus */
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@ -682,6 +818,12 @@ static enum netdev_tx emac_ndo_start_xmit(struct sk_buff *skb, struct net_device
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return NETDEV_TX_OK;
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cleanup_tx_ts:
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if (in_tx_ts) {
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dev_kfree_skb_any(emac->tx_ts_skb[tx_ts_cookie]);
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emac->tx_ts_skb[tx_ts_cookie] = NULL;
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}
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drop_free_descs:
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prueth_xmit_free(tx_chn, first_desc);
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@ -694,7 +836,11 @@ drop_free_skb:
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return ret;
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free_desc_stop_q_busy:
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free_desc_stop_q_busy_cleanup_tx_ts:
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if (in_tx_ts) {
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dev_kfree_skb_any(emac->tx_ts_skb[tx_ts_cookie]);
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emac->tx_ts_skb[tx_ts_cookie] = NULL;
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}
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prueth_xmit_free(tx_chn, first_desc);
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drop_stop_q_busy:
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@ -717,6 +863,16 @@ static void prueth_tx_cleanup(void *data, dma_addr_t desc_dma)
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dev_kfree_skb_any(skb);
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}
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static irqreturn_t prueth_tx_ts_irq(int irq, void *dev_id)
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{
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struct prueth_emac *emac = dev_id;
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/* currently only TX timestamp is being returned */
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tx_ts_work(emac);
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return IRQ_HANDLED;
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}
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static irqreturn_t prueth_rx_irq(int irq, void *dev_id)
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{
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struct prueth_emac *emac = dev_id;
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@ -820,6 +976,18 @@ static void prueth_emac_stop(struct prueth_emac *emac)
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rproc_shutdown(prueth->pru[slice]);
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}
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static void prueth_cleanup_tx_ts(struct prueth_emac *emac)
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{
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int i;
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for (i = 0; i < PRUETH_MAX_TX_TS_REQUESTS; i++) {
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if (emac->tx_ts_skb[i]) {
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dev_kfree_skb_any(emac->tx_ts_skb[i]);
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emac->tx_ts_skb[i] = NULL;
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}
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}
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}
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/* called back by PHY layer if there is change in link state of hw port*/
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static void emac_adjust_link(struct net_device *ndev)
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{
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@ -881,6 +1049,7 @@ static void emac_adjust_link(struct net_device *ndev)
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netif_tx_wake_all_queues(ndev);
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} else {
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netif_tx_stop_all_queues(ndev);
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prueth_cleanup_tx_ts(emac);
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}
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}
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@ -992,6 +1161,139 @@ static int emac_phy_connect(struct prueth_emac *emac)
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return 0;
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}
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static u64 prueth_iep_gettime(void *clockops_data, struct ptp_system_timestamp *sts)
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{
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u32 hi_rollover_count, hi_rollover_count_r;
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struct prueth_emac *emac = clockops_data;
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struct prueth *prueth = emac->prueth;
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void __iomem *fw_hi_r_count_addr;
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void __iomem *fw_count_hi_addr;
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u32 iepcount_hi, iepcount_hi_r;
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unsigned long flags;
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u32 iepcount_lo;
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u64 ts = 0;
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fw_count_hi_addr = prueth->shram.va + TIMESYNC_FW_WC_COUNT_HI_SW_OFFSET_OFFSET;
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fw_hi_r_count_addr = prueth->shram.va + TIMESYNC_FW_WC_HI_ROLLOVER_COUNT_OFFSET;
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local_irq_save(flags);
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do {
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iepcount_hi = icss_iep_get_count_hi(emac->iep);
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iepcount_hi += readl(fw_count_hi_addr);
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hi_rollover_count = readl(fw_hi_r_count_addr);
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ptp_read_system_prets(sts);
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iepcount_lo = icss_iep_get_count_low(emac->iep);
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ptp_read_system_postts(sts);
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iepcount_hi_r = icss_iep_get_count_hi(emac->iep);
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iepcount_hi_r += readl(fw_count_hi_addr);
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hi_rollover_count_r = readl(fw_hi_r_count_addr);
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} while ((iepcount_hi_r != iepcount_hi) ||
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(hi_rollover_count != hi_rollover_count_r));
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local_irq_restore(flags);
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ts = ((u64)hi_rollover_count) << 23 | iepcount_hi;
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ts = ts * (u64)IEP_DEFAULT_CYCLE_TIME_NS + iepcount_lo;
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return ts;
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}
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static void prueth_iep_settime(void *clockops_data, u64 ns)
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{
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struct icssg_setclock_desc __iomem *sc_descp;
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struct prueth_emac *emac = clockops_data;
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struct icssg_setclock_desc sc_desc;
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u64 cyclecount;
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u32 cycletime;
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int timeout;
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if (!emac->fw_running)
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return;
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sc_descp = emac->prueth->shram.va + TIMESYNC_FW_WC_SETCLOCK_DESC_OFFSET;
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cycletime = IEP_DEFAULT_CYCLE_TIME_NS;
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cyclecount = ns / cycletime;
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memset(&sc_desc, 0, sizeof(sc_desc));
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sc_desc.margin = cycletime - 1000;
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sc_desc.cyclecounter0_set = cyclecount & GENMASK(31, 0);
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sc_desc.cyclecounter1_set = (cyclecount & GENMASK(63, 32)) >> 32;
|
||||
sc_desc.iepcount_set = ns % cycletime;
|
||||
sc_desc.CMP0_current = cycletime - 4; //Count from 0 to (cycle time)-4
|
||||
|
||||
memcpy_toio(sc_descp, &sc_desc, sizeof(sc_desc));
|
||||
|
||||
writeb(1, &sc_descp->request);
|
||||
|
||||
timeout = 5; /* fw should take 2-3 ms */
|
||||
while (timeout--) {
|
||||
if (readb(&sc_descp->acknowledgment))
|
||||
return;
|
||||
|
||||
usleep_range(500, 1000);
|
||||
}
|
||||
|
||||
dev_err(emac->prueth->dev, "settime timeout\n");
|
||||
}
|
||||
|
||||
static int prueth_perout_enable(void *clockops_data,
|
||||
struct ptp_perout_request *req, int on,
|
||||
u64 *cmp)
|
||||
{
|
||||
struct prueth_emac *emac = clockops_data;
|
||||
u32 reduction_factor = 0, offset = 0;
|
||||
struct timespec64 ts;
|
||||
u64 ns_period;
|
||||
|
||||
if (!on)
|
||||
return 0;
|
||||
|
||||
/* Any firmware specific stuff for PPS/PEROUT handling */
|
||||
ts.tv_sec = req->period.sec;
|
||||
ts.tv_nsec = req->period.nsec;
|
||||
ns_period = timespec64_to_ns(&ts);
|
||||
|
||||
/* f/w doesn't support period less than cycle time */
|
||||
if (ns_period < IEP_DEFAULT_CYCLE_TIME_NS)
|
||||
return -ENXIO;
|
||||
|
||||
reduction_factor = ns_period / IEP_DEFAULT_CYCLE_TIME_NS;
|
||||
offset = ns_period % IEP_DEFAULT_CYCLE_TIME_NS;
|
||||
|
||||
/* f/w requires at least 1uS within a cycle so CMP
|
||||
* can trigger after SYNC is enabled
|
||||
*/
|
||||
if (offset < 5 * NSEC_PER_USEC)
|
||||
offset = 5 * NSEC_PER_USEC;
|
||||
|
||||
/* if offset is close to cycle time then we will miss
|
||||
* the CMP event for last tick when IEP rolls over.
|
||||
* In normal mode, IEP tick is 4ns.
|
||||
* In slow compensation it could be 0ns or 8ns at
|
||||
* every slow compensation cycle.
|
||||
*/
|
||||
if (offset > IEP_DEFAULT_CYCLE_TIME_NS - 8)
|
||||
offset = IEP_DEFAULT_CYCLE_TIME_NS - 8;
|
||||
|
||||
/* we're in shadow mode so need to set upper 32-bits */
|
||||
*cmp = (u64)offset << 32;
|
||||
|
||||
writel(reduction_factor, emac->prueth->shram.va +
|
||||
TIMESYNC_FW_WC_SYNCOUT_REDUCTION_FACTOR_OFFSET);
|
||||
|
||||
writel(0, emac->prueth->shram.va +
|
||||
TIMESYNC_FW_WC_SYNCOUT_START_TIME_CYCLECOUNT_OFFSET);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct icss_iep_clockops prueth_iep_clockops = {
|
||||
.settime = prueth_iep_settime,
|
||||
.gettime = prueth_iep_gettime,
|
||||
.perout_enable = prueth_perout_enable,
|
||||
};
|
||||
|
||||
/**
|
||||
* emac_ndo_open - EMAC device open
|
||||
* @ndev: network adapter device
|
||||
@ -1066,10 +1368,20 @@ static int emac_ndo_open(struct net_device *ndev)
|
||||
|
||||
icssg_mii_update_mtu(prueth->mii_rt, slice, ndev->max_mtu);
|
||||
|
||||
if (!prueth->emacs_initialized) {
|
||||
ret = icss_iep_init(emac->iep, &prueth_iep_clockops,
|
||||
emac, IEP_DEFAULT_CYCLE_TIME_NS);
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(emac->tx_ts_irq, NULL, prueth_tx_ts_irq,
|
||||
IRQF_ONESHOT, dev_name(dev), emac);
|
||||
if (ret)
|
||||
goto stop;
|
||||
|
||||
/* Prepare RX */
|
||||
ret = prueth_prepare_rx_chan(emac, &emac->rx_chns, PRUETH_MAX_PKT_SIZE);
|
||||
if (ret)
|
||||
goto stop;
|
||||
goto free_tx_ts_irq;
|
||||
|
||||
ret = k3_udma_glue_enable_rx_chn(emac->rx_chns.rx_chn);
|
||||
if (ret)
|
||||
@ -1102,6 +1414,8 @@ reset_tx_chan:
|
||||
prueth_reset_tx_chan(emac, i, false);
|
||||
reset_rx_chn:
|
||||
prueth_reset_rx_chan(&emac->rx_chns, max_rx_flows, false);
|
||||
free_tx_ts_irq:
|
||||
free_irq(emac->tx_ts_irq, emac);
|
||||
stop:
|
||||
prueth_emac_stop(emac);
|
||||
free_rx_irq:
|
||||
@ -1173,6 +1487,14 @@ static int emac_ndo_stop(struct net_device *ndev)
|
||||
/* stop PRUs */
|
||||
prueth_emac_stop(emac);
|
||||
|
||||
if (prueth->emacs_initialized == 1)
|
||||
icss_iep_exit(emac->iep);
|
||||
|
||||
/* stop PRUs */
|
||||
prueth_emac_stop(emac);
|
||||
|
||||
free_irq(emac->tx_ts_irq, emac);
|
||||
|
||||
free_irq(emac->rx_chns.irq[rx_flow], emac);
|
||||
prueth_ndev_del_tx_napi(emac, emac->tx_ch_num);
|
||||
prueth_cleanup_tx_chns(emac);
|
||||
@ -1235,8 +1557,79 @@ static void emac_ndo_set_rx_mode(struct net_device *ndev)
|
||||
queue_work(emac->cmd_wq, &emac->rx_mode_work);
|
||||
}
|
||||
|
||||
static int emac_set_ts_config(struct net_device *ndev, struct ifreq *ifr)
|
||||
{
|
||||
struct prueth_emac *emac = netdev_priv(ndev);
|
||||
struct hwtstamp_config config;
|
||||
|
||||
if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
|
||||
return -EFAULT;
|
||||
|
||||
switch (config.tx_type) {
|
||||
case HWTSTAMP_TX_OFF:
|
||||
emac->tx_ts_enabled = 0;
|
||||
break;
|
||||
case HWTSTAMP_TX_ON:
|
||||
emac->tx_ts_enabled = 1;
|
||||
break;
|
||||
default:
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
switch (config.rx_filter) {
|
||||
case HWTSTAMP_FILTER_NONE:
|
||||
emac->rx_ts_enabled = 0;
|
||||
break;
|
||||
case HWTSTAMP_FILTER_ALL:
|
||||
case HWTSTAMP_FILTER_SOME:
|
||||
case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
|
||||
case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
|
||||
case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
|
||||
case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
|
||||
case HWTSTAMP_FILTER_PTP_V2_EVENT:
|
||||
case HWTSTAMP_FILTER_PTP_V2_SYNC:
|
||||
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
|
||||
case HWTSTAMP_FILTER_NTP_ALL:
|
||||
emac->rx_ts_enabled = 1;
|
||||
config.rx_filter = HWTSTAMP_FILTER_ALL;
|
||||
break;
|
||||
default:
|
||||
return -ERANGE;
|
||||
}
|
||||
|
||||
return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
|
||||
-EFAULT : 0;
|
||||
}
|
||||
|
||||
static int emac_get_ts_config(struct net_device *ndev, struct ifreq *ifr)
|
||||
{
|
||||
struct prueth_emac *emac = netdev_priv(ndev);
|
||||
struct hwtstamp_config config;
|
||||
|
||||
config.flags = 0;
|
||||
config.tx_type = emac->tx_ts_enabled ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
|
||||
config.rx_filter = emac->rx_ts_enabled ? HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
|
||||
|
||||
return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
|
||||
-EFAULT : 0;
|
||||
}
|
||||
|
||||
static int emac_ndo_ioctl(struct net_device *ndev, struct ifreq *ifr, int cmd)
|
||||
{
|
||||
switch (cmd) {
|
||||
case SIOCGHWTSTAMP:
|
||||
return emac_get_ts_config(ndev, ifr);
|
||||
case SIOCSHWTSTAMP:
|
||||
return emac_set_ts_config(ndev, ifr);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return phy_do_ioctl(ndev, ifr, cmd);
|
||||
}
|
||||
|
||||
@ -1316,6 +1709,7 @@ static int prueth_netdev_init(struct prueth *prueth,
|
||||
struct prueth_emac *emac;
|
||||
struct net_device *ndev;
|
||||
enum prueth_port port;
|
||||
const char *irq_name;
|
||||
enum prueth_mac mac;
|
||||
|
||||
port = prueth_node_port(eth_node);
|
||||
@ -1355,6 +1749,15 @@ static int prueth_netdev_init(struct prueth *prueth,
|
||||
|
||||
emac->tx_ch_num = 1;
|
||||
|
||||
irq_name = "tx_ts0";
|
||||
if (emac->port_id == PRUETH_PORT_MII1)
|
||||
irq_name = "tx_ts1";
|
||||
emac->tx_ts_irq = platform_get_irq_byname_optional(prueth->pdev, irq_name);
|
||||
if (emac->tx_ts_irq < 0) {
|
||||
ret = dev_err_probe(prueth->dev, emac->tx_ts_irq, "could not get tx_ts_irq\n");
|
||||
goto free;
|
||||
}
|
||||
|
||||
SET_NETDEV_DEV(ndev, prueth->dev);
|
||||
spin_lock_init(&emac->lock);
|
||||
mutex_init(&emac->cmd_lock);
|
||||
@ -1680,6 +2083,13 @@ static int prueth_probe(struct platform_device *pdev)
|
||||
dev_dbg(dev, "sram: pa %llx va %p size %zx\n", prueth->msmcram.pa,
|
||||
prueth->msmcram.va, prueth->msmcram.size);
|
||||
|
||||
prueth->iep0 = icss_iep_get_idx(np, 0);
|
||||
if (IS_ERR(prueth->iep0)) {
|
||||
ret = dev_err_probe(dev, PTR_ERR(prueth->iep0), "iep0 get failed\n");
|
||||
prueth->iep0 = NULL;
|
||||
goto free_pool;
|
||||
}
|
||||
|
||||
/* setup netdev interfaces */
|
||||
if (eth0_node) {
|
||||
ret = prueth_netdev_init(prueth, eth0_node);
|
||||
@ -1688,6 +2098,7 @@ static int prueth_probe(struct platform_device *pdev)
|
||||
eth0_node->name);
|
||||
goto netdev_exit;
|
||||
}
|
||||
prueth->emac[PRUETH_MAC0]->iep = prueth->iep0;
|
||||
}
|
||||
|
||||
if (eth1_node) {
|
||||
@ -1697,6 +2108,8 @@ static int prueth_probe(struct platform_device *pdev)
|
||||
eth1_node->name);
|
||||
goto netdev_exit;
|
||||
}
|
||||
|
||||
prueth->emac[PRUETH_MAC1]->iep = prueth->iep0;
|
||||
}
|
||||
|
||||
/* register the network devices */
|
||||
@ -1754,6 +2167,7 @@ netdev_exit:
|
||||
prueth_netdev_exit(prueth, eth_node);
|
||||
}
|
||||
|
||||
free_pool:
|
||||
gen_pool_free(prueth->sram_pool,
|
||||
(unsigned long)prueth->msmcram.va, msmc_ram_size);
|
||||
|
||||
@ -1798,6 +2212,8 @@ static void prueth_remove(struct platform_device *pdev)
|
||||
prueth_netdev_exit(prueth, eth_node);
|
||||
}
|
||||
|
||||
icss_iep_put(prueth->iep0);
|
||||
|
||||
gen_pool_free(prueth->sram_pool,
|
||||
(unsigned long)prueth->msmcram.va,
|
||||
MSMC_RAM_SIZE);
|
||||
|
@ -35,6 +35,7 @@
|
||||
#include <net/devlink.h>
|
||||
|
||||
#include "icssg_config.h"
|
||||
#include "icss_iep.h"
|
||||
#include "icssg_switch_map.h"
|
||||
|
||||
#define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
|
||||
@ -122,6 +123,8 @@ struct prueth_rx_chn {
|
||||
*/
|
||||
#define PRUETH_MAX_TX_QUEUES 4
|
||||
|
||||
#define PRUETH_MAX_TX_TS_REQUESTS 50 /* Max simultaneous TX_TS requests */
|
||||
|
||||
/* data for each emac port */
|
||||
struct prueth_emac {
|
||||
bool fw_running;
|
||||
@ -139,6 +142,9 @@ struct prueth_emac {
|
||||
struct device_node *phy_node;
|
||||
phy_interface_t phy_if;
|
||||
enum prueth_port port_id;
|
||||
struct icss_iep *iep;
|
||||
unsigned int rx_ts_enabled : 1;
|
||||
unsigned int tx_ts_enabled : 1;
|
||||
|
||||
/* DMA related */
|
||||
struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
|
||||
@ -150,7 +156,15 @@ struct prueth_emac {
|
||||
|
||||
spinlock_t lock; /* serialize access */
|
||||
|
||||
unsigned long state;
|
||||
/* TX HW Timestamping */
|
||||
/* TX TS cookie will be index to the tx_ts_skb array */
|
||||
struct sk_buff *tx_ts_skb[PRUETH_MAX_TX_TS_REQUESTS];
|
||||
atomic_t tx_ts_pending;
|
||||
int tx_ts_irq;
|
||||
|
||||
u8 cmd_seq;
|
||||
/* shutdown related */
|
||||
u32 cmd_data[4];
|
||||
struct completion cmd_complete;
|
||||
/* Mutex to serialize access to firmware command interface */
|
||||
struct mutex cmd_lock;
|
||||
@ -193,6 +207,7 @@ struct prueth_pdata {
|
||||
* @pdata: pointer to platform data for ICSSG driver
|
||||
* @icssg_hwcmdseq: seq counter or HWQ messages
|
||||
* @emacs_initialized: num of EMACs/ext ports that are up/running
|
||||
* @iep0: pointer to IEP0 device
|
||||
*/
|
||||
struct prueth {
|
||||
struct device *dev;
|
||||
@ -214,8 +229,15 @@ struct prueth {
|
||||
struct platform_device *pdev;
|
||||
struct prueth_pdata pdata;
|
||||
u8 icssg_hwcmdseq;
|
||||
|
||||
int emacs_initialized;
|
||||
struct icss_iep *iep0;
|
||||
};
|
||||
|
||||
struct emac_tx_ts_response {
|
||||
u32 reserved[2];
|
||||
u32 cookie;
|
||||
u32 lo_ts;
|
||||
u32 hi_ts;
|
||||
};
|
||||
|
||||
/* get PRUSS SLICE number from prueth_emac */
|
||||
|
Loading…
Reference in New Issue
Block a user