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iwlegacy: move some i/o helpers out of inline
This save us about 20k of text size, and should have no impact on performance as hot paths do not use much I/O. Before: text data bss dec hex filename 108512 1784 168 110464 1af80 drivers/net/wireless/iwlegacy/iwl3945.ko 165730 2164 156 168050 29072 drivers/net/wireless/iwlegacy/iwl4965.ko 91942 328 48 92318 1689e drivers/net/wireless/iwlegacy/iwlegacy.ko After: text data bss dec hex filename 95556 1784 168 97508 17ce4 drivers/net/wireless/iwlegacy/iwl3945.ko 154853 2164 156 157173 265f5 drivers/net/wireless/iwlegacy/iwl4965.ko 91634 328 48 92010 1676a drivers/net/wireless/iwlegacy/iwlegacy.ko Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Stanislaw Gruszka
John W. Linville
parent
d71be93720
commit
17d4eca643
@ -42,6 +42,167 @@
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#include "common.h"
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int
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_il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
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{
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const int interval = 10; /* microseconds */
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int t = 0;
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do {
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if ((_il_rd(il, addr) & mask) == (bits & mask))
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return t;
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udelay(interval);
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t += interval;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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EXPORT_SYMBOL(_il_poll_bit);
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void
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il_set_bit(struct il_priv *p, u32 r, u32 m)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&p->reg_lock, reg_flags);
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_il_set_bit(p, r, m);
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spin_unlock_irqrestore(&p->reg_lock, reg_flags);
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}
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EXPORT_SYMBOL(il_set_bit);
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void
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il_clear_bit(struct il_priv *p, u32 r, u32 m)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&p->reg_lock, reg_flags);
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_il_clear_bit(p, r, m);
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spin_unlock_irqrestore(&p->reg_lock, reg_flags);
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}
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EXPORT_SYMBOL(il_clear_bit);
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int
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_il_grab_nic_access(struct il_priv *il)
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{
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int ret;
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u32 val;
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/* this bit wakes up the NIC */
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_il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/*
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* These bits say the device is running, and should keep running for
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* at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
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* but they do not indicate that embedded SRAM is restored yet;
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* 3945 and 4965 have volatile SRAM, and must save/restore contents
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* to/from host DRAM when sleeping/waking for power-saving.
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* Each direction takes approximately 1/4 millisecond; with this
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* overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
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* series of register accesses are expected (e.g. reading Event Log),
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* to keep device from sleeping.
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*
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* CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
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* SRAM is okay/restored. We don't check that here because this call
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* is just for hardware register access; but GP1 MAC_SLEEP check is a
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* good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
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*
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*/
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ret =
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_il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
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(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
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CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
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if (ret < 0) {
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val = _il_rd(il, CSR_GP_CNTRL);
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IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
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_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
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return -EIO;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(_il_grab_nic_access);
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int
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il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
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{
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const int interval = 10; /* microseconds */
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int t = 0;
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do {
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if ((il_rd(il, addr) & mask) == mask)
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return t;
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udelay(interval);
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t += interval;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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EXPORT_SYMBOL(il_poll_bit);
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u32
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il_rd_prph(struct il_priv *il, u32 reg)
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{
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unsigned long reg_flags;
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u32 val;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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val = _il_rd_prph(il, reg);
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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return val;
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}
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EXPORT_SYMBOL(il_rd_prph);
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void
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il_wr_prph(struct il_priv *il, u32 addr, u32 val)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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if (!_il_grab_nic_access(il)) {
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_il_wr_prph(il, addr, val);
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_il_release_nic_access(il);
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}
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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EXPORT_SYMBOL(il_wr_prph);
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u32
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il_read_targ_mem(struct il_priv *il, u32 addr)
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{
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unsigned long reg_flags;
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u32 value;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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_il_wr(il, HBUS_TARG_MEM_RADDR, addr);
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rmb();
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value = _il_rd(il, HBUS_TARG_MEM_RDAT);
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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return value;
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}
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EXPORT_SYMBOL(il_read_targ_mem);
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void
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il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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if (!_il_grab_nic_access(il)) {
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_il_wr(il, HBUS_TARG_MEM_WADDR, addr);
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wmb();
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_il_wr(il, HBUS_TARG_MEM_WDAT, val);
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_il_release_nic_access(il);
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}
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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EXPORT_SYMBOL(il_write_targ_mem);
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const char *
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il_get_cmd_string(u8 cmd)
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{
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@ -31,6 +31,7 @@
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#include <linux/kernel.h>
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#include <linux/leds.h>
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#include <linux/wait.h>
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#include <linux/io.h>
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#include <net/mac80211.h>
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#include <net/ieee80211_radiotap.h>
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@ -2163,7 +2164,15 @@ void il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
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irqreturn_t il_isr(int irq, void *data);
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#include <linux/io.h>
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extern void il_set_bit(struct il_priv *p, u32 r, u32 m);
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extern void il_clear_bit(struct il_priv *p, u32 r, u32 m);
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extern int _il_grab_nic_access(struct il_priv *il);
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extern int _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout);
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extern int il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout);
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extern u32 il_rd_prph(struct il_priv *il, u32 reg);
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extern void il_wr_prph(struct il_priv *il, u32 addr, u32 val);
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extern u32 il_read_targ_mem(struct il_priv *il, u32 addr);
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extern void il_write_targ_mem(struct il_priv *il, u32 addr, u32 val);
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static inline void
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_il_write8(struct il_priv *il, u32 ofs, u8 val)
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@ -2184,38 +2193,6 @@ _il_rd(struct il_priv *il, u32 ofs)
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return ioread32(il->hw_base + ofs);
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}
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#define IL_POLL_INTERVAL 10 /* microseconds */
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static inline int
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_il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((_il_rd(il, addr) & mask) == (bits & mask))
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return t;
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udelay(IL_POLL_INTERVAL);
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t += IL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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static inline void
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_il_set_bit(struct il_priv *il, u32 reg, u32 mask)
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{
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_il_wr(il, reg, _il_rd(il, reg) | mask);
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}
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static inline void
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il_set_bit(struct il_priv *p, u32 r, u32 m)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&p->reg_lock, reg_flags);
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_il_set_bit(p, r, m);
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spin_unlock_irqrestore(&p->reg_lock, reg_flags);
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}
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static inline void
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_il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
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{
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@ -2223,53 +2200,9 @@ _il_clear_bit(struct il_priv *il, u32 reg, u32 mask)
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}
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static inline void
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il_clear_bit(struct il_priv *p, u32 r, u32 m)
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_il_set_bit(struct il_priv *il, u32 reg, u32 mask)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&p->reg_lock, reg_flags);
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_il_clear_bit(p, r, m);
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spin_unlock_irqrestore(&p->reg_lock, reg_flags);
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}
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static inline int
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_il_grab_nic_access(struct il_priv *il)
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{
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int ret;
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u32 val;
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/* this bit wakes up the NIC */
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_il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/*
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* These bits say the device is running, and should keep running for
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* at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
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* but they do not indicate that embedded SRAM is restored yet;
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* 3945 and 4965 have volatile SRAM, and must save/restore contents
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* to/from host DRAM when sleeping/waking for power-saving.
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* Each direction takes approximately 1/4 millisecond; with this
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* overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
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* series of register accesses are expected (e.g. reading Event Log),
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* to keep device from sleeping.
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*
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* CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
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* SRAM is okay/restored. We don't check that here because this call
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* is just for hardware register access; but GP1 MAC_SLEEP check is a
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* good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
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*
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*/
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ret =
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_il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
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(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
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CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
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if (ret < 0) {
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val = _il_rd(il, CSR_GP_CNTRL);
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IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
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_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
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return -EIO;
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}
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return 0;
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_il_wr(il, reg, _il_rd(il, reg) | mask);
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}
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static inline void
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@ -2290,7 +2223,6 @@ il_rd(struct il_priv *il, u32 reg)
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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return value;
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}
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static inline void
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@ -2306,32 +2238,6 @@ il_wr(struct il_priv *il, u32 reg, u32 value)
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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static inline void
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il_write_reg_buf(struct il_priv *il, u32 reg, u32 len, u32 * values)
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{
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u32 count = sizeof(u32);
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if (il != NULL && values != NULL) {
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for (; 0 < len; len -= count, reg += count, values++)
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il_wr(il, reg, *values);
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}
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}
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static inline int
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il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
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{
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int t = 0;
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do {
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if ((il_rd(il, addr) & mask) == mask)
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return t;
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udelay(IL_POLL_INTERVAL);
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t += IL_POLL_INTERVAL;
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} while (t < timeout);
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return -ETIMEDOUT;
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}
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static inline u32
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_il_rd_prph(struct il_priv *il, u32 reg)
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{
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@ -2340,20 +2246,6 @@ _il_rd_prph(struct il_priv *il, u32 reg)
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return _il_rd(il, HBUS_TARG_PRPH_RDAT);
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}
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static inline u32
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il_rd_prph(struct il_priv *il, u32 reg)
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{
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unsigned long reg_flags;
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u32 val;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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val = _il_rd_prph(il, reg);
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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return val;
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}
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static inline void
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_il_wr_prph(struct il_priv *il, u32 addr, u32 val)
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{
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@ -2362,22 +2254,6 @@ _il_wr_prph(struct il_priv *il, u32 addr, u32 val)
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_il_wr(il, HBUS_TARG_PRPH_WDAT, val);
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}
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static inline void
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il_wr_prph(struct il_priv *il, u32 addr, u32 val)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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if (!_il_grab_nic_access(il)) {
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_il_wr_prph(il, addr, val);
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_il_release_nic_access(il);
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}
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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#define _il_set_bits_prph(il, reg, mask) \
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_il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask))
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static inline void
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il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
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{
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@ -2385,15 +2261,11 @@ il_set_bits_prph(struct il_priv *il, u32 reg, u32 mask)
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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_il_set_bits_prph(il, reg, mask);
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_il_wr_prph(il, reg, (_il_rd_prph(il, reg) | mask));
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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#define _il_set_bits_mask_prph(il, reg, bits, mask) \
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_il_wr_prph(il, reg, \
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((_il_rd_prph(il, reg) & mask) | bits))
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static inline void
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il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
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{
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@ -2401,7 +2273,7 @@ il_set_bits_mask_prph(struct il_priv *il, u32 reg, u32 bits, u32 mask)
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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_il_set_bits_mask_prph(il, reg, bits, mask);
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_il_wr_prph(il, reg, ((_il_rd_prph(il, reg) & mask) | bits));
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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@ -2420,56 +2292,6 @@ il_clear_bits_prph(struct il_priv *il, u32 reg, u32 mask)
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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}
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static inline u32
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il_read_targ_mem(struct il_priv *il, u32 addr)
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{
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unsigned long reg_flags;
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u32 value;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
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_il_grab_nic_access(il);
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_il_wr(il, HBUS_TARG_MEM_RADDR, addr);
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rmb();
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value = _il_rd(il, HBUS_TARG_MEM_RDAT);
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_il_release_nic_access(il);
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spin_unlock_irqrestore(&il->reg_lock, reg_flags);
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return value;
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}
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static inline void
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il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
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{
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unsigned long reg_flags;
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spin_lock_irqsave(&il->reg_lock, reg_flags);
|
||||
if (!_il_grab_nic_access(il)) {
|
||||
_il_wr(il, HBUS_TARG_MEM_WADDR, addr);
|
||||
wmb();
|
||||
_il_wr(il, HBUS_TARG_MEM_WDAT, val);
|
||||
_il_release_nic_access(il);
|
||||
}
|
||||
spin_unlock_irqrestore(&il->reg_lock, reg_flags);
|
||||
}
|
||||
|
||||
static inline void
|
||||
il_write_targ_mem_buf(struct il_priv *il, u32 addr, u32 len, u32 * values)
|
||||
{
|
||||
unsigned long reg_flags;
|
||||
|
||||
spin_lock_irqsave(&il->reg_lock, reg_flags);
|
||||
if (!_il_grab_nic_access(il)) {
|
||||
_il_wr(il, HBUS_TARG_MEM_WADDR, addr);
|
||||
wmb();
|
||||
for (; 0 < len; len -= sizeof(u32), values++)
|
||||
_il_wr(il, HBUS_TARG_MEM_WDAT, *values);
|
||||
|
||||
_il_release_nic_access(il);
|
||||
}
|
||||
spin_unlock_irqrestore(&il->reg_lock, reg_flags);
|
||||
}
|
||||
|
||||
#define HW_KEY_DYNAMIC 0
|
||||
#define HW_KEY_DEFAULT 1
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user