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KVM: doc: Fix typo in doc/virtual/kvm
Correct spelling typo in Documentations/virtual/kvm Signed-off-by: Masanari Iida <standby24x7@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
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@ -2104,7 +2104,7 @@ Returns: 0 on success, -1 on error
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Allows setting an eventfd to directly trigger a guest interrupt.
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kvm_irqfd.fd specifies the file descriptor to use as the eventfd and
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kvm_irqfd.gsi specifies the irqchip pin toggled by this event. When
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an event is tiggered on the eventfd, an interrupt is injected into
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an event is triggered on the eventfd, an interrupt is injected into
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the guest using the specified gsi pin. The irqfd is removed using
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the KVM_IRQFD_FLAG_DEASSIGN flag, specifying both kvm_irqfd.fd
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and kvm_irqfd.gsi.
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@ -2115,7 +2115,7 @@ interrupts. When KVM_IRQFD_FLAG_RESAMPLE is set the user must pass an
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additional eventfd in the kvm_irqfd.resamplefd field. When operating
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in resample mode, posting of an interrupt through kvm_irq.fd asserts
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the specified gsi in the irqchip. When the irqchip is resampled, such
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as from an EOI, the gsi is de-asserted and the user is notifed via
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as from an EOI, the gsi is de-asserted and the user is notified via
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kvm_irqfd.resamplefd. It is the user's responsibility to re-queue
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the interrupt if the device making use of it still requires service.
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Note that closing the resamplefd is not sufficient to disable the
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@ -77,7 +77,7 @@ Usage example : A vcpu of a paravirtualized guest that is busywaiting in guest
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kernel mode for an event to occur (ex: a spinlock to become available) can
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execute HLT instruction once it has busy-waited for more than a threshold
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time-interval. Execution of HLT instruction would cause the hypervisor to put
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the vcpu to sleep until occurence of an appropriate event. Another vcpu of the
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the vcpu to sleep until occurrence of an appropriate event. Another vcpu of the
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same guest can wakeup the sleeping vcpu by issuing KVM_HC_KICK_CPU hypercall,
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specifying APIC ID (a1) of the vcpu to be woken up. An additional argument (a0)
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is used in the hypercall for future use.
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@ -112,7 +112,7 @@ The Dirty bit is lost in this case.
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In order to avoid this kind of issue, we always treat the spte as "volatile"
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if it can be updated out of mmu-lock, see spte_has_volatile_bits(), it means,
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the spte is always atomicly updated in this case.
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the spte is always atomically updated in this case.
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3): flush tlbs due to spte updated
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If the spte is updated from writable to readonly, we should flush all TLBs,
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@ -125,7 +125,7 @@ be flushed caused by this reason in mmu_spte_update() since this is a common
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function to update spte (present -> present).
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Since the spte is "volatile" if it can be updated out of mmu-lock, we always
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atomicly update the spte, the race caused by fast page fault can be avoided,
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atomically update the spte, the race caused by fast page fault can be avoided,
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See the comments in spte_has_volatile_bits() and mmu_spte_update().
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3. Reference
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@ -115,7 +115,7 @@ If any other bit changes in the MSR, please still use mtmsr(d).
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Patched instructions
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====================
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The "ld" and "std" instructions are transormed to "lwz" and "stw" instructions
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The "ld" and "std" instructions are transformed to "lwz" and "stw" instructions
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respectively on 32 bit systems with an added offset of 4 to accommodate for big
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endianness.
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@ -467,7 +467,7 @@ at any time. This causes problems as the passage of real time, the injection
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of machine interrupts and the associated clock sources are no longer completely
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synchronized with real time.
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This same problem can occur on native harware to a degree, as SMM mode may
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This same problem can occur on native hardware to a degree, as SMM mode may
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steal cycles from the naturally on X86 systems when SMM mode is used by the
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BIOS, but not in such an extreme fashion. However, the fact that SMM mode may
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cause similar problems to virtualization makes it a good justification for
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