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MIPS: microMIPS: Disable LL/SC and fix linker bug.
Partially revert commit e0c14a260d66ba35935600d6435940a566fe806b and turn off LL/SC when building a pure microMIPS kernel. This is a temporary fix until the cmpxchg assembly macro functions are re-written to not use the HI/LO registers in address calculations. Also add .insn in selected user access functions which would otherwise produce ISA mode jump incompatibilities. This is also a temporary fix. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
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@ -28,7 +28,11 @@
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/* #define cpu_has_prefetch ? */
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#define cpu_has_mcheck 1
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/* #define cpu_has_ejtag ? */
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#ifdef CONFIG_CPU_MICROMIPS
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#define cpu_has_llsc 0
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#else
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#define cpu_has_llsc 1
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#endif
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/* #define cpu_has_vtag_icache ? */
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/* #define cpu_has_dc_aliases ? */
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/* #define cpu_has_ic_fills_f_dc ? */
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@ -261,6 +261,7 @@ do { \
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__asm__ __volatile__( \
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"1: " insn " %1, %3 \n" \
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"2: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"3: li %0, %4 \n" \
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" j 2b \n" \
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@ -287,7 +288,9 @@ do { \
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__asm__ __volatile__( \
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"1: lw %1, (%3) \n" \
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"2: lw %D1, 4(%3) \n" \
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"3: .section .fixup,\"ax\" \n" \
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"3: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %4 \n" \
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" move %1, $0 \n" \
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" move %D1, $0 \n" \
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@ -355,6 +358,7 @@ do { \
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__asm__ __volatile__( \
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"1: " insn " %z2, %3 # __put_user_asm\n" \
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"2: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"3: li %0, %4 \n" \
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" j 2b \n" \
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@ -373,6 +377,7 @@ do { \
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"1: sw %2, (%3) # __put_user_asm_ll32 \n" \
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"2: sw %D2, 4(%3) \n" \
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"3: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %4 \n" \
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" j 3b \n" \
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@ -524,6 +529,7 @@ do { \
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__asm__ __volatile__( \
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"1: " insn " %1, %3 \n" \
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"2: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"3: li %0, %4 \n" \
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" j 2b \n" \
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@ -549,7 +555,9 @@ do { \
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"1: ulw %1, (%3) \n" \
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"2: ulw %D1, 4(%3) \n" \
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" move %0, $0 \n" \
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"3: .section .fixup,\"ax\" \n" \
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"3: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %4 \n" \
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" move %1, $0 \n" \
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" move %D1, $0 \n" \
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@ -616,6 +624,7 @@ do { \
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__asm__ __volatile__( \
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"1: " insn " %z2, %3 # __put_user_unaligned_asm\n" \
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"2: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"3: li %0, %4 \n" \
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" j 2b \n" \
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@ -634,6 +643,7 @@ do { \
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"1: sw %2, (%3) # __put_user_unaligned_asm_ll32 \n" \
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"2: sw %D2, 4(%3) \n" \
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"3: \n" \
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" .insn \n" \
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" .section .fixup,\"ax\" \n" \
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"4: li %0, %4 \n" \
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" j 3b \n" \
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