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ARM: at91: remove useless map_io

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Now that the SRAM is initialized by the mmio-sram driver, .map_io is useless.
remove it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Alexandre Belloni 2015-01-15 15:59:28 +01:00 committed by Nicolas Ferre
parent 4db0ba22da
commit 14efc54a94
9 changed files with 0 additions and 92 deletions
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6
arch/arm/mach-at91/at91rm9200.c
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@ -42,11 +42,6 @@ static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
/* --------------------------------------------------------------------
* AT91RM9200 processor initialization
* -------------------------------------------------------------------- */
static void __init at91rm9200_map_io(void)
{
/* Map peripherals */
at91_init_sram(0, AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE);
}
static void __init at91rm9200_initialize(void)
{
@ -56,6 +51,5 @@ static void __init at91rm9200_initialize(void)
AT91_SOC_START(at91rm9200)
.map_io = at91rm9200_map_io,
.init = at91rm9200_initialize,
AT91_SOC_END

27
arch/arm/mach-at91/at91sam9260.c
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@ -22,38 +22,11 @@
* AT91SAM9260 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9xe_map_io(void)
{
unsigned long sram_size;
switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
case AT91_CIDR_SRAMSIZ_32K:
sram_size = 2 * SZ_16K;
break;
case AT91_CIDR_SRAMSIZ_16K:
default:
sram_size = SZ_16K;
}
at91_init_sram(0, AT91SAM9XE_SRAM_BASE, sram_size);
}
static void __init at91sam9260_map_io(void)
{
if (cpu_is_at91sam9xe())
at91sam9xe_map_io();
else if (cpu_is_at91sam9g20())
at91_init_sram(0, AT91SAM9G20_SRAM_BASE, AT91SAM9G20_SRAM_SIZE);
else
at91_init_sram(0, AT91SAM9260_SRAM_BASE, AT91SAM9260_SRAM_SIZE);
}
static void __init at91sam9260_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9260)
.map_io = at91sam9260_map_io,
.init = at91sam9260_initialize,
AT91_SOC_END

9
arch/arm/mach-at91/at91sam9261.c
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@ -21,20 +21,11 @@
* AT91SAM9261 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9261_map_io(void)
{
if (cpu_is_at91sam9g10())
at91_init_sram(0, AT91SAM9G10_SRAM_BASE, AT91SAM9G10_SRAM_SIZE);
else
at91_init_sram(0, AT91SAM9261_SRAM_BASE, AT91SAM9261_SRAM_SIZE);
}
static void __init at91sam9261_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9261)
.map_io = at91sam9261_map_io,
.init = at91sam9261_initialize,
AT91_SOC_END

7
arch/arm/mach-at91/at91sam9263.c
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@ -20,18 +20,11 @@
* AT91SAM9263 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9263_map_io(void)
{
at91_init_sram(0, AT91SAM9263_SRAM0_BASE, AT91SAM9263_SRAM0_SIZE);
at91_init_sram(1, AT91SAM9263_SRAM1_BASE, AT91SAM9263_SRAM1_SIZE);
}
static void __init at91sam9263_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9263)
.map_io = at91sam9263_map_io,
.init = at91sam9263_initialize,
AT91_SOC_END

7
arch/arm/mach-at91/at91sam9g45.c
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@ -19,18 +19,11 @@
/* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9g45_map_io(void)
{
at91_init_sram(0, AT91SAM9G45_SRAM_BASE, AT91SAM9G45_SRAM_SIZE);
}
static void __init at91sam9g45_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9g45)
.map_io = at91sam9g45_map_io,
.init = at91sam9g45_initialize,
AT91_SOC_END

6
arch/arm/mach-at91/at91sam9n12.c
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@ -16,11 +16,5 @@
* AT91SAM9N12 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9n12_map_io(void)
{
at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
}
AT91_SOC_START(at91sam9n12)
.map_io = at91sam9n12_map_io,
AT91_SOC_END

18
arch/arm/mach-at91/at91sam9rl.c
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@ -21,29 +21,11 @@
* AT91SAM9RL processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9rl_map_io(void)
{
unsigned long sram_size;
switch (at91_soc_initdata.cidr & AT91_CIDR_SRAMSIZ) {
case AT91_CIDR_SRAMSIZ_32K:
sram_size = 2 * SZ_16K;
break;
case AT91_CIDR_SRAMSIZ_16K:
default:
sram_size = SZ_16K;
}
/* Map SRAM */
at91_init_sram(0, AT91SAM9RL_SRAM_BASE, sram_size);
}
static void __init at91sam9rl_initialize(void)
{
arm_pm_idle = at91sam9_idle;
}
AT91_SOC_START(at91sam9rl)
.map_io = at91sam9rl_map_io,
.init = at91sam9rl_initialize,
AT91_SOC_END

6
arch/arm/mach-at91/at91sam9x5.c
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@ -16,11 +16,5 @@
* AT91SAM9x5 processor initialization
* -------------------------------------------------------------------- */
static void __init at91sam9x5_map_io(void)
{
at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
}
AT91_SOC_START(at91sam9x5)
.map_io = at91sam9x5_map_io,
AT91_SOC_END

6
arch/arm/mach-at91/sama5d3.c
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@ -25,11 +25,5 @@
* AT91SAM9x5 processor initialization
* -------------------------------------------------------------------- */
static void __init sama5d3_map_io(void)
{
at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE);
}
AT91_SOC_START(sama5d3)
.map_io = sama5d3_map_io,
AT91_SOC_END