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[PATCH] powerpc: Replace VMALLOCBASE with VMALLOC_START
On ppc64, we independently define VMALLOCBASE and VMALLOC_START to be the same thing: the start of the vmalloc() area at 0xd000000000000000. VMALLOC_START is used much more widely, including in generic code, so this patch gets rid of the extraneous VMALLOCBASE. This does require moving the definitions of region IDs from page_64.h to pgtable.h, but they don't clearly belong in the former rather than the latter, anyway. While we're moving them, clean up the definitions of the REGION_IDs: - Abolish REGION_SIZE, it was only used once, to define REGION_MASK anyway - Define the specific region ids in terms of the REGION_ID() macro. - Define KERNEL_REGION_ID in terms of PAGE_OFFSET rather than KERNELBASE. It amounts to the same thing, but conceptually this is about the region of the linear mapping (which starts at PAGE_OFFSET) rather than of the kernel text itself (which is at KERNELBASE). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -18,8 +18,8 @@ const struct LparMap __attribute__((__section__(".text"))) xLparMap = {
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.xEsids = {
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{ .xKernelEsid = GET_ESID(PAGE_OFFSET),
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.xKernelVsid = KERNEL_VSID(PAGE_OFFSET), },
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{ .xKernelEsid = GET_ESID(VMALLOCBASE),
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.xKernelVsid = KERNEL_VSID(VMALLOCBASE), },
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{ .xKernelEsid = GET_ESID(VMALLOC_START),
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.xKernelVsid = KERNEL_VSID(VMALLOC_START), },
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},
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.xRanges = {
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@ -87,8 +87,8 @@ static void slb_flush_and_rebolt(void)
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/* Slot 2 - kernel stack */
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"slbmte %2,%3\n"
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"isync"
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:: "r"(mk_vsid_data(VMALLOCBASE, vflags)),
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"r"(mk_esid_data(VMALLOCBASE, 1)),
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:: "r"(mk_vsid_data(VMALLOC_START, vflags)),
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"r"(mk_esid_data(VMALLOC_START, 1)),
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"r"(mk_vsid_data(ksp_esid_data, lflags)),
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"r"(ksp_esid_data)
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: "memory");
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@ -216,7 +216,7 @@ void slb_initialize(void)
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create_slbe(PAGE_OFFSET, lflags, 0);
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/* VMALLOC space has 4K pages always for now */
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create_slbe(VMALLOCBASE, vflags, 1);
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create_slbe(VMALLOC_START, vflags, 1);
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/* We don't bolt the stack for the time being - we're in boot,
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* so the stack is in the bolted segment. By the time it goes
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@ -25,16 +25,6 @@
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*/
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#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
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#define REGION_SIZE 4UL
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#define REGION_SHIFT 60UL
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#define REGION_MASK (((1UL<<REGION_SIZE)-1UL)<<REGION_SHIFT)
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#define VMALLOCBASE ASM_CONST(0xD000000000000000)
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#define VMALLOC_REGION_ID (VMALLOCBASE >> REGION_SHIFT)
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#define KERNEL_REGION_ID (KERNELBASE >> REGION_SHIFT)
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#define USER_REGION_ID (0UL)
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#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
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/* Segment size */
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#define SID_SHIFT 28
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#define SID_MASK 0xfffffffffUL
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@ -57,6 +57,17 @@ struct mm_struct;
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#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */
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#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE)
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/*
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* Region IDs
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*/
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#define REGION_SHIFT 60UL
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#define REGION_MASK (0xfUL << REGION_SHIFT)
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#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
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#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
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#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
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#define USER_REGION_ID (0UL)
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/*
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* Common bits in a linux-style PTE. These match the bits in the
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* (hardware-defined) PowerPC PTE as closely as possible. Additional
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