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Merge branch 'icc-qos' into icc-next
* icc-qos interconnect: qcom: rpm: Rename icc desc clocks to bus_blocks interconnect: qcom: rpm: Rename icc provider num_clocks to num_bus_clocks interconnect: qcom: rpm: Drop unused parameters interconnect: qcom: rpm: Set QoS registers only once interconnect: qcom: rpm: Handle interface clocks interconnect: qcom: icc-rpm: Enforce 2 or 0 bus clocks interconnect: qcom: rpm: Don't use clk_get_optional for bus clocks anymore interconnect: qcom: msm8996: Promote to core_initcall interconnect: qcom: rpm: allocate enough data in probe() Link: https://lore.kernel.org/r/20230228-topic-qos-v8-0-ee696a2c15a9@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Georgi Djakov
commit
1400725e45
@ -50,7 +50,7 @@
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#define NOC_QOS_MODE_FIXED_VAL 0x0
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#define NOC_QOS_MODE_BYPASS_VAL 0x2
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static int qcom_icc_set_qnoc_qos(struct icc_node *src, u64 max_bw)
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static int qcom_icc_set_qnoc_qos(struct icc_node *src)
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{
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struct icc_provider *provider = src->provider;
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struct qcom_icc_provider *qp = to_qcom_provider(provider);
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@ -95,7 +95,7 @@ static int qcom_icc_bimc_set_qos_health(struct qcom_icc_provider *qp,
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mask, val);
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}
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static int qcom_icc_set_bimc_qos(struct icc_node *src, u64 max_bw)
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static int qcom_icc_set_bimc_qos(struct icc_node *src)
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{
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struct qcom_icc_provider *qp;
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struct qcom_icc_node *qn;
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@ -150,7 +150,7 @@ static int qcom_icc_noc_set_qos_priority(struct qcom_icc_provider *qp,
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NOC_QOS_PRIORITY_P0_MASK, qos->prio_level);
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}
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static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw)
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static int qcom_icc_set_noc_qos(struct icc_node *src)
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{
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struct qcom_icc_provider *qp;
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struct qcom_icc_node *qn;
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@ -187,7 +187,7 @@ static int qcom_icc_set_noc_qos(struct icc_node *src, u64 max_bw)
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NOC_QOS_MODEn_MASK, mode);
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}
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static int qcom_icc_qos_set(struct icc_node *node, u64 sum_bw)
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static int qcom_icc_qos_set(struct icc_node *node)
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{
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struct qcom_icc_provider *qp = to_qcom_provider(node->provider);
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struct qcom_icc_node *qn = node->data;
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@ -196,38 +196,41 @@ static int qcom_icc_qos_set(struct icc_node *node, u64 sum_bw)
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switch (qp->type) {
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case QCOM_ICC_BIMC:
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return qcom_icc_set_bimc_qos(node, sum_bw);
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return qcom_icc_set_bimc_qos(node);
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case QCOM_ICC_QNOC:
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return qcom_icc_set_qnoc_qos(node, sum_bw);
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return qcom_icc_set_qnoc_qos(node);
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default:
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return qcom_icc_set_noc_qos(node, sum_bw);
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return qcom_icc_set_noc_qos(node);
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}
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}
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static int qcom_icc_rpm_set(int mas_rpm_id, int slv_rpm_id, u64 sum_bw)
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static int qcom_icc_rpm_set(struct qcom_icc_node *qn, u64 sum_bw)
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{
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int ret = 0;
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if (mas_rpm_id != -1) {
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if (qn->qos.ap_owned)
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return 0;
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if (qn->mas_rpm_id != -1) {
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ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE,
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RPM_BUS_MASTER_REQ,
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mas_rpm_id,
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qn->mas_rpm_id,
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sum_bw);
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if (ret) {
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pr_err("qcom_icc_rpm_smd_send mas %d error %d\n",
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mas_rpm_id, ret);
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qn->mas_rpm_id, ret);
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return ret;
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}
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}
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if (slv_rpm_id != -1) {
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if (qn->slv_rpm_id != -1) {
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ret = qcom_icc_rpm_smd_send(QCOM_SMD_RPM_ACTIVE_STATE,
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RPM_BUS_SLAVE_REQ,
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slv_rpm_id,
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qn->slv_rpm_id,
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sum_bw);
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if (ret) {
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pr_err("qcom_icc_rpm_smd_send slv %d error %d\n",
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slv_rpm_id, ret);
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qn->slv_rpm_id, ret);
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return ret;
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}
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}
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@ -235,26 +238,6 @@ static int qcom_icc_rpm_set(int mas_rpm_id, int slv_rpm_id, u64 sum_bw)
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return ret;
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}
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static int __qcom_icc_set(struct icc_node *n, struct qcom_icc_node *qn,
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u64 sum_bw)
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{
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int ret;
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if (!qn->qos.ap_owned) {
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/* send bandwidth request message to the RPM processor */
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ret = qcom_icc_rpm_set(qn->mas_rpm_id, qn->slv_rpm_id, sum_bw);
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if (ret)
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return ret;
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} else if (qn->qos.qos_mode != NOC_QOS_MODE_INVALID) {
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/* set bandwidth directly from the AP */
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ret = qcom_icc_qos_set(n, sum_bw);
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if (ret)
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return ret;
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}
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return 0;
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}
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/**
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* qcom_icc_pre_bw_aggregate - cleans up values before re-aggregate requests
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* @node: icc node to operate on
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@ -370,16 +353,17 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
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sum_bw = icc_units_to_bps(max_agg_avg);
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ret = __qcom_icc_set(src, src_qn, sum_bw);
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ret = qcom_icc_rpm_set(src_qn, sum_bw);
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if (ret)
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return ret;
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if (dst_qn) {
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ret = __qcom_icc_set(dst, dst_qn, sum_bw);
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ret = qcom_icc_rpm_set(dst_qn, sum_bw);
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if (ret)
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return ret;
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}
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for (i = 0; i < qp->num_clks; i++) {
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for (i = 0; i < qp->num_bus_clks; i++) {
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/*
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* Use WAKE bucket for active clock, otherwise, use SLEEP bucket
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* for other clocks. If a platform doesn't set interconnect
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@ -425,7 +409,7 @@ int qnoc_probe(struct platform_device *pdev)
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struct qcom_icc_provider *qp;
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struct icc_node *node;
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size_t num_nodes, i;
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const char * const *cds;
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const char * const *cds = NULL;
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int cd_num;
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int ret;
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@ -440,21 +424,20 @@ int qnoc_probe(struct platform_device *pdev)
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qnodes = desc->nodes;
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num_nodes = desc->num_nodes;
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if (desc->num_clocks) {
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cds = desc->clocks;
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cd_num = desc->num_clocks;
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if (desc->num_intf_clocks) {
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cds = desc->intf_clocks;
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cd_num = desc->num_intf_clocks;
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} else {
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cds = bus_clocks;
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cd_num = ARRAY_SIZE(bus_clocks);
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/* 0 intf clocks is perfectly fine */
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cd_num = 0;
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}
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qp = devm_kzalloc(dev, struct_size(qp, bus_clks, cd_num), GFP_KERNEL);
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qp = devm_kzalloc(dev, sizeof(*qp), GFP_KERNEL);
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if (!qp)
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return -ENOMEM;
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qp->bus_clk_rate = devm_kcalloc(dev, cd_num, sizeof(*qp->bus_clk_rate),
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GFP_KERNEL);
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if (!qp->bus_clk_rate)
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qp->intf_clks = devm_kcalloc(dev, cd_num, sizeof(*qp->intf_clks), GFP_KERNEL);
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if (!qp->intf_clks)
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return -ENOMEM;
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data = devm_kzalloc(dev, struct_size(data, nodes, num_nodes),
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@ -462,9 +445,13 @@ int qnoc_probe(struct platform_device *pdev)
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if (!data)
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return -ENOMEM;
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qp->num_intf_clks = cd_num;
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for (i = 0; i < cd_num; i++)
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qp->bus_clks[i].id = cds[i];
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qp->num_clks = cd_num;
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qp->intf_clks[i].id = cds[i];
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qp->num_bus_clks = desc->no_clk_scaling ? 0 : NUM_BUS_CLKS;
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for (i = 0; i < qp->num_bus_clks; i++)
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qp->bus_clks[i].id = bus_clocks[i];
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qp->type = desc->type;
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qp->qos_offset = desc->qos_offset;
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@ -494,11 +481,15 @@ int qnoc_probe(struct platform_device *pdev)
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}
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regmap_done:
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ret = devm_clk_bulk_get_optional(dev, qp->num_clks, qp->bus_clks);
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ret = devm_clk_bulk_get(dev, qp->num_bus_clks, qp->bus_clks);
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if (ret)
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return ret;
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ret = clk_bulk_prepare_enable(qp->num_clks, qp->bus_clks);
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ret = clk_bulk_prepare_enable(qp->num_bus_clks, qp->bus_clks);
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if (ret)
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return ret;
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ret = devm_clk_bulk_get(dev, qp->num_intf_clks, qp->intf_clks);
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if (ret)
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return ret;
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@ -512,6 +503,11 @@ regmap_done:
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icc_provider_init(provider);
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/* If this fails, bus accesses will crash the platform! */
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ret = clk_bulk_prepare_enable(qp->num_intf_clks, qp->intf_clks);
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if (ret)
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return ret;
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for (i = 0; i < num_nodes; i++) {
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size_t j;
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@ -528,10 +524,20 @@ regmap_done:
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for (j = 0; j < qnodes[i]->num_links; j++)
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icc_link_create(node, qnodes[i]->links[j]);
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/* Set QoS registers (we only need to do it once, generally) */
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if (qnodes[i]->qos.ap_owned &&
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qnodes[i]->qos.qos_mode != NOC_QOS_MODE_INVALID) {
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ret = qcom_icc_qos_set(node);
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if (ret)
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return ret;
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}
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data->nodes[i] = node;
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}
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data->num_nodes = num_nodes;
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clk_bulk_disable_unprepare(qp->num_intf_clks, qp->intf_clks);
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ret = icc_provider_register(provider);
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if (ret)
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goto err_remove_nodes;
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@ -551,7 +557,7 @@ err_deregister_provider:
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icc_provider_deregister(provider);
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err_remove_nodes:
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icc_nodes_remove(provider);
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clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks);
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clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks);
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return ret;
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}
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@ -563,7 +569,7 @@ int qnoc_remove(struct platform_device *pdev)
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icc_provider_deregister(&qp->provider);
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icc_nodes_remove(&qp->provider);
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clk_bulk_disable_unprepare(qp->num_clks, qp->bus_clks);
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clk_bulk_disable_unprepare(qp->num_bus_clks, qp->bus_clks);
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return 0;
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}
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@ -20,24 +20,32 @@ enum qcom_icc_type {
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QCOM_ICC_QNOC,
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};
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#define NUM_BUS_CLKS 2
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/**
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* struct qcom_icc_provider - Qualcomm specific interconnect provider
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* @provider: generic interconnect provider
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* @num_clks: the total number of clk_bulk_data entries
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* @num_bus_clks: the total number of bus_clks clk_bulk_data entries (0 or 2)
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* @num_intf_clks: the total number of intf_clks clk_bulk_data entries
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* @type: the ICC provider type
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* @regmap: regmap for QoS registers read/write access
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* @qos_offset: offset to QoS registers
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* @bus_clk_rate: bus clock rate in Hz
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* @bus_clks: the clk_bulk_data table of bus clocks
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* @intf_clks: a clk_bulk_data array of interface clocks
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* @is_on: whether the bus is powered on
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*/
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struct qcom_icc_provider {
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struct icc_provider provider;
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int num_clks;
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int num_bus_clks;
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int num_intf_clks;
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enum qcom_icc_type type;
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struct regmap *regmap;
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unsigned int qos_offset;
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u64 *bus_clk_rate;
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struct clk_bulk_data bus_clks[];
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u64 bus_clk_rate[NUM_BUS_CLKS];
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struct clk_bulk_data bus_clks[NUM_BUS_CLKS];
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struct clk_bulk_data *intf_clks;
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bool is_on;
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};
|
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|
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/**
|
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@ -91,8 +99,10 @@ struct qcom_icc_node {
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struct qcom_icc_desc {
|
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struct qcom_icc_node * const *nodes;
|
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size_t num_nodes;
|
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const char * const *clocks;
|
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size_t num_clocks;
|
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const char * const *bus_clocks;
|
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const char * const *intf_clocks;
|
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size_t num_intf_clocks;
|
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bool no_clk_scaling;
|
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enum qcom_icc_type type;
|
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const struct regmap_config *regmap_cfg;
|
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unsigned int qos_offset;
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|
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@ -21,21 +21,17 @@
|
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#include "smd-rpm.h"
|
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#include "msm8996.h"
|
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|
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static const char * const bus_mm_clocks[] = {
|
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"bus",
|
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"bus_a",
|
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static const char * const mm_intf_clocks[] = {
|
||||
"iface"
|
||||
};
|
||||
|
||||
static const char * const bus_a0noc_clocks[] = {
|
||||
static const char * const a0noc_intf_clocks[] = {
|
||||
"aggre0_snoc_axi",
|
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"aggre0_cnoc_ahb",
|
||||
"aggre0_noc_mpu_cfg"
|
||||
};
|
||||
|
||||
static const char * const bus_a2noc_clocks[] = {
|
||||
"bus",
|
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"bus_a",
|
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static const char * const a2noc_intf_clocks[] = {
|
||||
"aggre2_ufs_axi",
|
||||
"ufs_axi"
|
||||
};
|
||||
@ -1821,8 +1817,9 @@ static const struct qcom_icc_desc msm8996_a0noc = {
|
||||
.type = QCOM_ICC_NOC,
|
||||
.nodes = a0noc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(a0noc_nodes),
|
||||
.clocks = bus_a0noc_clocks,
|
||||
.num_clocks = ARRAY_SIZE(bus_a0noc_clocks),
|
||||
.intf_clocks = a0noc_intf_clocks,
|
||||
.num_intf_clocks = ARRAY_SIZE(a0noc_intf_clocks),
|
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.no_clk_scaling = true,
|
||||
.regmap_cfg = &msm8996_a0noc_regmap_config
|
||||
};
|
||||
|
||||
@ -1865,8 +1862,8 @@ static const struct qcom_icc_desc msm8996_a2noc = {
|
||||
.type = QCOM_ICC_NOC,
|
||||
.nodes = a2noc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(a2noc_nodes),
|
||||
.clocks = bus_a2noc_clocks,
|
||||
.num_clocks = ARRAY_SIZE(bus_a2noc_clocks),
|
||||
.intf_clocks = a2noc_intf_clocks,
|
||||
.num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks),
|
||||
.regmap_cfg = &msm8996_a2noc_regmap_config
|
||||
};
|
||||
|
||||
@ -2004,8 +2001,8 @@ static const struct qcom_icc_desc msm8996_mnoc = {
|
||||
.type = QCOM_ICC_NOC,
|
||||
.nodes = mnoc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(mnoc_nodes),
|
||||
.clocks = bus_mm_clocks,
|
||||
.num_clocks = ARRAY_SIZE(bus_mm_clocks),
|
||||
.intf_clocks = mm_intf_clocks,
|
||||
.num_intf_clocks = ARRAY_SIZE(mm_intf_clocks),
|
||||
.regmap_cfg = &msm8996_mnoc_regmap_config
|
||||
};
|
||||
|
||||
@ -2111,7 +2108,17 @@ static struct platform_driver qnoc_driver = {
|
||||
.sync_state = icc_sync_state,
|
||||
}
|
||||
};
|
||||
module_platform_driver(qnoc_driver);
|
||||
static int __init qnoc_driver_init(void)
|
||||
{
|
||||
return platform_driver_register(&qnoc_driver);
|
||||
}
|
||||
core_initcall(qnoc_driver_init);
|
||||
|
||||
static void __exit qnoc_driver_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&qnoc_driver);
|
||||
}
|
||||
module_exit(qnoc_driver_exit);
|
||||
|
||||
MODULE_AUTHOR("Yassine Oudjana <y.oudjana@protonmail.com>");
|
||||
MODULE_DESCRIPTION("Qualcomm MSM8996 NoC driver");
|
||||
|
||||
@ -127,15 +127,11 @@ enum {
|
||||
SDM660_SNOC,
|
||||
};
|
||||
|
||||
static const char * const bus_mm_clocks[] = {
|
||||
"bus",
|
||||
"bus_a",
|
||||
static const char * const mm_intf_clocks[] = {
|
||||
"iface",
|
||||
};
|
||||
|
||||
static const char * const bus_a2noc_clocks[] = {
|
||||
"bus",
|
||||
"bus_a",
|
||||
static const char * const a2noc_intf_clocks[] = {
|
||||
"ipa",
|
||||
"ufs_axi",
|
||||
"aggre2_ufs_axi",
|
||||
@ -1516,8 +1512,8 @@ static const struct qcom_icc_desc sdm660_a2noc = {
|
||||
.type = QCOM_ICC_NOC,
|
||||
.nodes = sdm660_a2noc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(sdm660_a2noc_nodes),
|
||||
.clocks = bus_a2noc_clocks,
|
||||
.num_clocks = ARRAY_SIZE(bus_a2noc_clocks),
|
||||
.intf_clocks = a2noc_intf_clocks,
|
||||
.num_intf_clocks = ARRAY_SIZE(a2noc_intf_clocks),
|
||||
.regmap_cfg = &sdm660_a2noc_regmap_config,
|
||||
};
|
||||
|
||||
@ -1620,6 +1616,7 @@ static const struct qcom_icc_desc sdm660_gnoc = {
|
||||
.nodes = sdm660_gnoc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(sdm660_gnoc_nodes),
|
||||
.regmap_cfg = &sdm660_gnoc_regmap_config,
|
||||
.no_clk_scaling = true,
|
||||
};
|
||||
|
||||
static struct qcom_icc_node * const sdm660_mnoc_nodes[] = {
|
||||
@ -1659,8 +1656,8 @@ static const struct qcom_icc_desc sdm660_mnoc = {
|
||||
.type = QCOM_ICC_NOC,
|
||||
.nodes = sdm660_mnoc_nodes,
|
||||
.num_nodes = ARRAY_SIZE(sdm660_mnoc_nodes),
|
||||
.clocks = bus_mm_clocks,
|
||||
.num_clocks = ARRAY_SIZE(bus_mm_clocks),
|
||||
.intf_clocks = mm_intf_clocks,
|
||||
.num_intf_clocks = ARRAY_SIZE(mm_intf_clocks),
|
||||
.regmap_cfg = &sdm660_mnoc_regmap_config,
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user