genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN

Adjust to reality and remove another layer of pointless Kconfig
indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve
all purposes.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20221111122014.524842979@linutronix.de
This commit is contained in:
Thomas Gleixner 2022-11-11 14:54:40 +01:00
parent a474d3fbe2
commit 13e7accb81
16 changed files with 24 additions and 37 deletions

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@ -22,7 +22,7 @@ obj-$(CONFIG_REGMAP) += regmap/
obj-$(CONFIG_SOC_BUS) += soc.o obj-$(CONFIG_SOC_BUS) += soc.o
obj-$(CONFIG_PINCTRL) += pinctrl.o obj-$(CONFIG_PINCTRL) += pinctrl.o
obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o obj-$(CONFIG_GENERIC_MSI_IRQ) += platform-msi.o
obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o
obj-$(CONFIG_ACPI) += physical_location.o obj-$(CONFIG_ACPI) += physical_location.o

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@ -8,7 +8,7 @@
config FSL_MC_BUS config FSL_MC_BUS
bool "QorIQ DPAA2 fsl-mc bus driver" bool "QorIQ DPAA2 fsl-mc bus driver"
depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC))) depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
help help
Driver to enable the bus infrastructure for the QorIQ DPAA2 Driver to enable the bus infrastructure for the QorIQ DPAA2
architecture. The fsl-mc bus driver handles discovery of architecture. The fsl-mc bus driver handles discovery of

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@ -462,7 +462,7 @@ config MV_XOR_V2
select DMA_ENGINE select DMA_ENGINE
select DMA_ENGINE_RAID select DMA_ENGINE_RAID
select ASYNC_TX_ENABLE_CHANNEL_SWITCH select ASYNC_TX_ENABLE_CHANNEL_SWITCH
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
help help
Enable support for the Marvell version 2 XOR engine. Enable support for the Marvell version 2 XOR engine.

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@ -610,7 +610,7 @@ static irqreturn_t hidma_chirq_handler(int chirq, void *arg)
return hidma_ll_inthandler(chirq, lldev); return hidma_ll_inthandler(chirq, lldev);
} }
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg) static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg)
{ {
struct hidma_lldev **lldevp = arg; struct hidma_lldev **lldevp = arg;
@ -671,7 +671,7 @@ static int hidma_sysfs_init(struct hidma_dev *dev)
return device_create_file(dev->ddev.dev, dev->chid_attrs); return device_create_file(dev->ddev.dev, dev->chid_attrs);
} }
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg) static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
{ {
struct device *dev = msi_desc_to_dev(desc); struct device *dev = msi_desc_to_dev(desc);
@ -687,7 +687,7 @@ static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
static void hidma_free_msis(struct hidma_dev *dmadev) static void hidma_free_msis(struct hidma_dev *dmadev)
{ {
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
struct device *dev = dmadev->ddev.dev; struct device *dev = dmadev->ddev.dev;
int i, virq; int i, virq;
@ -704,7 +704,7 @@ static void hidma_free_msis(struct hidma_dev *dmadev)
static int hidma_request_msi(struct hidma_dev *dmadev, static int hidma_request_msi(struct hidma_dev *dmadev,
struct platform_device *pdev) struct platform_device *pdev)
{ {
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
int rc, i, virq; int rc, i, virq;
rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS, rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS,

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@ -389,7 +389,7 @@ config ARM_SMMU_V3
depends on ARM64 depends on ARM64
select IOMMU_API select IOMMU_API
select IOMMU_IO_PGTABLE_LPAE select IOMMU_IO_PGTABLE_LPAE
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
help help
Support for implementations of the ARM System MMU architecture Support for implementations of the ARM System MMU architecture
version 3 providing translation support to a PCIe root complex. version 3 providing translation support to a PCIe root complex.

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@ -38,7 +38,7 @@ config ARM_GIC_V3
config ARM_GIC_V3_ITS config ARM_GIC_V3_ITS
bool bool
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
default ARM_GIC_V3 default ARM_GIC_V3
config ARM_GIC_V3_ITS_PCI config ARM_GIC_V3_ITS_PCI
@ -375,7 +375,7 @@ config MVEBU_ICU
config MVEBU_ODMI config MVEBU_ODMI
bool bool
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
config MVEBU_PIC config MVEBU_PIC
bool bool
@ -488,7 +488,7 @@ config IMX_MU_MSI
default m if ARCH_MXC default m if ARCH_MXC
select IRQ_DOMAIN select IRQ_DOMAIN
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
help help
Provide a driver for the i.MX Messaging Unit block used as a Provide a driver for the i.MX Messaging Unit block used as a
CPU-to-CPU MSI controller. This requires a specially crafted DT CPU-to-CPU MSI controller. This requires a specially crafted DT

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@ -223,7 +223,7 @@ config BCM_FLEXRM_MBOX
tristate "Broadcom FlexRM Mailbox" tristate "Broadcom FlexRM Mailbox"
depends on ARM64 depends on ARM64
depends on ARCH_BCM_IPROC || COMPILE_TEST depends on ARCH_BCM_IPROC || COMPILE_TEST
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
default m if ARCH_BCM_IPROC default m if ARCH_BCM_IPROC
help help
Mailbox implementation of the Broadcom FlexRM ring manager, Mailbox implementation of the Broadcom FlexRM ring manager,

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@ -38,7 +38,6 @@ source "drivers/pci/pcie/Kconfig"
config PCI_MSI config PCI_MSI
bool "Message Signaled Interrupts (MSI and MSI-X)" bool "Message Signaled Interrupts (MSI and MSI-X)"
select GENERIC_MSI_IRQ_DOMAIN
select GENERIC_MSI_IRQ select GENERIC_MSI_IRQ
help help
This allows device drivers to enable MSI (Message Signaled This allows device drivers to enable MSI (Message Signaled

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@ -93,7 +93,7 @@ config ARM_PMU_ACPI
config ARM_SMMU_V3_PMU config ARM_SMMU_V3_PMU
tristate "ARM SMMUv3 Performance Monitors Extension" tristate "ARM SMMUv3 Performance Monitors Extension"
depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT) depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT)
depends on GENERIC_MSI_IRQ_DOMAIN depends on GENERIC_MSI_IRQ
help help
Provides support for the ARM SMMUv3 Performance Monitor Counter Provides support for the ARM SMMUv3 Performance Monitor Counter
Groups (PMCG), which provide monitoring of transactions passing Groups (PMCG), which provide monitoring of transactions passing

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@ -98,6 +98,6 @@ endif # SOC_TI
config TI_SCI_INTA_MSI_DOMAIN config TI_SCI_INTA_MSI_DOMAIN
bool bool
select GENERIC_MSI_IRQ_DOMAIN select GENERIC_MSI_IRQ
help help
Driver to enable Interrupt Aggregator specific MSI Domain. Driver to enable Interrupt Aggregator specific MSI Domain.

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@ -4,7 +4,7 @@
#include <linux/types.h> #include <linux/types.h>
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
#ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS #ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS
# define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2 # define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2
@ -36,6 +36,6 @@ typedef struct msi_alloc_info {
#define GENERIC_MSI_DOMAIN_OPS 1 #define GENERIC_MSI_DOMAIN_OPS 1
#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ #endif /* CONFIG_GENERIC_MSI_IRQ */
#endif #endif

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@ -378,10 +378,8 @@ struct dev_links_info {
* @data: Pointer to MSI device data * @data: Pointer to MSI device data
*/ */
struct dev_msi_info { struct dev_msi_info {
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
struct irq_domain *domain;
#endif
#ifdef CONFIG_GENERIC_MSI_IRQ #ifdef CONFIG_GENERIC_MSI_IRQ
struct irq_domain *domain;
struct msi_device_data *data; struct msi_device_data *data;
#endif #endif
}; };
@ -742,7 +740,7 @@ static inline void set_dev_node(struct device *dev, int node)
static inline struct irq_domain *dev_get_msi_domain(const struct device *dev) static inline struct irq_domain *dev_get_msi_domain(const struct device *dev)
{ {
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
return dev->msi.domain; return dev->msi.domain;
#else #else
return NULL; return NULL;
@ -751,7 +749,7 @@ static inline struct irq_domain *dev_get_msi_domain(const struct device *dev)
static inline void dev_set_msi_domain(struct device *dev, struct irq_domain *d) static inline void dev_set_msi_domain(struct device *dev, struct irq_domain *d)
{ {
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
dev->msi.domain = d; dev->msi.domain = d;
#endif #endif
} }

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@ -27,7 +27,7 @@ struct gpio_chip;
union gpio_irq_fwspec { union gpio_irq_fwspec {
struct irq_fwspec fwspec; struct irq_fwspec fwspec;
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
msi_alloc_info_t msiinfo; msi_alloc_info_t msiinfo;
#endif #endif
}; };

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@ -79,9 +79,7 @@ void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
#ifdef CONFIG_GENERIC_MSI_IRQ #ifdef CONFIG_GENERIC_MSI_IRQ
void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
#else #else
static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { }
{
}
#endif #endif
typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc, typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
@ -278,7 +276,7 @@ static inline void msi_device_destroy_sysfs(struct device *dev) { }
*/ */
bool arch_restore_msi_irqs(struct pci_dev *dev); bool arch_restore_msi_irqs(struct pci_dev *dev);
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN #ifdef CONFIG_GENERIC_MSI_IRQ
#include <linux/irqhandler.h> #include <linux/irqhandler.h>
@ -451,7 +449,7 @@ int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int vir
void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq, void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
unsigned int nvec); unsigned int nvec);
void *platform_msi_get_host_data(struct irq_domain *domain); void *platform_msi_get_host_data(struct irq_domain *domain);
#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ #endif /* CONFIG_GENERIC_MSI_IRQ */
/* PCI specific interfaces */ /* PCI specific interfaces */
#ifdef CONFIG_PCI_MSI #ifdef CONFIG_PCI_MSI

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@ -86,15 +86,10 @@ config GENERIC_IRQ_IPI
depends on SMP depends on SMP
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
# Generic MSI interrupt support # Generic MSI hierarchical interrupt domain support
config GENERIC_MSI_IRQ config GENERIC_MSI_IRQ
bool bool
# Generic MSI hierarchical interrupt domain support
config GENERIC_MSI_IRQ_DOMAIN
bool
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select GENERIC_MSI_IRQ
config IRQ_MSI_IOMMU config IRQ_MSI_IOMMU
bool bool

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@ -461,7 +461,6 @@ static inline int msi_sysfs_populate_desc(struct device *dev, struct msi_desc *d
static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { } static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { }
#endif /* !CONFIG_SYSFS */ #endif /* !CONFIG_SYSFS */
#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec); static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec);
static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
@ -1058,5 +1057,3 @@ struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
{ {
return (struct msi_domain_info *)domain->host_data; return (struct msi_domain_info *)domain->host_data;
} }
#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */