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synced 2024-11-24 21:21:41 +00:00
genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN
Adjust to reality and remove another layer of pointless Kconfig indirection. CONFIG_GENERIC_MSI_IRQ is good enough to serve all purposes. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20221111122014.524842979@linutronix.de
This commit is contained in:
parent
a474d3fbe2
commit
13e7accb81
@ -22,7 +22,7 @@ obj-$(CONFIG_REGMAP) += regmap/
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obj-$(CONFIG_SOC_BUS) += soc.o
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obj-$(CONFIG_SOC_BUS) += soc.o
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obj-$(CONFIG_PINCTRL) += pinctrl.o
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obj-$(CONFIG_PINCTRL) += pinctrl.o
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obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
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obj-$(CONFIG_DEV_COREDUMP) += devcoredump.o
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obj-$(CONFIG_GENERIC_MSI_IRQ_DOMAIN) += platform-msi.o
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obj-$(CONFIG_GENERIC_MSI_IRQ) += platform-msi.o
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obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
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obj-$(CONFIG_GENERIC_ARCH_TOPOLOGY) += arch_topology.o
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obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o
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obj-$(CONFIG_GENERIC_ARCH_NUMA) += arch_numa.o
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obj-$(CONFIG_ACPI) += physical_location.o
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obj-$(CONFIG_ACPI) += physical_location.o
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@ -8,7 +8,7 @@
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config FSL_MC_BUS
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config FSL_MC_BUS
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bool "QorIQ DPAA2 fsl-mc bus driver"
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bool "QorIQ DPAA2 fsl-mc bus driver"
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depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
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depends on OF && (ARCH_LAYERSCAPE || (COMPILE_TEST && (ARM || ARM64 || X86_LOCAL_APIC || PPC)))
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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help
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help
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Driver to enable the bus infrastructure for the QorIQ DPAA2
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Driver to enable the bus infrastructure for the QorIQ DPAA2
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architecture. The fsl-mc bus driver handles discovery of
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architecture. The fsl-mc bus driver handles discovery of
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@ -462,7 +462,7 @@ config MV_XOR_V2
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select DMA_ENGINE
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select DMA_ENGINE
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select DMA_ENGINE_RAID
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select DMA_ENGINE_RAID
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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select ASYNC_TX_ENABLE_CHANNEL_SWITCH
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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help
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help
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Enable support for the Marvell version 2 XOR engine.
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Enable support for the Marvell version 2 XOR engine.
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@ -610,7 +610,7 @@ static irqreturn_t hidma_chirq_handler(int chirq, void *arg)
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return hidma_ll_inthandler(chirq, lldev);
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return hidma_ll_inthandler(chirq, lldev);
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}
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}
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg)
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static irqreturn_t hidma_chirq_handler_msi(int chirq, void *arg)
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{
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{
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struct hidma_lldev **lldevp = arg;
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struct hidma_lldev **lldevp = arg;
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@ -671,7 +671,7 @@ static int hidma_sysfs_init(struct hidma_dev *dev)
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return device_create_file(dev->ddev.dev, dev->chid_attrs);
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return device_create_file(dev->ddev.dev, dev->chid_attrs);
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}
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}
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
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static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
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{
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{
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struct device *dev = msi_desc_to_dev(desc);
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struct device *dev = msi_desc_to_dev(desc);
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@ -687,7 +687,7 @@ static void hidma_write_msi_msg(struct msi_desc *desc, struct msi_msg *msg)
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static void hidma_free_msis(struct hidma_dev *dmadev)
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static void hidma_free_msis(struct hidma_dev *dmadev)
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{
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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struct device *dev = dmadev->ddev.dev;
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struct device *dev = dmadev->ddev.dev;
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int i, virq;
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int i, virq;
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@ -704,7 +704,7 @@ static void hidma_free_msis(struct hidma_dev *dmadev)
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static int hidma_request_msi(struct hidma_dev *dmadev,
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static int hidma_request_msi(struct hidma_dev *dmadev,
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struct platform_device *pdev)
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struct platform_device *pdev)
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{
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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int rc, i, virq;
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int rc, i, virq;
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rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS,
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rc = platform_msi_domain_alloc_irqs(&pdev->dev, HIDMA_MSI_INTS,
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@ -389,7 +389,7 @@ config ARM_SMMU_V3
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depends on ARM64
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depends on ARM64
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select IOMMU_API
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select IOMMU_API
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select IOMMU_IO_PGTABLE_LPAE
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select IOMMU_IO_PGTABLE_LPAE
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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help
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help
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Support for implementations of the ARM System MMU architecture
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Support for implementations of the ARM System MMU architecture
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version 3 providing translation support to a PCIe root complex.
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version 3 providing translation support to a PCIe root complex.
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@ -38,7 +38,7 @@ config ARM_GIC_V3
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config ARM_GIC_V3_ITS
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config ARM_GIC_V3_ITS
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bool
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bool
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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default ARM_GIC_V3
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default ARM_GIC_V3
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config ARM_GIC_V3_ITS_PCI
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config ARM_GIC_V3_ITS_PCI
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@ -375,7 +375,7 @@ config MVEBU_ICU
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config MVEBU_ODMI
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config MVEBU_ODMI
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bool
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bool
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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config MVEBU_PIC
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config MVEBU_PIC
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bool
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bool
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@ -488,7 +488,7 @@ config IMX_MU_MSI
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default m if ARCH_MXC
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default m if ARCH_MXC
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select IRQ_DOMAIN
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select IRQ_DOMAIN
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select IRQ_DOMAIN_HIERARCHY
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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help
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help
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Provide a driver for the i.MX Messaging Unit block used as a
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Provide a driver for the i.MX Messaging Unit block used as a
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CPU-to-CPU MSI controller. This requires a specially crafted DT
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CPU-to-CPU MSI controller. This requires a specially crafted DT
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@ -223,7 +223,7 @@ config BCM_FLEXRM_MBOX
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tristate "Broadcom FlexRM Mailbox"
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tristate "Broadcom FlexRM Mailbox"
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depends on ARM64
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depends on ARM64
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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depends on ARCH_BCM_IPROC || COMPILE_TEST
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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default m if ARCH_BCM_IPROC
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default m if ARCH_BCM_IPROC
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help
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help
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Mailbox implementation of the Broadcom FlexRM ring manager,
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Mailbox implementation of the Broadcom FlexRM ring manager,
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@ -38,7 +38,6 @@ source "drivers/pci/pcie/Kconfig"
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config PCI_MSI
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config PCI_MSI
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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bool "Message Signaled Interrupts (MSI and MSI-X)"
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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select GENERIC_MSI_IRQ
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help
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help
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This allows device drivers to enable MSI (Message Signaled
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This allows device drivers to enable MSI (Message Signaled
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@ -93,7 +93,7 @@ config ARM_PMU_ACPI
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config ARM_SMMU_V3_PMU
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config ARM_SMMU_V3_PMU
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tristate "ARM SMMUv3 Performance Monitors Extension"
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tristate "ARM SMMUv3 Performance Monitors Extension"
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depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT)
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depends on (ARM64 && ACPI) || (COMPILE_TEST && 64BIT)
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depends on GENERIC_MSI_IRQ_DOMAIN
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depends on GENERIC_MSI_IRQ
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help
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help
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Provides support for the ARM SMMUv3 Performance Monitor Counter
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Provides support for the ARM SMMUv3 Performance Monitor Counter
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Groups (PMCG), which provide monitoring of transactions passing
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Groups (PMCG), which provide monitoring of transactions passing
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@ -98,6 +98,6 @@ endif # SOC_TI
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config TI_SCI_INTA_MSI_DOMAIN
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config TI_SCI_INTA_MSI_DOMAIN
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bool
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bool
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select GENERIC_MSI_IRQ_DOMAIN
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select GENERIC_MSI_IRQ
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help
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help
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Driver to enable Interrupt Aggregator specific MSI Domain.
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Driver to enable Interrupt Aggregator specific MSI Domain.
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@ -4,7 +4,7 @@
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#include <linux/types.h>
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#include <linux/types.h>
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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#ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS
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#ifndef NUM_MSI_ALLOC_SCRATCHPAD_REGS
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# define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2
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# define NUM_MSI_ALLOC_SCRATCHPAD_REGS 2
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@ -36,6 +36,6 @@ typedef struct msi_alloc_info {
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#define GENERIC_MSI_DOMAIN_OPS 1
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#define GENERIC_MSI_DOMAIN_OPS 1
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#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
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#endif /* CONFIG_GENERIC_MSI_IRQ */
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#endif
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#endif
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@ -378,10 +378,8 @@ struct dev_links_info {
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* @data: Pointer to MSI device data
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* @data: Pointer to MSI device data
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*/
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*/
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struct dev_msi_info {
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struct dev_msi_info {
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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struct irq_domain *domain;
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#endif
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#ifdef CONFIG_GENERIC_MSI_IRQ
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#ifdef CONFIG_GENERIC_MSI_IRQ
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struct irq_domain *domain;
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struct msi_device_data *data;
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struct msi_device_data *data;
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#endif
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#endif
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};
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};
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@ -742,7 +740,7 @@ static inline void set_dev_node(struct device *dev, int node)
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static inline struct irq_domain *dev_get_msi_domain(const struct device *dev)
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static inline struct irq_domain *dev_get_msi_domain(const struct device *dev)
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{
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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return dev->msi.domain;
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return dev->msi.domain;
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#else
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#else
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return NULL;
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return NULL;
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@ -751,7 +749,7 @@ static inline struct irq_domain *dev_get_msi_domain(const struct device *dev)
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static inline void dev_set_msi_domain(struct device *dev, struct irq_domain *d)
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static inline void dev_set_msi_domain(struct device *dev, struct irq_domain *d)
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{
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{
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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dev->msi.domain = d;
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dev->msi.domain = d;
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#endif
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#endif
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}
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}
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@ -27,7 +27,7 @@ struct gpio_chip;
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union gpio_irq_fwspec {
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union gpio_irq_fwspec {
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struct irq_fwspec fwspec;
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struct irq_fwspec fwspec;
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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msi_alloc_info_t msiinfo;
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msi_alloc_info_t msiinfo;
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#endif
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#endif
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};
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};
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@ -79,9 +79,7 @@ void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
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#ifdef CONFIG_GENERIC_MSI_IRQ
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#ifdef CONFIG_GENERIC_MSI_IRQ
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
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#else
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#else
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static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
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static inline void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg) { }
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{
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}
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#endif
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#endif
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typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
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typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
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@ -278,7 +276,7 @@ static inline void msi_device_destroy_sysfs(struct device *dev) { }
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*/
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*/
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bool arch_restore_msi_irqs(struct pci_dev *dev);
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bool arch_restore_msi_irqs(struct pci_dev *dev);
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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#ifdef CONFIG_GENERIC_MSI_IRQ
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#include <linux/irqhandler.h>
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#include <linux/irqhandler.h>
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@ -451,7 +449,7 @@ int platform_msi_device_domain_alloc(struct irq_domain *domain, unsigned int vir
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void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
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void platform_msi_device_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nvec);
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unsigned int nvec);
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void *platform_msi_get_host_data(struct irq_domain *domain);
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void *platform_msi_get_host_data(struct irq_domain *domain);
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#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
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#endif /* CONFIG_GENERIC_MSI_IRQ */
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/* PCI specific interfaces */
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/* PCI specific interfaces */
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#ifdef CONFIG_PCI_MSI
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#ifdef CONFIG_PCI_MSI
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@ -86,15 +86,10 @@ config GENERIC_IRQ_IPI
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depends on SMP
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depends on SMP
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select IRQ_DOMAIN_HIERARCHY
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select IRQ_DOMAIN_HIERARCHY
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# Generic MSI interrupt support
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# Generic MSI hierarchical interrupt domain support
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config GENERIC_MSI_IRQ
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config GENERIC_MSI_IRQ
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bool
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bool
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# Generic MSI hierarchical interrupt domain support
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config GENERIC_MSI_IRQ_DOMAIN
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bool
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select IRQ_DOMAIN_HIERARCHY
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select IRQ_DOMAIN_HIERARCHY
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select GENERIC_MSI_IRQ
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config IRQ_MSI_IOMMU
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config IRQ_MSI_IOMMU
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bool
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bool
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@ -461,7 +461,6 @@ static inline int msi_sysfs_populate_desc(struct device *dev, struct msi_desc *d
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static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { }
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static inline void msi_sysfs_remove_desc(struct device *dev, struct msi_desc *desc) { }
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#endif /* !CONFIG_SYSFS */
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#endif /* !CONFIG_SYSFS */
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#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
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static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec);
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static int __msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, int nvec);
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static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
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static void __msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
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@ -1058,5 +1057,3 @@ struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
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{
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{
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return (struct msi_domain_info *)domain->host_data;
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return (struct msi_domain_info *)domain->host_data;
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}
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}
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#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
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