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ASoC: fsl-sai: fix Freescale SAI DAI format setting.
o Fix some bugs of fsl_sai_set_dai_fmt_tr(). o Add SND_SOC_DAIFMT_LEFT_J support. o Add SND_SOC_DAIFMT_CBS_CFM support. o Add SND_SOC_DAIFMT_CBM_CFS support. o And SND_SOC_DAIFMT_RIGHT_J need to be done in the future. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -105,35 +105,47 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
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else
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val_cr4 |= FSL_SAI_CR4_MF;
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/* DAI mode */
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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val_cr4 |= FSL_SAI_CR4_FSE;
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/* Data on rising edge of bclk, frame low, 1clk before data */
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val_cr2 &= ~FSL_SAI_CR2_BCP;
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val_cr4 |= FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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/* Data on rising edge of bclk, frame high, 0clk before data */
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val_cr2 &= ~FSL_SAI_CR2_BCP;
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val_cr4 &= ~(FSL_SAI_CR4_FSE | FSL_SAI_CR4_FSP);
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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/* To be done */
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default:
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return -EINVAL;
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}
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/* DAI clock inversion */
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switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
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case SND_SOC_DAIFMT_IB_IF:
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val_cr4 |= FSL_SAI_CR4_FSP;
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val_cr2 &= ~FSL_SAI_CR2_BCP;
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/* Invert both clocks */
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val_cr2 ^= FSL_SAI_CR2_BCP;
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val_cr4 ^= FSL_SAI_CR4_FSP;
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break;
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case SND_SOC_DAIFMT_IB_NF:
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val_cr4 &= ~FSL_SAI_CR4_FSP;
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val_cr2 &= ~FSL_SAI_CR2_BCP;
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/* Invert bit clock */
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val_cr2 ^= FSL_SAI_CR2_BCP;
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break;
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case SND_SOC_DAIFMT_NB_IF:
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val_cr4 |= FSL_SAI_CR4_FSP;
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val_cr2 |= FSL_SAI_CR2_BCP;
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/* Invert frame clock */
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val_cr4 ^= FSL_SAI_CR4_FSP;
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break;
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case SND_SOC_DAIFMT_NB_NF:
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val_cr4 &= ~FSL_SAI_CR4_FSP;
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val_cr2 |= FSL_SAI_CR2_BCP;
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/* Nothing to do for both normal cases */
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break;
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default:
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return -EINVAL;
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}
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/* DAI clock master masks */
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBS_CFS:
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val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
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@ -143,6 +155,14 @@ static int fsl_sai_set_dai_fmt_tr(struct snd_soc_dai *cpu_dai,
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val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
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val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
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break;
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case SND_SOC_DAIFMT_CBS_CFM:
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val_cr2 |= FSL_SAI_CR2_BCD_MSTR;
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val_cr4 &= ~FSL_SAI_CR4_FSD_MSTR;
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break;
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case SND_SOC_DAIFMT_CBM_CFS:
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val_cr2 &= ~FSL_SAI_CR2_BCD_MSTR;
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val_cr4 |= FSL_SAI_CR4_FSD_MSTR;
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break;
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default:
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return -EINVAL;
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}
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