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Renesas TPU PWM support for v3.12

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Add Renesas TPU PWM unit support
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Merge tag 'renesas-tpu-pwm-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards

From Simon Horman:
Renesas TPU PWM support for v3.12

Add Renesas TPU PWM unit support

* tag 'renesas-tpu-pwm-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  leds: Remove leds-renesas-tpu driver
  ARM: shmobile: sh73a0: Remove all GPIOs
  ARM: shmobile: kota2: Use leds-pwm + pwm-rmob
  ARM: shmobile: armadillo800eva: Add backlight support

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-08-14 00:33:54 -07:00
commit 13b837999f
8 changed files with 145 additions and 831 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
arch/arm/mach-shmobile/board-armadillo800eva.c
View File

@ -31,6 +31,8 @@
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
#include <linux/regulator/driver.h> #include <linux/regulator/driver.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/platform_data/pwm-renesas-tpu.h>
#include <linux/pwm_backlight.h>
#include <linux/regulator/fixed.h> #include <linux/regulator/fixed.h>
#include <linux/regulator/gpio-regulator.h> #include <linux/regulator/gpio-regulator.h>
#include <linux/regulator/machine.h> #include <linux/regulator/machine.h>
@ -387,7 +389,50 @@ static struct platform_device sh_eth_device = {
.num_resources = ARRAY_SIZE(sh_eth_resources), .num_resources = ARRAY_SIZE(sh_eth_resources),
}; };
/* LCDC */ /* PWM */
static struct resource pwm_resources[] = {
[0] = {
.start = 0xe6600000,
.end = 0xe66000ff,
.flags = IORESOURCE_MEM,
},
};
static struct tpu_pwm_platform_data pwm_device_data = {
.channels[2] = {
.polarity = PWM_POLARITY_INVERSED,
}
};
static struct platform_device pwm_device = {
.name = "renesas-tpu-pwm",
.id = -1,
.dev = {
.platform_data = &pwm_device_data,
},
.num_resources = ARRAY_SIZE(pwm_resources),
.resource = pwm_resources,
};
static struct pwm_lookup pwm_lookup[] = {
PWM_LOOKUP("renesas-tpu-pwm", 2, "pwm-backlight.0", NULL),
};
/* LCDC and backlight */
static struct platform_pwm_backlight_data pwm_backlight_data = {
.lth_brightness = 50,
.max_brightness = 255,
.dft_brightness = 255,
.pwm_period_ns = 33333, /* 30kHz */
};
static struct platform_device pwm_backlight_device = {
.name = "pwm-backlight",
.dev = {
.platform_data = &pwm_backlight_data,
},
};
static struct fb_videomode lcdc0_mode = { static struct fb_videomode lcdc0_mode = {
.name = "AMPIER/AM-800480", .name = "AMPIER/AM-800480",
.xres = 800, .xres = 800,
@ -1030,6 +1075,8 @@ static struct i2c_board_info i2c2_devices[] = {
*/ */
static struct platform_device *eva_devices[] __initdata = { static struct platform_device *eva_devices[] __initdata = {
&lcdc0_device, &lcdc0_device,
&pwm_device,
&pwm_backlight_device,
&gpio_keys_device, &gpio_keys_device,
&sh_eth_device, &sh_eth_device,
&vcc_sdhi0, &vcc_sdhi0,
@ -1101,6 +1148,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
/* ST1232 */ /* ST1232 */
PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740", PIN_MAP_MUX_GROUP_DEFAULT("0-0055", "pfc-r8a7740",
"intc_irq10", "intc"), "intc_irq10", "intc"),
/* TPU0 */
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm", "pfc-r8a7740",
"tpu0_to2_1", "tpu0"),
/* USBHS */ /* USBHS */
PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740", PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7740",
"intc_irq7_1", "intc"), "intc_irq7_1", "intc"),
@ -1154,13 +1204,13 @@ static void __init eva_init(void)
ARRAY_SIZE(fixed3v3_power_consumers), 3300000); ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map)); pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
r8a7740_pinmux_init(); r8a7740_pinmux_init();
r8a7740_meram_workaround(); r8a7740_meram_workaround();
/* LCDC0 */ /* LCDC0 */
gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */ gpio_request_one(61, GPIOF_OUT_INIT_HIGH, NULL); /* LCDDON */
gpio_request_one(202, GPIOF_OUT_INIT_LOW, NULL); /* LCD0_LED_CONT */
/* Touchscreen */ /* Touchscreen */
gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */ gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */

173
arch/arm/mach-shmobile/board-kota2.c
View File

@ -26,6 +26,7 @@
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/pinctrl/machine.h> #include <linux/pinctrl/machine.h>
#include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf-generic.h>
#include <linux/platform_data/pwm-renesas-tpu.h>
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/io.h> #include <linux/io.h>
@ -37,8 +38,8 @@
#include <linux/input/sh_keysc.h> #include <linux/input/sh_keysc.h>
#include <linux/gpio_keys.h> #include <linux/gpio_keys.h>
#include <linux/leds.h> #include <linux/leds.h>
#include <linux/leds_pwm.h>
#include <linux/irqchip/arm-gic.h> #include <linux/irqchip/arm-gic.h>
#include <linux/platform_data/leds-renesas-tpu.h>
#include <linux/mmc/host.h> #include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h> #include <linux/mmc/sh_mmcif.h>
#include <linux/mfd/tmio.h> #include <linux/mfd/tmio.h>
@ -186,116 +187,100 @@ static struct platform_device gpio_leds_device = {
}; };
/* TPU LED */ /* TPU LED */
static struct led_renesas_tpu_config led_renesas_tpu12_pdata = { static struct resource tpu1_pwm_resources[] = {
.name = "V2513",
.pin_gpio_fn = GPIO_FN_TPU1TO2,
.pin_gpio = 153,
.channel_offset = 0x90,
.timer_bit = 2,
.max_brightness = 1000,
};
static struct resource tpu12_resources[] = {
[0] = { [0] = {
.name = "TPU12", .start = 0xe6610000,
.start = 0xe6610090, .end = 0xe66100ff,
.end = 0xe66100b5,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
}; };
static struct platform_device leds_tpu12_device = { static struct platform_device tpu1_pwm_device = {
.name = "leds-renesas-tpu", .name = "renesas-tpu-pwm",
.id = 12, .id = 1,
.dev = { .num_resources = ARRAY_SIZE(tpu1_pwm_resources),
.platform_data = &led_renesas_tpu12_pdata, .resource = tpu1_pwm_resources,
},
.num_resources = ARRAY_SIZE(tpu12_resources),
.resource = tpu12_resources,
}; };
static struct led_renesas_tpu_config led_renesas_tpu41_pdata = { static struct resource tpu2_pwm_resources[] = {
.name = "V2514",
.pin_gpio_fn = GPIO_FN_TPU4TO1,
.pin_gpio = 199,
.channel_offset = 0x50,
.timer_bit = 1,
.max_brightness = 1000,
};
static struct resource tpu41_resources[] = {
[0] = { [0] = {
.name = "TPU41", .start = 0xe6620000,
.start = 0xe6640050, .end = 0xe66200ff,
.end = 0xe6640075,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
}; };
static struct platform_device leds_tpu41_device = { static struct platform_device tpu2_pwm_device = {
.name = "leds-renesas-tpu", .name = "renesas-tpu-pwm",
.id = 41, .id = 2,
.dev = { .num_resources = ARRAY_SIZE(tpu2_pwm_resources),
.platform_data = &led_renesas_tpu41_pdata, .resource = tpu2_pwm_resources,
},
.num_resources = ARRAY_SIZE(tpu41_resources),
.resource = tpu41_resources,
}; };
static struct led_renesas_tpu_config led_renesas_tpu21_pdata = { static struct resource tpu3_pwm_resources[] = {
.name = "V2515",
.pin_gpio_fn = GPIO_FN_TPU2TO1,
.pin_gpio = 197,
.channel_offset = 0x50,
.timer_bit = 1,
.max_brightness = 1000,
};
static struct resource tpu21_resources[] = {
[0] = { [0] = {
.name = "TPU21", .start = 0xe6630000,
.start = 0xe6620050, .end = 0xe66300ff,
.end = 0xe6620075,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
}; };
static struct platform_device leds_tpu21_device = { static struct platform_device tpu3_pwm_device = {
.name = "leds-renesas-tpu", .name = "renesas-tpu-pwm",
.id = 21, .id = 3,
.dev = { .num_resources = ARRAY_SIZE(tpu3_pwm_resources),
.platform_data = &led_renesas_tpu21_pdata, .resource = tpu3_pwm_resources,
},
.num_resources = ARRAY_SIZE(tpu21_resources),
.resource = tpu21_resources,
}; };
static struct led_renesas_tpu_config led_renesas_tpu30_pdata = { static struct resource tpu4_pwm_resources[] = {
.name = "KEYLED",
.pin_gpio_fn = GPIO_FN_TPU3TO0,
.pin_gpio = 163,
.channel_offset = 0x10,
.timer_bit = 0,
.max_brightness = 1000,
};
static struct resource tpu30_resources[] = {
[0] = { [0] = {
.name = "TPU30", .start = 0xe6640000,
.start = 0xe6630010, .end = 0xe66400ff,
.end = 0xe6630035,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
}; };
static struct platform_device leds_tpu30_device = { static struct platform_device tpu4_pwm_device = {
.name = "leds-renesas-tpu", .name = "renesas-tpu-pwm",
.id = 30, .id = 4,
.dev = { .num_resources = ARRAY_SIZE(tpu4_pwm_resources),
.platform_data = &led_renesas_tpu30_pdata, .resource = tpu4_pwm_resources,
};
static struct pwm_lookup pwm_lookup[] = {
PWM_LOOKUP("renesas-tpu-pwm.1", 2, "leds-pwm.0", "V2513"),
PWM_LOOKUP("renesas-tpu-pwm.2", 1, "leds-pwm.0", "V2515"),
PWM_LOOKUP("renesas-tpu-pwm.3", 0, "leds-pwm.0", "KEYLED"),
PWM_LOOKUP("renesas-tpu-pwm.4", 1, "leds-pwm.0", "V2514"),
};
static struct led_pwm tpu_pwm_leds[] = {
{
.name = "V2513",
.max_brightness = 1000,
}, {
.name = "V2515",
.max_brightness = 1000,
}, {
.name = "KEYLED",
.max_brightness = 1000,
}, {
.name = "V2514",
.max_brightness = 1000,
},
};
static struct led_pwm_platform_data leds_pwm_pdata = {
.num_leds = ARRAY_SIZE(tpu_pwm_leds),
.leds = tpu_pwm_leds,
};
static struct platform_device leds_pwm_device = {
.name = "leds-pwm",
.id = 0,
.dev = {
.platform_data = &leds_pwm_pdata,
}, },
.num_resources = ARRAY_SIZE(tpu30_resources),
.resource = tpu30_resources,
}; };
/* Fixed 1.8V regulator to be used by MMCIF */ /* Fixed 1.8V regulator to be used by MMCIF */
@ -426,10 +411,11 @@ static struct platform_device *kota2_devices[] __initdata = {
&keysc_device, &keysc_device,
&gpio_keys_device, &gpio_keys_device,
&gpio_leds_device, &gpio_leds_device,
&leds_tpu12_device, &tpu1_pwm_device,
&leds_tpu41_device, &tpu2_pwm_device,
&leds_tpu21_device, &tpu3_pwm_device,
&leds_tpu30_device, &tpu4_pwm_device,
&leds_pwm_device,
&mmcif_device, &mmcif_device,
&sdhi0_device, &sdhi0_device,
&sdhi1_device, &sdhi1_device,
@ -512,6 +498,15 @@ static const struct pinctrl_map kota2_pinctrl_map[] = {
"bsc_cs5_a", "bsc"), "bsc_cs5_a", "bsc"),
PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0", PIN_MAP_MUX_GROUP_DEFAULT("smsc911x.0", "pfc-sh73a0",
"bsc_we0", "bsc"), "bsc_we0", "bsc"),
/* TPU */
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.1", "pfc-sh73a0",
"tpu1_to2", "tpu1"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.2", "pfc-sh73a0",
"tpu2_to1", "tpu2"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.3", "pfc-sh73a0",
"tpu3_to0", "tpu3"),
PIN_MAP_MUX_GROUP_DEFAULT("renesas-tpu-pwm.4", "pfc-sh73a0",
"tpu4_to1", "tpu4"),
}; };
static void __init kota2_init(void) static void __init kota2_init(void)
@ -524,6 +519,8 @@ static void __init kota2_init(void)
pinctrl_register_mappings(kota2_pinctrl_map, pinctrl_register_mappings(kota2_pinctrl_map,
ARRAY_SIZE(kota2_pinctrl_map)); ARRAY_SIZE(kota2_pinctrl_map));
pwm_add_table(pwm_lookup, ARRAY_SIZE(pwm_lookup));
sh73a0_pinmux_init(); sh73a0_pinmux_init();
/* SMSC911X */ /* SMSC911X */

12
arch/arm/mach-shmobile/clock-sh73a0.c
View File

@ -555,7 +555,7 @@ enum { MSTP001,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322, MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP322,
MSTP314, MSTP313, MSTP312, MSTP311, MSTP314, MSTP313, MSTP312, MSTP311,
MSTP303, MSTP302, MSTP301, MSTP300, MSTP304, MSTP303, MSTP302, MSTP301, MSTP300,
MSTP411, MSTP410, MSTP403, MSTP411, MSTP410, MSTP403,
MSTP_NR }; MSTP_NR };
@ -593,6 +593,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
[MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */ [MSTP311] = MSTP(&div6_clks[DIV6_SDHI2], SMSTPCR3, 11, 0), /* SDHI2 */
[MSTP304] = MSTP(&main_div2_clk, SMSTPCR3, 4, 0), /* TPU0 */
[MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */ [MSTP303] = MSTP(&main_div2_clk, SMSTPCR3, 3, 0), /* TPU1 */
[MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */ [MSTP302] = MSTP(&main_div2_clk, SMSTPCR3, 2, 0), /* TPU2 */
[MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */ [MSTP301] = MSTP(&main_div2_clk, SMSTPCR3, 1, 0), /* TPU3 */
@ -669,10 +670,11 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */ CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), /* MMCIF0 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */ CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */ CLKDEV_DEV_ID("ee140000.sdhi", &mstp_clks[MSTP311]), /* SDHI2 */
CLKDEV_DEV_ID("leds-renesas-tpu.12", &mstp_clks[MSTP303]), /* TPU1 */ CLKDEV_DEV_ID("renesas-tpu-pwm.0", &mstp_clks[MSTP304]), /* TPU0 */
CLKDEV_DEV_ID("leds-renesas-tpu.21", &mstp_clks[MSTP302]), /* TPU2 */ CLKDEV_DEV_ID("renesas-tpu-pwm.1", &mstp_clks[MSTP303]), /* TPU1 */
CLKDEV_DEV_ID("leds-renesas-tpu.30", &mstp_clks[MSTP301]), /* TPU3 */ CLKDEV_DEV_ID("renesas-tpu-pwm.2", &mstp_clks[MSTP302]), /* TPU2 */
CLKDEV_DEV_ID("leds-renesas-tpu.41", &mstp_clks[MSTP300]), /* TPU4 */ CLKDEV_DEV_ID("renesas-tpu-pwm.3", &mstp_clks[MSTP301]), /* TPU3 */
CLKDEV_DEV_ID("renesas-tpu-pwm.4", &mstp_clks[MSTP300]), /* TPU4 */
CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */ CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */ CLKDEV_DEV_ID("e6826000.i2c", &mstp_clks[MSTP411]), /* I2C3 */
CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */ CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* I2C4 */

373
arch/arm/mach-shmobile/include/mach/sh73a0.h
View File

@ -1,378 +1,7 @@
#ifndef __ASM_SH73A0_H__ #ifndef __ASM_SH73A0_H__
#define __ASM_SH73A0_H__ #define __ASM_SH73A0_H__
/* Pin Function Controller: #define GPIO_NR 310
* GPIO_FN_xx - GPIO used to select pin function and MSEL switch
* GPIO_PORTxx - GPIO mapped to real I/O pin on CPU
*/
enum {
/* Hardware manual Table 25-1 (GPIO) */
GPIO_PORT0, GPIO_PORT1, GPIO_PORT2, GPIO_PORT3, GPIO_PORT4,
GPIO_PORT5, GPIO_PORT6, GPIO_PORT7, GPIO_PORT8, GPIO_PORT9,
GPIO_PORT10, GPIO_PORT11, GPIO_PORT12, GPIO_PORT13, GPIO_PORT14,
GPIO_PORT15, GPIO_PORT16, GPIO_PORT17, GPIO_PORT18, GPIO_PORT19,
GPIO_PORT20, GPIO_PORT21, GPIO_PORT22, GPIO_PORT23, GPIO_PORT24,
GPIO_PORT25, GPIO_PORT26, GPIO_PORT27, GPIO_PORT28, GPIO_PORT29,
GPIO_PORT30, GPIO_PORT31, GPIO_PORT32, GPIO_PORT33, GPIO_PORT34,
GPIO_PORT35, GPIO_PORT36, GPIO_PORT37, GPIO_PORT38, GPIO_PORT39,
GPIO_PORT40, GPIO_PORT41, GPIO_PORT42, GPIO_PORT43, GPIO_PORT44,
GPIO_PORT45, GPIO_PORT46, GPIO_PORT47, GPIO_PORT48, GPIO_PORT49,
GPIO_PORT50, GPIO_PORT51, GPIO_PORT52, GPIO_PORT53, GPIO_PORT54,
GPIO_PORT55, GPIO_PORT56, GPIO_PORT57, GPIO_PORT58, GPIO_PORT59,
GPIO_PORT60, GPIO_PORT61, GPIO_PORT62, GPIO_PORT63, GPIO_PORT64,
GPIO_PORT65, GPIO_PORT66, GPIO_PORT67, GPIO_PORT68, GPIO_PORT69,
GPIO_PORT70, GPIO_PORT71, GPIO_PORT72, GPIO_PORT73, GPIO_PORT74,
GPIO_PORT75, GPIO_PORT76, GPIO_PORT77, GPIO_PORT78, GPIO_PORT79,
GPIO_PORT80, GPIO_PORT81, GPIO_PORT82, GPIO_PORT83, GPIO_PORT84,
GPIO_PORT85, GPIO_PORT86, GPIO_PORT87, GPIO_PORT88, GPIO_PORT89,
GPIO_PORT90, GPIO_PORT91, GPIO_PORT92, GPIO_PORT93, GPIO_PORT94,
GPIO_PORT95, GPIO_PORT96, GPIO_PORT97, GPIO_PORT98, GPIO_PORT99,
GPIO_PORT100, GPIO_PORT101, GPIO_PORT102, GPIO_PORT103, GPIO_PORT104,
GPIO_PORT105, GPIO_PORT106, GPIO_PORT107, GPIO_PORT108, GPIO_PORT109,
GPIO_PORT110, GPIO_PORT111, GPIO_PORT112, GPIO_PORT113, GPIO_PORT114,
GPIO_PORT115, GPIO_PORT116, GPIO_PORT117, GPIO_PORT118,
GPIO_PORT128, GPIO_PORT129,
GPIO_PORT130, GPIO_PORT131, GPIO_PORT132, GPIO_PORT133, GPIO_PORT134,
GPIO_PORT135, GPIO_PORT136, GPIO_PORT137, GPIO_PORT138, GPIO_PORT139,
GPIO_PORT140, GPIO_PORT141, GPIO_PORT142, GPIO_PORT143, GPIO_PORT144,
GPIO_PORT145, GPIO_PORT146, GPIO_PORT147, GPIO_PORT148, GPIO_PORT149,
GPIO_PORT150, GPIO_PORT151, GPIO_PORT152, GPIO_PORT153, GPIO_PORT154,
GPIO_PORT155, GPIO_PORT156, GPIO_PORT157, GPIO_PORT158, GPIO_PORT159,
GPIO_PORT160, GPIO_PORT161, GPIO_PORT162, GPIO_PORT163, GPIO_PORT164,
GPIO_PORT192, GPIO_PORT193, GPIO_PORT194,
GPIO_PORT195, GPIO_PORT196, GPIO_PORT197, GPIO_PORT198, GPIO_PORT199,
GPIO_PORT200, GPIO_PORT201, GPIO_PORT202, GPIO_PORT203, GPIO_PORT204,
GPIO_PORT205, GPIO_PORT206, GPIO_PORT207, GPIO_PORT208, GPIO_PORT209,
GPIO_PORT210, GPIO_PORT211, GPIO_PORT212, GPIO_PORT213, GPIO_PORT214,
GPIO_PORT215, GPIO_PORT216, GPIO_PORT217, GPIO_PORT218, GPIO_PORT219,
GPIO_PORT220, GPIO_PORT221, GPIO_PORT222, GPIO_PORT223, GPIO_PORT224,
GPIO_PORT225, GPIO_PORT226, GPIO_PORT227, GPIO_PORT228, GPIO_PORT229,
GPIO_PORT230, GPIO_PORT231, GPIO_PORT232, GPIO_PORT233, GPIO_PORT234,
GPIO_PORT235, GPIO_PORT236, GPIO_PORT237, GPIO_PORT238, GPIO_PORT239,
GPIO_PORT240, GPIO_PORT241, GPIO_PORT242, GPIO_PORT243, GPIO_PORT244,
GPIO_PORT245, GPIO_PORT246, GPIO_PORT247, GPIO_PORT248, GPIO_PORT249,
GPIO_PORT250, GPIO_PORT251, GPIO_PORT252, GPIO_PORT253, GPIO_PORT254,
GPIO_PORT255, GPIO_PORT256, GPIO_PORT257, GPIO_PORT258, GPIO_PORT259,
GPIO_PORT260, GPIO_PORT261, GPIO_PORT262, GPIO_PORT263, GPIO_PORT264,
GPIO_PORT265, GPIO_PORT266, GPIO_PORT267, GPIO_PORT268, GPIO_PORT269,
GPIO_PORT270, GPIO_PORT271, GPIO_PORT272, GPIO_PORT273, GPIO_PORT274,
GPIO_PORT275, GPIO_PORT276, GPIO_PORT277, GPIO_PORT278, GPIO_PORT279,
GPIO_PORT280, GPIO_PORT281, GPIO_PORT282,
GPIO_PORT288, GPIO_PORT289,
GPIO_PORT290, GPIO_PORT291, GPIO_PORT292, GPIO_PORT293, GPIO_PORT294,
GPIO_PORT295, GPIO_PORT296, GPIO_PORT297, GPIO_PORT298, GPIO_PORT299,
GPIO_PORT300, GPIO_PORT301, GPIO_PORT302, GPIO_PORT303, GPIO_PORT304,
GPIO_PORT305, GPIO_PORT306, GPIO_PORT307, GPIO_PORT308, GPIO_PORT309,
/* Table 25-1 (Function 0-7) */
GPIO_FN_GPI0 = 310,
GPIO_FN_GPI1,
GPIO_FN_GPI2,
GPIO_FN_GPI3,
GPIO_FN_GPI4,
GPIO_FN_GPI5,
GPIO_FN_GPI6,
GPIO_FN_GPI7,
GPIO_FN_GPO7, GPIO_FN_MFG0_OUT2,
GPIO_FN_GPO6, GPIO_FN_MFG1_OUT2,
GPIO_FN_GPO5,
GPIO_FN_PORT16_VIO_CKOR,
GPIO_FN_PORT19_VIO_CKO2,
GPIO_FN_GPO0,
GPIO_FN_GPO1,
GPIO_FN_GPO2, GPIO_FN_STATUS0,
GPIO_FN_GPO3, GPIO_FN_STATUS1,
GPIO_FN_GPO4, GPIO_FN_STATUS2,
GPIO_FN_VINT,
GPIO_FN_TCKON,
GPIO_FN_XDVFS1,
GPIO_FN_MFG0_OUT1, GPIO_FN_PORT27_IROUT,
GPIO_FN_XDVFS2,
GPIO_FN_PORT28_TPU1TO1,
GPIO_FN_SIM_RST, GPIO_FN_PORT29_TPU1TO1,
GPIO_FN_SIM_CLK, GPIO_FN_PORT30_VIO_CKOR,
GPIO_FN_SIM_D, GPIO_FN_PORT31_IROUT,
GPIO_FN_XWUP,
GPIO_FN_VACK,
GPIO_FN_XTAL1L,
GPIO_FN_PORT49_IROUT,
GPIO_FN_BBIF2_TSYNC2, GPIO_FN_TPU2TO2,
GPIO_FN_BBIF2_TSCK2, GPIO_FN_TPU2TO3,
GPIO_FN_BBIF2_TXD2,
GPIO_FN_TPU3TO3,
GPIO_FN_TPU3TO2,
GPIO_FN_TPU0TO0,
GPIO_FN_A0, GPIO_FN_BS_,
GPIO_FN_A12, GPIO_FN_TPU4TO2,
GPIO_FN_A13, GPIO_FN_TPU0TO1,
GPIO_FN_A14,
GPIO_FN_A15,
GPIO_FN_A16, GPIO_FN_MSIOF0_SS1,
GPIO_FN_A17, GPIO_FN_MSIOF0_TSYNC,
GPIO_FN_A18, GPIO_FN_MSIOF0_TSCK,
GPIO_FN_A19, GPIO_FN_MSIOF0_TXD,
GPIO_FN_A20, GPIO_FN_MSIOF0_RSCK,
GPIO_FN_A21, GPIO_FN_MSIOF0_RSYNC,
GPIO_FN_A22, GPIO_FN_MSIOF0_MCK0,
GPIO_FN_A23, GPIO_FN_MSIOF0_MCK1,
GPIO_FN_A24, GPIO_FN_MSIOF0_RXD,
GPIO_FN_A25, GPIO_FN_MSIOF0_SS2,
GPIO_FN_A26,
GPIO_FN_FCE1_,
GPIO_FN_DACK0,
GPIO_FN_FCE0_,
GPIO_FN_WAIT_, GPIO_FN_DREQ0,
GPIO_FN_FRB,
GPIO_FN_CKO,
GPIO_FN_NBRSTOUT_,
GPIO_FN_NBRST_,
GPIO_FN_BBIF2_TXD,
GPIO_FN_BBIF2_RXD,
GPIO_FN_BBIF2_SYNC,
GPIO_FN_BBIF2_SCK,
GPIO_FN_MFG3_IN2,
GPIO_FN_MFG3_IN1,
GPIO_FN_BBIF1_SS2, GPIO_FN_MFG3_OUT1,
GPIO_FN_HSI_RX_DATA, GPIO_FN_BBIF1_RXD,
GPIO_FN_HSI_TX_WAKE, GPIO_FN_BBIF1_TSCK,
GPIO_FN_HSI_TX_DATA, GPIO_FN_BBIF1_TSYNC,
GPIO_FN_HSI_TX_READY, GPIO_FN_BBIF1_TXD,
GPIO_FN_HSI_RX_READY, GPIO_FN_BBIF1_RSCK,
GPIO_FN_HSI_RX_WAKE, GPIO_FN_BBIF1_RSYNC,
GPIO_FN_HSI_RX_FLAG, GPIO_FN_BBIF1_SS1, GPIO_FN_BBIF1_FLOW,
GPIO_FN_HSI_TX_FLAG,
GPIO_FN_VIO_VD, GPIO_FN_VIO2_VD,
GPIO_FN_VIO_HD,
GPIO_FN_VIO2_HD,
GPIO_FN_VIO_D0, GPIO_FN_PORT130_MSIOF2_RXD,
GPIO_FN_VIO_D1, GPIO_FN_PORT131_MSIOF2_SS1,
GPIO_FN_VIO_D2, GPIO_FN_PORT132_MSIOF2_SS2,
GPIO_FN_VIO_D3, GPIO_FN_MSIOF2_TSYNC,
GPIO_FN_VIO_D4, GPIO_FN_MSIOF2_TXD,
GPIO_FN_VIO_D5, GPIO_FN_MSIOF2_TSCK,
GPIO_FN_VIO_D6,
GPIO_FN_VIO_D7,
GPIO_FN_VIO_D8, GPIO_FN_VIO2_D0,
GPIO_FN_VIO_D9, GPIO_FN_VIO2_D1,
GPIO_FN_VIO_D10, GPIO_FN_TPU0TO2, GPIO_FN_VIO2_D2,
GPIO_FN_VIO_D11, GPIO_FN_TPU0TO3, GPIO_FN_VIO2_D3,
GPIO_FN_VIO_D12, GPIO_FN_VIO2_D4,
GPIO_FN_VIO_D13,
GPIO_FN_VIO2_D5,
GPIO_FN_VIO_D14, GPIO_FN_VIO2_D6,
GPIO_FN_VIO_D15, GPIO_FN_TPU1TO3,
GPIO_FN_VIO2_D7,
GPIO_FN_VIO_CLK,
GPIO_FN_VIO2_CLK,
GPIO_FN_VIO_FIELD, GPIO_FN_VIO2_FIELD,
GPIO_FN_VIO_CKO,
GPIO_FN_A27, GPIO_FN_MFG0_IN1,
GPIO_FN_MFG0_IN2,
GPIO_FN_TS_SPSYNC3, GPIO_FN_MSIOF2_RSCK,
GPIO_FN_TS_SDAT3, GPIO_FN_MSIOF2_RSYNC,
GPIO_FN_TPU1TO2, GPIO_FN_TS_SDEN3, GPIO_FN_PORT153_MSIOF2_SS1,
GPIO_FN_MSIOF2_MCK0,
GPIO_FN_MSIOF2_MCK1,
GPIO_FN_PORT156_MSIOF2_SS2,
GPIO_FN_PORT157_MSIOF2_RXD,
GPIO_FN_DINT_, GPIO_FN_TS_SCK3,
GPIO_FN_NMI,
GPIO_FN_TPU3TO0,
GPIO_FN_BBIF2_TSYNC1,
GPIO_FN_BBIF2_TSCK1,
GPIO_FN_BBIF2_TXD1,
GPIO_FN_MFG2_OUT2,
GPIO_FN_TPU2TO1,
GPIO_FN_TPU4TO1, GPIO_FN_MFG4_OUT2,
GPIO_FN_D16,
GPIO_FN_D17,
GPIO_FN_D18,
GPIO_FN_D19,
GPIO_FN_D20,
GPIO_FN_D21,
GPIO_FN_D22,
GPIO_FN_PORT207_MSIOF0L_SS1, GPIO_FN_D23,
GPIO_FN_PORT208_MSIOF0L_SS2, GPIO_FN_D24,
GPIO_FN_D25,
GPIO_FN_DREQ2, GPIO_FN_PORT210_MSIOF0L_SS1, GPIO_FN_D26,
GPIO_FN_PORT211_MSIOF0L_SS2, GPIO_FN_D27,
GPIO_FN_TS_SPSYNC1, GPIO_FN_MSIOF0L_MCK0, GPIO_FN_D28,
GPIO_FN_TS_SDAT1, GPIO_FN_MSIOF0L_MCK1, GPIO_FN_D29,
GPIO_FN_TS_SDEN1, GPIO_FN_MSIOF0L_RSCK, GPIO_FN_D30,
GPIO_FN_TS_SCK1, GPIO_FN_MSIOF0L_RSYNC, GPIO_FN_D31,
GPIO_FN_DACK2,
GPIO_FN_MSIOF0L_TSYNC, GPIO_FN_VIO2_FIELD3,
GPIO_FN_DACK3,
GPIO_FN_PORT218_VIO_CKOR,
GPIO_FN_DREQ3, GPIO_FN_MSIOF0L_TSCK, GPIO_FN_VIO2_CLK3, \
GPIO_FN_DREQ1,
GPIO_FN_PWEN, GPIO_FN_MSIOF0L_RXD, GPIO_FN_VIO2_HD3, \
GPIO_FN_DACK1, GPIO_FN_OVCN,
GPIO_FN_MSIOF0L_TXD, GPIO_FN_VIO2_VD3,
GPIO_FN_OVCN2,
GPIO_FN_EXTLP, GPIO_FN_PORT226_VIO_CKO2,
GPIO_FN_IDIN,
GPIO_FN_MFG1_IN1,
GPIO_FN_MSIOF1_TXD,
GPIO_FN_MSIOF1_TSYNC,
GPIO_FN_MSIOF1_TSCK,
GPIO_FN_MSIOF1_RXD,
GPIO_FN_MSIOF1_RSCK, GPIO_FN_VIO2_CLK2,
GPIO_FN_MSIOF1_RSYNC, GPIO_FN_MFG1_IN2, GPIO_FN_VIO2_VD2, \
GPIO_FN_MSIOF1_MCK0,
GPIO_FN_MSIOF1_MCK1,
GPIO_FN_MSIOF1_SS1, GPIO_FN_VIO2_FIELD2,
GPIO_FN_MSIOF1_SS2, GPIO_FN_VIO2_HD2,
GPIO_FN_PORT241_IROUT, GPIO_FN_MFG4_OUT1, \
GPIO_FN_TPU4TO0,
GPIO_FN_MFG4_IN2,
GPIO_FN_PORT243_VIO_CKO2,
GPIO_FN_MFG2_IN1,
GPIO_FN_MSIOF2R_RXD,
GPIO_FN_MFG2_IN2,
GPIO_FN_MSIOF2R_TXD,
GPIO_FN_MFG1_OUT1,
GPIO_FN_TPU1TO0,
GPIO_FN_MFG3_OUT2,
GPIO_FN_TPU3TO1,
GPIO_FN_MFG2_OUT1,
GPIO_FN_TPU2TO0,
GPIO_FN_MSIOF2R_TSCK,
GPIO_FN_PORT249_IROUT, GPIO_FN_MFG4_IN1, \
GPIO_FN_MSIOF2R_TSYNC,
GPIO_FN_SDHICLK0,
GPIO_FN_SDHICD0,
GPIO_FN_SDHID0_0,
GPIO_FN_SDHID0_1,
GPIO_FN_SDHID0_2,
GPIO_FN_SDHID0_3,
GPIO_FN_SDHICMD0,
GPIO_FN_SDHIWP0,
GPIO_FN_SDHICLK1,
GPIO_FN_SDHID1_0, GPIO_FN_TS_SPSYNC2,
GPIO_FN_SDHID1_1, GPIO_FN_TS_SDAT2,
GPIO_FN_SDHID1_2, GPIO_FN_TS_SDEN2,
GPIO_FN_SDHID1_3, GPIO_FN_TS_SCK2,
GPIO_FN_SDHICMD1,
GPIO_FN_SDHICLK2,
GPIO_FN_SDHID2_0, GPIO_FN_TS_SPSYNC4,
GPIO_FN_SDHID2_1, GPIO_FN_TS_SDAT4,
GPIO_FN_SDHID2_2, GPIO_FN_TS_SDEN4,
GPIO_FN_SDHID2_3, GPIO_FN_TS_SCK4,
GPIO_FN_SDHICMD2,
GPIO_FN_MMCCLK0,
GPIO_FN_MMCD0_0,
GPIO_FN_MMCD0_1,
GPIO_FN_MMCD0_2,
GPIO_FN_MMCD0_3,
GPIO_FN_MMCD0_4, GPIO_FN_TS_SPSYNC5,
GPIO_FN_MMCD0_5, GPIO_FN_TS_SDAT5,
GPIO_FN_MMCD0_6, GPIO_FN_TS_SDEN5,
GPIO_FN_MMCD0_7, GPIO_FN_TS_SCK5,
GPIO_FN_MMCCMD0,
GPIO_FN_RESETOUTS_, GPIO_FN_EXTAL2OUT,
GPIO_FN_MCP_WAIT__MCP_FRB,
GPIO_FN_MCP_CKO, GPIO_FN_MMCCLK1,
GPIO_FN_MCP_D15_MCP_NAF15,
GPIO_FN_MCP_D14_MCP_NAF14,
GPIO_FN_MCP_D13_MCP_NAF13,
GPIO_FN_MCP_D12_MCP_NAF12,
GPIO_FN_MCP_D11_MCP_NAF11,
GPIO_FN_MCP_D10_MCP_NAF10,
GPIO_FN_MCP_D9_MCP_NAF9,
GPIO_FN_MCP_D8_MCP_NAF8, GPIO_FN_MMCCMD1,
GPIO_FN_MCP_D7_MCP_NAF7, GPIO_FN_MMCD1_7,
GPIO_FN_MCP_D6_MCP_NAF6, GPIO_FN_MMCD1_6,
GPIO_FN_MCP_D5_MCP_NAF5, GPIO_FN_MMCD1_5,
GPIO_FN_MCP_D4_MCP_NAF4, GPIO_FN_MMCD1_4,
GPIO_FN_MCP_D3_MCP_NAF3, GPIO_FN_MMCD1_3,
GPIO_FN_MCP_D2_MCP_NAF2, GPIO_FN_MMCD1_2,
GPIO_FN_MCP_D1_MCP_NAF1, GPIO_FN_MMCD1_1,
GPIO_FN_MCP_D0_MCP_NAF0, GPIO_FN_MMCD1_0,
GPIO_FN_MCP_NBRSTOUT_,
GPIO_FN_MCP_WE0__MCP_FWE, GPIO_FN_MCP_RDWR_MCP_FWE,
/* MSEL2 special case */
GPIO_FN_TSIF2_TS_XX1,
GPIO_FN_TSIF2_TS_XX2,
GPIO_FN_TSIF2_TS_XX3,
GPIO_FN_TSIF2_TS_XX4,
GPIO_FN_TSIF2_TS_XX5,
GPIO_FN_TSIF1_TS_XX1,
GPIO_FN_TSIF1_TS_XX2,
GPIO_FN_TSIF1_TS_XX3,
GPIO_FN_TSIF1_TS_XX4,
GPIO_FN_TSIF1_TS_XX5,
GPIO_FN_TSIF0_TS_XX1,
GPIO_FN_TSIF0_TS_XX2,
GPIO_FN_TSIF0_TS_XX3,
GPIO_FN_TSIF0_TS_XX4,
GPIO_FN_TSIF0_TS_XX5,
GPIO_FN_MST1_TS_XX1,
GPIO_FN_MST1_TS_XX2,
GPIO_FN_MST1_TS_XX3,
GPIO_FN_MST1_TS_XX4,
GPIO_FN_MST1_TS_XX5,
GPIO_FN_MST0_TS_XX1,
GPIO_FN_MST0_TS_XX2,
GPIO_FN_MST0_TS_XX3,
GPIO_FN_MST0_TS_XX4,
GPIO_FN_MST0_TS_XX5,
/* MSEL3 special cases */
GPIO_FN_SDHI0_VCCQ_MC0_ON,
GPIO_FN_SDHI0_VCCQ_MC0_OFF,
GPIO_FN_DEBUG_MON_VIO,
GPIO_FN_DEBUG_MON_LCDD,
GPIO_FN_LCDC_LCDC0,
GPIO_FN_LCDC_LCDC1,
/* MSEL4 special cases */
GPIO_FN_IRQ9_MEM_INT,
GPIO_FN_IRQ9_MCP_INT,
GPIO_FN_A11,
GPIO_FN_TPU4TO3,
GPIO_FN_RESETA_N_PU_ON,
GPIO_FN_RESETA_N_PU_OFF,
GPIO_FN_EDBGREQ_PD,
GPIO_FN_EDBGREQ_PU,
/* end of GPIO */
GPIO_NR,
};
/* DMA slave IDs */ /* DMA slave IDs */
enum { enum {

12
drivers/leds/Kconfig
View File

@ -429,18 +429,6 @@ config LEDS_ASIC3
cannot be used. This driver supports hardware blinking with an on+off cannot be used. This driver supports hardware blinking with an on+off
period from 62ms to 125s. Say Y to enable LEDs on the HP iPAQ hx4700. period from 62ms to 125s. Say Y to enable LEDs on the HP iPAQ hx4700.
config LEDS_RENESAS_TPU
bool "LED support for Renesas TPU"
depends on LEDS_CLASS=y && HAVE_CLK && GPIOLIB
help
This option enables build of the LED TPU platform driver,
suitable to drive any TPU channel on newer Renesas SoCs.
The driver controls the GPIO pin connected to the LED via
the GPIO framework and expects the LED to be connected to
a pin that can be driven in both GPIO mode and using TPU
pin function. The latter to support brightness control.
Brightness control is supported but hardware blinking is not.
config LEDS_TCA6507 config LEDS_TCA6507
tristate "LED Support for TCA6507 I2C chip" tristate "LED Support for TCA6507 I2C chip"
depends on LEDS_CLASS && I2C depends on LEDS_CLASS && I2C

1
drivers/leds/Makefile
View File

@ -49,7 +49,6 @@ obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o
obj-$(CONFIG_LEDS_NS2) += leds-ns2.o obj-$(CONFIG_LEDS_NS2) += leds-ns2.o
obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o
obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o
obj-$(CONFIG_LEDS_RENESAS_TPU) += leds-renesas-tpu.o
obj-$(CONFIG_LEDS_MAX8997) += leds-max8997.o obj-$(CONFIG_LEDS_MAX8997) += leds-max8997.o
obj-$(CONFIG_LEDS_LM355x) += leds-lm355x.o obj-$(CONFIG_LEDS_LM355x) += leds-lm355x.o
obj-$(CONFIG_LEDS_BLINKM) += leds-blinkm.o obj-$(CONFIG_LEDS_BLINKM) += leds-blinkm.o

337
drivers/leds/leds-renesas-tpu.c
View File

@ -1,337 +0,0 @@
/*
* LED control using Renesas TPU
*
* Copyright (C) 2011 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/printk.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/leds.h>
#include <linux/platform_data/leds-renesas-tpu.h>
#include <linux/gpio.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>
#include <linux/workqueue.h>
enum r_tpu_pin { R_TPU_PIN_UNUSED, R_TPU_PIN_GPIO, R_TPU_PIN_GPIO_FN };
enum r_tpu_timer { R_TPU_TIMER_UNUSED, R_TPU_TIMER_ON };
struct r_tpu_priv {
struct led_classdev ldev;
void __iomem *mapbase;
struct clk *clk;
struct platform_device *pdev;
enum r_tpu_pin pin_state;
enum r_tpu_timer timer_state;
unsigned long min_rate;
unsigned int refresh_rate;
struct work_struct work;
enum led_brightness new_brightness;
};
static DEFINE_SPINLOCK(r_tpu_lock);
#define TSTR -1 /* Timer start register (shared register) */
#define TCR 0 /* Timer control register (+0x00) */
#define TMDR 1 /* Timer mode register (+0x04) */
#define TIOR 2 /* Timer I/O control register (+0x08) */
#define TIER 3 /* Timer interrupt enable register (+0x0c) */
#define TSR 4 /* Timer status register (+0x10) */
#define TCNT 5 /* Timer counter (+0x14) */
#define TGRA 6 /* Timer general register A (+0x18) */
#define TGRB 7 /* Timer general register B (+0x1c) */
#define TGRC 8 /* Timer general register C (+0x20) */
#define TGRD 9 /* Timer general register D (+0x24) */
static inline u16 r_tpu_read(struct r_tpu_priv *p, int reg_nr)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs = reg_nr << 2;
if (reg_nr == TSTR)
return ioread16(base - cfg->channel_offset);
return ioread16(base + offs);
}
static inline void r_tpu_write(struct r_tpu_priv *p, int reg_nr, u16 value)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
void __iomem *base = p->mapbase;
unsigned long offs = reg_nr << 2;
if (reg_nr == TSTR) {
iowrite16(value, base - cfg->channel_offset);
return;
}
iowrite16(value, base + offs);
}
static void r_tpu_start_stop_ch(struct r_tpu_priv *p, int start)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
unsigned long flags;
u16 value;
/* start stop register shared by multiple timer channels */
spin_lock_irqsave(&r_tpu_lock, flags);
value = r_tpu_read(p, TSTR);
if (start)
value |= 1 << cfg->timer_bit;
else
value &= ~(1 << cfg->timer_bit);
r_tpu_write(p, TSTR, value);
spin_unlock_irqrestore(&r_tpu_lock, flags);
}
static int r_tpu_enable(struct r_tpu_priv *p, enum led_brightness brightness)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
int prescaler[] = { 1, 4, 16, 64 };
int k, ret;
unsigned long rate, tmp;
if (p->timer_state == R_TPU_TIMER_ON)
return 0;
/* wake up device and enable clock */
pm_runtime_get_sync(&p->pdev->dev);
ret = clk_enable(p->clk);
if (ret) {
dev_err(&p->pdev->dev, "cannot enable clock\n");
return ret;
}
/* make sure channel is disabled */
r_tpu_start_stop_ch(p, 0);
/* get clock rate after enabling it */
rate = clk_get_rate(p->clk);
/* pick the lowest acceptable rate */
for (k = ARRAY_SIZE(prescaler) - 1; k >= 0; k--)
if ((rate / prescaler[k]) >= p->min_rate)
break;
if (k < 0) {
dev_err(&p->pdev->dev, "clock rate mismatch\n");
goto err0;
}
dev_dbg(&p->pdev->dev, "rate = %lu, prescaler %u\n",
rate, prescaler[k]);
/* clear TCNT on TGRB match, count on rising edge, set prescaler */
r_tpu_write(p, TCR, 0x0040 | k);
/* output 0 until TGRA, output 1 until TGRB */
r_tpu_write(p, TIOR, 0x0002);
rate /= prescaler[k] * p->refresh_rate;
r_tpu_write(p, TGRB, rate);
dev_dbg(&p->pdev->dev, "TRGB = 0x%04lx\n", rate);
tmp = (cfg->max_brightness - brightness) * rate;
r_tpu_write(p, TGRA, tmp / cfg->max_brightness);
dev_dbg(&p->pdev->dev, "TRGA = 0x%04lx\n", tmp / cfg->max_brightness);
/* PWM mode */
r_tpu_write(p, TMDR, 0x0002);
/* enable channel */
r_tpu_start_stop_ch(p, 1);
p->timer_state = R_TPU_TIMER_ON;
return 0;
err0:
clk_disable(p->clk);
pm_runtime_put_sync(&p->pdev->dev);
return -ENOTSUPP;
}
static void r_tpu_disable(struct r_tpu_priv *p)
{
if (p->timer_state == R_TPU_TIMER_UNUSED)
return;
/* disable channel */
r_tpu_start_stop_ch(p, 0);
/* stop clock and mark device as idle */
clk_disable(p->clk);
pm_runtime_put_sync(&p->pdev->dev);
p->timer_state = R_TPU_TIMER_UNUSED;
}
static void r_tpu_set_pin(struct r_tpu_priv *p, enum r_tpu_pin new_state,
enum led_brightness brightness)
{
struct led_renesas_tpu_config *cfg = p->pdev->dev.platform_data;
if (p->pin_state == new_state) {
if (p->pin_state == R_TPU_PIN_GPIO)
gpio_set_value(cfg->pin_gpio, brightness);
return;
}
if (p->pin_state == R_TPU_PIN_GPIO)
gpio_free(cfg->pin_gpio);
if (p->pin_state == R_TPU_PIN_GPIO_FN)
gpio_free(cfg->pin_gpio_fn);
if (new_state == R_TPU_PIN_GPIO)
gpio_request_one(cfg->pin_gpio, !!brightness ?
GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW,
cfg->name);
if (new_state == R_TPU_PIN_GPIO_FN)
gpio_request(cfg->pin_gpio_fn, cfg->name);
p->pin_state = new_state;
}
static void r_tpu_work(struct work_struct *work)
{
struct r_tpu_priv *p = container_of(work, struct r_tpu_priv, work);
enum led_brightness brightness = p->new_brightness;
r_tpu_disable(p);
/* off and maximum are handled as GPIO pins, in between PWM */
if ((brightness == 0) || (brightness == p->ldev.max_brightness))
r_tpu_set_pin(p, R_TPU_PIN_GPIO, brightness);
else {
r_tpu_set_pin(p, R_TPU_PIN_GPIO_FN, 0);
r_tpu_enable(p, brightness);
}
}
static void r_tpu_set_brightness(struct led_classdev *ldev,
enum led_brightness brightness)
{
struct r_tpu_priv *p = container_of(ldev, struct r_tpu_priv, ldev);
p->new_brightness = brightness;
schedule_work(&p->work);
}
static int r_tpu_probe(struct platform_device *pdev)
{
struct led_renesas_tpu_config *cfg = pdev->dev.platform_data;
struct r_tpu_priv *p;
struct resource *res;
int ret;
if (!cfg) {
dev_err(&pdev->dev, "missing platform data\n");
return -ENODEV;
}
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
if (p == NULL) {
dev_err(&pdev->dev, "failed to allocate driver data\n");
return -ENOMEM;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "failed to get I/O memory\n");
return -ENXIO;
}
/* map memory, let mapbase point to our channel */
p->mapbase = devm_ioremap_nocache(&pdev->dev, res->start,
resource_size(res));
if (p->mapbase == NULL) {
dev_err(&pdev->dev, "failed to remap I/O memory\n");
return -ENXIO;
}
/* get hold of clock */
p->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(p->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
return PTR_ERR(p->clk);
}
p->pdev = pdev;
p->pin_state = R_TPU_PIN_UNUSED;
p->timer_state = R_TPU_TIMER_UNUSED;
p->refresh_rate = cfg->refresh_rate ? cfg->refresh_rate : 100;
r_tpu_set_pin(p, R_TPU_PIN_GPIO, LED_OFF);
platform_set_drvdata(pdev, p);
INIT_WORK(&p->work, r_tpu_work);
p->ldev.name = cfg->name;
p->ldev.brightness = LED_OFF;
p->ldev.max_brightness = cfg->max_brightness;
p->ldev.brightness_set = r_tpu_set_brightness;
p->ldev.flags |= LED_CORE_SUSPENDRESUME;
ret = led_classdev_register(&pdev->dev, &p->ldev);
if (ret < 0)
goto err0;
/* max_brightness may be updated by the LED core code */
p->min_rate = p->ldev.max_brightness * p->refresh_rate;
pm_runtime_enable(&pdev->dev);
return 0;
err0:
r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
return ret;
}
static int r_tpu_remove(struct platform_device *pdev)
{
struct r_tpu_priv *p = platform_get_drvdata(pdev);
r_tpu_set_brightness(&p->ldev, LED_OFF);
led_classdev_unregister(&p->ldev);
cancel_work_sync(&p->work);
r_tpu_disable(p);
r_tpu_set_pin(p, R_TPU_PIN_UNUSED, LED_OFF);
pm_runtime_disable(&pdev->dev);
return 0;
}
static struct platform_driver r_tpu_device_driver = {
.probe = r_tpu_probe,
.remove = r_tpu_remove,
.driver = {
.name = "leds-renesas-tpu",
}
};
module_platform_driver(r_tpu_device_driver);
MODULE_AUTHOR("Magnus Damm");
MODULE_DESCRIPTION("Renesas TPU LED Driver");
MODULE_LICENSE("GPL v2");

14
include/linux/platform_data/leds-renesas-tpu.h
View File

@ -1,14 +0,0 @@
#ifndef __LEDS_RENESAS_TPU_H__
#define __LEDS_RENESAS_TPU_H__
struct led_renesas_tpu_config {
char *name;
unsigned pin_gpio_fn;
unsigned pin_gpio;
unsigned int channel_offset;
unsigned int timer_bit;
unsigned int max_brightness;
unsigned int refresh_rate;
};
#endif /* __LEDS_RENESAS_TPU_H__ */