watchdog: mediatek: mt7988: add wdt support

Add support for watchdog and reset generator unit of the MediaTek
MT7988 SoC.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/c0cf5f701801cce60470853fa15f1d9dced78c4f.1700504385.git.daniel@makrotopia.org
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Daniel Golle 2023-11-20 18:22:31 +00:00 committed by Wim Van Sebroeck
parent a4d2116ee1
commit 137c9e08e5

View File

@ -58,9 +58,13 @@
#define WDT_SWSYSRST 0x18U
#define WDT_SWSYS_RST_KEY 0x88000000
#define WDT_SWSYSRST_EN 0xfc
#define DRV_NAME "mtk-wdt"
#define DRV_VERSION "1.0"
#define MT7988_TOPRGU_SW_RST_NUM 24
static bool nowayout = WATCHDOG_NOWAYOUT;
static unsigned int timeout;
@ -71,10 +75,12 @@ struct mtk_wdt_dev {
struct reset_controller_dev rcdev;
bool disable_wdt_extrst;
bool reset_by_toprgu;
bool has_swsysrst_en;
};
struct mtk_wdt_data {
int toprgu_sw_rst_num;
bool has_swsysrst_en;
};
static const struct mtk_wdt_data mt2712_data = {
@ -89,6 +95,11 @@ static const struct mtk_wdt_data mt7986_data = {
.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
};
static const struct mtk_wdt_data mt7988_data = {
.toprgu_sw_rst_num = MT7988_TOPRGU_SW_RST_NUM,
.has_swsysrst_en = true,
};
static const struct mtk_wdt_data mt8183_data = {
.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
};
@ -109,6 +120,28 @@ static const struct mtk_wdt_data mt8195_data = {
.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
};
/**
* toprgu_reset_sw_en_unlocked() - enable/disable software control for reset bit
* @data: Pointer to instance of driver data.
* @id: Bit number identifying the reset to be enabled or disabled.
* @enable: If true, enable software control for that bit, disable otherwise.
*
* Context: The caller must hold lock of struct mtk_wdt_dev.
*/
static void toprgu_reset_sw_en_unlocked(struct mtk_wdt_dev *data,
unsigned long id, bool enable)
{
u32 tmp;
tmp = readl(data->wdt_base + WDT_SWSYSRST_EN);
if (enable)
tmp |= BIT(id);
else
tmp &= ~BIT(id);
writel(tmp, data->wdt_base + WDT_SWSYSRST_EN);
}
static int toprgu_reset_update(struct reset_controller_dev *rcdev,
unsigned long id, bool assert)
{
@ -119,6 +152,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev,
spin_lock_irqsave(&data->lock, flags);
if (assert && data->has_swsysrst_en)
toprgu_reset_sw_en_unlocked(data, id, true);
tmp = readl(data->wdt_base + WDT_SWSYSRST);
if (assert)
tmp |= BIT(id);
@ -127,6 +163,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev,
tmp |= WDT_SWSYS_RST_KEY;
writel(tmp, data->wdt_base + WDT_SWSYSRST);
if (!assert && data->has_swsysrst_en)
toprgu_reset_sw_en_unlocked(data, id, false);
spin_unlock_irqrestore(&data->lock, flags);
return 0;
@ -406,6 +445,8 @@ static int mtk_wdt_probe(struct platform_device *pdev)
wdt_data->toprgu_sw_rst_num);
if (err)
return err;
mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en;
}
mtk_wdt->disable_wdt_extrst =
@ -444,6 +485,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt6589-wdt" },
{ .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data },
{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
{ .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
{ .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data },
{ .compatible = "mediatek,mt8188-wdt", .data = &mt8188_data },