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watchdog: mediatek: mt7988: add wdt support
Add support for watchdog and reset generator unit of the MediaTek MT7988 SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/r/c0cf5f701801cce60470853fa15f1d9dced78c4f.1700504385.git.daniel@makrotopia.org Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
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@ -58,9 +58,13 @@
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#define WDT_SWSYSRST 0x18U
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#define WDT_SWSYS_RST_KEY 0x88000000
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#define WDT_SWSYSRST_EN 0xfc
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#define DRV_NAME "mtk-wdt"
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#define DRV_VERSION "1.0"
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#define MT7988_TOPRGU_SW_RST_NUM 24
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static unsigned int timeout;
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@ -71,10 +75,12 @@ struct mtk_wdt_dev {
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struct reset_controller_dev rcdev;
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bool disable_wdt_extrst;
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bool reset_by_toprgu;
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bool has_swsysrst_en;
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};
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struct mtk_wdt_data {
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int toprgu_sw_rst_num;
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bool has_swsysrst_en;
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};
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static const struct mtk_wdt_data mt2712_data = {
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@ -89,6 +95,11 @@ static const struct mtk_wdt_data mt7986_data = {
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.toprgu_sw_rst_num = MT7986_TOPRGU_SW_RST_NUM,
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};
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static const struct mtk_wdt_data mt7988_data = {
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.toprgu_sw_rst_num = MT7988_TOPRGU_SW_RST_NUM,
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.has_swsysrst_en = true,
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};
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static const struct mtk_wdt_data mt8183_data = {
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.toprgu_sw_rst_num = MT8183_TOPRGU_SW_RST_NUM,
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};
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@ -109,6 +120,28 @@ static const struct mtk_wdt_data mt8195_data = {
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.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
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};
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/**
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* toprgu_reset_sw_en_unlocked() - enable/disable software control for reset bit
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* @data: Pointer to instance of driver data.
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* @id: Bit number identifying the reset to be enabled or disabled.
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* @enable: If true, enable software control for that bit, disable otherwise.
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*
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* Context: The caller must hold lock of struct mtk_wdt_dev.
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*/
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static void toprgu_reset_sw_en_unlocked(struct mtk_wdt_dev *data,
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unsigned long id, bool enable)
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{
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u32 tmp;
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tmp = readl(data->wdt_base + WDT_SWSYSRST_EN);
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if (enable)
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tmp |= BIT(id);
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else
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tmp &= ~BIT(id);
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writel(tmp, data->wdt_base + WDT_SWSYSRST_EN);
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}
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static int toprgu_reset_update(struct reset_controller_dev *rcdev,
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unsigned long id, bool assert)
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{
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@ -119,6 +152,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev,
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spin_lock_irqsave(&data->lock, flags);
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if (assert && data->has_swsysrst_en)
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toprgu_reset_sw_en_unlocked(data, id, true);
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tmp = readl(data->wdt_base + WDT_SWSYSRST);
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if (assert)
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tmp |= BIT(id);
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@ -127,6 +163,9 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev,
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tmp |= WDT_SWSYS_RST_KEY;
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writel(tmp, data->wdt_base + WDT_SWSYSRST);
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if (!assert && data->has_swsysrst_en)
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toprgu_reset_sw_en_unlocked(data, id, false);
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spin_unlock_irqrestore(&data->lock, flags);
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return 0;
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@ -406,6 +445,8 @@ static int mtk_wdt_probe(struct platform_device *pdev)
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wdt_data->toprgu_sw_rst_num);
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if (err)
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return err;
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mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en;
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}
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mtk_wdt->disable_wdt_extrst =
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@ -444,6 +485,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
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{ .compatible = "mediatek,mt6589-wdt" },
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{ .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data },
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{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
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{ .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data },
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{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
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{ .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data },
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{ .compatible = "mediatek,mt8188-wdt", .data = &mt8188_data },
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