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[ARM] 3473/1: Use numbers 0-15 for the VFP double registers
Patch from Catalin Marinas This patch changes the double registers numbering to 0-15 from even 0-30, in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO bug (value 16 actually represents the 8th double register with the original numbering). The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of FMRRD/FMDRR. The patch changes to CP11 for the correct instructions. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -1127,9 +1127,9 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
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{
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u32 op = inst & FOP_MASK;
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u32 exceptions = 0;
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unsigned int dd = vfp_get_sd(inst);
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unsigned int dn = vfp_get_sn(inst);
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unsigned int dm = vfp_get_sm(inst);
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unsigned int dd = vfp_get_dd(inst);
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unsigned int dn = vfp_get_dn(inst);
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unsigned int dm = vfp_get_dm(inst);
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unsigned int vecitr, veclen, vecstride;
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u32 (*fop)(int, int, s32, u32);
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@ -1146,7 +1146,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
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pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
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(veclen >> FPSCR_LENGTH_BIT) + 1);
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fop = (op == FOP_EXT) ? fop_extfns[dn] : fop_fns[FOP_TO_IDX(op)];
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fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
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if (!fop)
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goto invalid;
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@ -1154,17 +1154,13 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
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u32 except;
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if (op == FOP_EXT)
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pr_debug("VFP: itr%d (d%u.%u) = op[%u] (d%u.%u)\n",
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pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n",
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vecitr >> FPSCR_LENGTH_BIT,
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dd >> 1, dd & 1, dn,
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dm >> 1, dm & 1);
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dd, dn, dm);
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else
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pr_debug("VFP: itr%d (d%u.%u) = (d%u.%u) op[%u] (d%u.%u)\n",
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pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n",
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vecitr >> FPSCR_LENGTH_BIT,
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dd >> 1, dd & 1,
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dn >> 1, dn & 1,
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FOP_TO_IDX(op),
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dm >> 1, dm & 1);
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dd, dn, FOP_TO_IDX(op), dm);
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except = fop(dd, dn, dm, fpscr);
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pr_debug("VFP: itr%d: exceptions=%08x\n",
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@ -189,11 +189,10 @@ vfp_put_float:
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.globl vfp_get_double
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vfp_get_double:
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mov r0, r0, lsr #1
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add pc, pc, r0, lsl #3
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mov r0, r0
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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mrrc p10, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
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mrrc p11, 1, r0, r1, c\dr @ fmrrd r0, r1, d\dr
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mov pc, lr
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.endr
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@ -204,10 +203,9 @@ vfp_get_double:
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.globl vfp_put_double
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vfp_put_double:
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mov r0, r0, lsr #1
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add pc, pc, r0, lsl #3
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mov r0, r0
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.irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
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mcrr p10, 1, r1, r2, c\dr @ fmrrd r1, r2, d\dr
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mcrr p11, 1, r1, r2, c\dr @ fmdrr r1, r2, d\dr
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mov pc, lr
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.endr
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@ -1193,7 +1193,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr)
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pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
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(veclen >> FPSCR_LENGTH_BIT) + 1);
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fop = (op == FOP_EXT) ? fop_extfns[sn] : fop_fns[FOP_TO_IDX(op)];
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fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
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if (!fop)
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goto invalid;
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