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iio: add ad5761 DAC driver
ad5761 is a 1-channel DAC with configurable output range. The driver uses the regulator interface for its voltage ref. It shares its register layout with ad5761r, ad5721 and ad5721r. Differences: ad5761* are 16 bit, ad5721* are 12 bits. ad57*1r have an internal reference. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Ricardo Ribalda Delgado
Jonathan Cameron
parent
7ca6574a7a
commit
131497acd8
1
CREDITS
1
CREDITS
@ -3035,6 +3035,7 @@ D: PLX USB338x driver
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D: PCA9634 driver
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D: Option GTM671WFS
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D: Fintek F81216A
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D: AD5761 iio driver
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D: Various kernel hacks
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S: Qtechnology A/S
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S: Valby Langgade 142
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@ -111,6 +111,16 @@ config AD5755
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To compile this driver as a module, choose M here: the
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module will be called ad5755.
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config AD5761
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tristate "Analog Devices AD5761/61R/21/21R DAC driver"
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depends on SPI_MASTER
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help
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Say yes here to build support for Analog Devices AD5761, AD5761R, AD5721,
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AD5721R Digital to Analog Converter.
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To compile this driver as a module, choose M here: the
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module will be called ad5761.
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config AD5764
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tristate "Analog Devices AD5764/64R/44/44R DAC driver"
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depends on SPI_MASTER
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@ -12,6 +12,7 @@ obj-$(CONFIG_AD5504) += ad5504.o
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obj-$(CONFIG_AD5446) += ad5446.o
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obj-$(CONFIG_AD5449) += ad5449.o
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obj-$(CONFIG_AD5755) += ad5755.o
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obj-$(CONFIG_AD5761) += ad5761.o
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obj-$(CONFIG_AD5764) += ad5764.o
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obj-$(CONFIG_AD5791) += ad5791.o
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obj-$(CONFIG_AD5686) += ad5686.o
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430
drivers/iio/dac/ad5761.c
Normal file
430
drivers/iio/dac/ad5761.c
Normal file
@ -0,0 +1,430 @@
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/*
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* AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
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*
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* Copyright 2016 Qtechnology A/S
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* 2016 Ricardo Ribalda <ricardo.ribalda@gmail.com>
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/spi/spi.h>
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#include <linux/bitops.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include <linux/platform_data/ad5761.h>
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#define AD5761_ADDR(addr) ((addr & 0xf) << 16)
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#define AD5761_ADDR_NOOP 0x0
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#define AD5761_ADDR_DAC_WRITE 0x3
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#define AD5761_ADDR_CTRL_WRITE_REG 0x4
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#define AD5761_ADDR_SW_DATA_RESET 0x7
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#define AD5761_ADDR_DAC_READ 0xb
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#define AD5761_ADDR_CTRL_READ_REG 0xc
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#define AD5761_ADDR_SW_FULL_RESET 0xf
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#define AD5761_CTRL_USE_INTVREF BIT(5)
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#define AD5761_CTRL_ETS BIT(6)
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/**
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* struct ad5761_chip_info - chip specific information
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* @int_vref: Value of the internal reference voltage in mV - 0 if external
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* reference voltage is used
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* @channel: channel specification
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*/
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struct ad5761_chip_info {
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unsigned long int_vref;
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const struct iio_chan_spec channel;
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};
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struct ad5761_range_params {
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int m;
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int c;
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};
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enum ad5761_supported_device_ids {
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ID_AD5721,
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ID_AD5721R,
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ID_AD5761,
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ID_AD5761R,
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};
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/**
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* struct ad5761_state - driver instance specific data
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* @spi: spi_device
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* @vref_reg: reference voltage regulator
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* @use_intref: true when the internal voltage reference is used
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* @vref: actual voltage reference in mVolts
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* @range: output range mode used
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* @data: cache aligned spi buffer
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*/
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struct ad5761_state {
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struct spi_device *spi;
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struct regulator *vref_reg;
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bool use_intref;
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int vref;
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enum ad5761_voltage_range range;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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union {
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__be32 d32;
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u8 d8[4];
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} data[3] ____cacheline_aligned;
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};
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static const struct ad5761_range_params ad5761_range_params[] = {
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[AD5761_VOLTAGE_RANGE_M10V_10V] = {
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.m = 80,
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.c = 40,
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},
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[AD5761_VOLTAGE_RANGE_0V_10V] = {
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.m = 40,
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.c = 0,
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},
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[AD5761_VOLTAGE_RANGE_M5V_5V] = {
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.m = 40,
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.c = 20,
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},
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[AD5761_VOLTAGE_RANGE_0V_5V] = {
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.m = 20,
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.c = 0,
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},
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[AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
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.m = 40,
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.c = 10,
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},
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[AD5761_VOLTAGE_RANGE_M3V_3V] = {
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.m = 24,
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.c = 12,
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},
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[AD5761_VOLTAGE_RANGE_0V_16V] = {
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.m = 64,
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.c = 0,
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},
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[AD5761_VOLTAGE_RANGE_0V_20V] = {
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.m = 80,
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.c = 0,
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},
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};
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static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
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{
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st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);
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return spi_write(st->spi, &st->data[0].d8[1], 3);
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}
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static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
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{
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struct ad5761_state *st = iio_priv(indio_dev);
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int ret;
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mutex_lock(&indio_dev->mlock);
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ret = _ad5761_spi_write(st, addr, val);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
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{
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int ret;
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struct spi_transfer xfers[] = {
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{
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.tx_buf = &st->data[0].d8[1],
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.bits_per_word = 8,
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.len = 3,
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.cs_change = true,
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}, {
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.tx_buf = &st->data[1].d8[1],
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.rx_buf = &st->data[2].d8[1],
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.bits_per_word = 8,
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.len = 3,
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},
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};
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st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
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st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
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ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
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*val = be32_to_cpu(st->data[2].d32);
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return ret;
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}
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static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
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{
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struct ad5761_state *st = iio_priv(indio_dev);
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int ret;
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mutex_lock(&indio_dev->mlock);
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ret = _ad5761_spi_read(st, addr, val);
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mutex_unlock(&indio_dev->mlock);
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return ret;
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}
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static int ad5761_spi_set_range(struct ad5761_state *st,
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enum ad5761_voltage_range range)
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{
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u16 aux;
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int ret;
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aux = (range & 0x7) | AD5761_CTRL_ETS;
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if (st->use_intref)
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aux |= AD5761_CTRL_USE_INTVREF;
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ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
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if (ret)
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return ret;
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ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
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if (ret)
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return ret;
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st->range = range;
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return 0;
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}
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static int ad5761_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long mask)
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{
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struct ad5761_state *st;
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int ret;
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u16 aux;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
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if (ret)
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return ret;
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*val = aux >> chan->scan_type.shift;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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st = iio_priv(indio_dev);
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*val = st->vref * ad5761_range_params[st->range].m;
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*val /= 10;
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*val2 = chan->scan_type.realbits;
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return IIO_VAL_FRACTIONAL_LOG2;
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case IIO_CHAN_INFO_OFFSET:
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st = iio_priv(indio_dev);
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*val = -(1 << chan->scan_type.realbits);
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*val *= ad5761_range_params[st->range].c;
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*val /= ad5761_range_params[st->range].m;
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return IIO_VAL_INT;
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default:
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return -EINVAL;
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}
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}
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static int ad5761_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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{
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u16 aux;
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if (mask != IIO_CHAN_INFO_RAW)
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return -EINVAL;
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if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
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return -EINVAL;
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aux = val << chan->scan_type.shift;
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return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
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}
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static const struct iio_info ad5761_info = {
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.read_raw = &ad5761_read_raw,
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.write_raw = &ad5761_write_raw,
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.driver_module = THIS_MODULE,
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};
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#define AD5761_CHAN(_bits) { \
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.type = IIO_VOLTAGE, \
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.output = 1, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_OFFSET), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (_bits), \
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.storagebits = 16, \
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.shift = 16 - (_bits), \
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}, \
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}
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static const struct ad5761_chip_info ad5761_chip_infos[] = {
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[ID_AD5721] = {
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.int_vref = 0,
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.channel = AD5761_CHAN(12),
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},
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[ID_AD5721R] = {
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.int_vref = 2500,
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.channel = AD5761_CHAN(12),
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},
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[ID_AD5761] = {
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.int_vref = 0,
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.channel = AD5761_CHAN(16),
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},
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[ID_AD5761R] = {
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.int_vref = 2500,
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.channel = AD5761_CHAN(16),
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},
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};
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static int ad5761_get_vref(struct ad5761_state *st,
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const struct ad5761_chip_info *chip_info)
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{
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int ret;
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st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
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if (PTR_ERR(st->vref_reg) == -ENODEV) {
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/* Use Internal regulator */
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if (!chip_info->int_vref) {
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dev_err(&st->spi->dev,
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"Voltage reference not found\n");
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return -EIO;
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}
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st->use_intref = true;
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st->vref = chip_info->int_vref;
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return 0;
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}
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if (IS_ERR(st->vref_reg)) {
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dev_err(&st->spi->dev,
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"Error getting voltage reference regulator\n");
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return PTR_ERR(st->vref_reg);
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}
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ret = regulator_enable(st->vref_reg);
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if (ret) {
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dev_err(&st->spi->dev,
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"Failed to enable voltage reference\n");
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return ret;
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}
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ret = regulator_get_voltage(st->vref_reg);
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if (ret < 0) {
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dev_err(&st->spi->dev,
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"Failed to get voltage reference value\n");
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goto disable_regulator_vref;
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}
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if (ret < 2000000 || ret > 3000000) {
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dev_warn(&st->spi->dev,
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"Invalid external voltage ref. value %d uV\n", ret);
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ret = -EIO;
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goto disable_regulator_vref;
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}
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st->vref = ret / 1000;
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st->use_intref = false;
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return 0;
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disable_regulator_vref:
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regulator_disable(st->vref_reg);
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st->vref_reg = NULL;
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return ret;
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}
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static int ad5761_probe(struct spi_device *spi)
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{
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struct iio_dev *iio_dev;
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struct ad5761_state *st;
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int ret;
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const struct ad5761_chip_info *chip_info =
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&ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
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enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
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struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);
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iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (!iio_dev)
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return -ENOMEM;
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st = iio_priv(iio_dev);
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st->spi = spi;
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spi_set_drvdata(spi, iio_dev);
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ret = ad5761_get_vref(st, chip_info);
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if (ret)
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return ret;
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if (pdata)
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voltage_range = pdata->voltage_range;
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ret = ad5761_spi_set_range(st, voltage_range);
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if (ret)
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goto disable_regulator_err;
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iio_dev->dev.parent = &spi->dev;
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iio_dev->info = &ad5761_info;
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iio_dev->modes = INDIO_DIRECT_MODE;
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iio_dev->channels = &chip_info->channel;
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iio_dev->num_channels = 1;
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iio_dev->name = spi_get_device_id(st->spi)->name;
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ret = iio_device_register(iio_dev);
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if (ret)
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goto disable_regulator_err;
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return 0;
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disable_regulator_err:
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if (!IS_ERR_OR_NULL(st->vref_reg))
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regulator_disable(st->vref_reg);
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return ret;
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}
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static int ad5761_remove(struct spi_device *spi)
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{
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struct iio_dev *iio_dev = spi_get_drvdata(spi);
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struct ad5761_state *st = iio_priv(iio_dev);
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iio_device_unregister(iio_dev);
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if (!IS_ERR_OR_NULL(st->vref_reg))
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regulator_disable(st->vref_reg);
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return 0;
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}
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static const struct spi_device_id ad5761_id[] = {
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{"ad5721", ID_AD5721},
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{"ad5721r", ID_AD5721R},
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{"ad5761", ID_AD5761},
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{"ad5761r", ID_AD5761R},
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{}
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};
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MODULE_DEVICE_TABLE(spi, ad5761_id);
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static struct spi_driver ad5761_driver = {
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.driver = {
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.name = "ad5761",
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},
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.probe = ad5761_probe,
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.remove = ad5761_remove,
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.id_table = ad5761_id,
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};
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module_spi_driver(ad5761_driver);
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MODULE_AUTHOR("Ricardo Ribalda <ricardo.ribalda@gmail.com>");
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MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
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MODULE_LICENSE("GPL v2");
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44
include/linux/platform_data/ad5761.h
Normal file
44
include/linux/platform_data/ad5761.h
Normal file
@ -0,0 +1,44 @@
|
||||
/*
|
||||
* AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
|
||||
*
|
||||
* Copyright 2016 Qtechnology A/S
|
||||
* 2016 Ricardo Ribalda <ricardo.ribalda@gmail.com>
|
||||
*
|
||||
* Licensed under the GPL-2.
|
||||
*/
|
||||
#ifndef __LINUX_PLATFORM_DATA_AD5761_H__
|
||||
#define __LINUX_PLATFORM_DATA_AD5761_H__
|
||||
|
||||
/**
|
||||
* enum ad5761_voltage_range - Voltage range the AD5761 is configured for.
|
||||
* @AD5761_VOLTAGE_RANGE_M10V_10V: -10V to 10V
|
||||
* @AD5761_VOLTAGE_RANGE_0V_10V: 0V to 10V
|
||||
* @AD5761_VOLTAGE_RANGE_M5V_5V: -5V to 5V
|
||||
* @AD5761_VOLTAGE_RANGE_0V_5V: 0V to 5V
|
||||
* @AD5761_VOLTAGE_RANGE_M2V5_7V5: -2.5V to 7.5V
|
||||
* @AD5761_VOLTAGE_RANGE_M3V_3V: -3V to 3V
|
||||
* @AD5761_VOLTAGE_RANGE_0V_16V: 0V to 16V
|
||||
* @AD5761_VOLTAGE_RANGE_0V_20V: 0V to 20V
|
||||
*/
|
||||
|
||||
enum ad5761_voltage_range {
|
||||
AD5761_VOLTAGE_RANGE_M10V_10V,
|
||||
AD5761_VOLTAGE_RANGE_0V_10V,
|
||||
AD5761_VOLTAGE_RANGE_M5V_5V,
|
||||
AD5761_VOLTAGE_RANGE_0V_5V,
|
||||
AD5761_VOLTAGE_RANGE_M2V5_7V5,
|
||||
AD5761_VOLTAGE_RANGE_M3V_3V,
|
||||
AD5761_VOLTAGE_RANGE_0V_16V,
|
||||
AD5761_VOLTAGE_RANGE_0V_20V,
|
||||
};
|
||||
|
||||
/**
|
||||
* struct ad5761_platform_data - AD5761 DAC driver platform data
|
||||
* @voltage_range: Voltage range the AD5761 is configured for
|
||||
*/
|
||||
|
||||
struct ad5761_platform_data {
|
||||
enum ad5761_voltage_range voltage_range;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue
Block a user