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ALSA: hdac: clear link output stream mapping

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Fix potential DMA hang upon starting playback on devices in HDA mode
on Intel platforms (Gemini Lake/Whiskey Lake/Comet Lake/Ice Lake). It
doesn't affect platforms before Gemini Lake or any Intel device in
non-HDA mode.

The reset value for the LOSDIV register is all output streams valid.
Clear this register to invalidate non-existent streams when the bus
is powered up.

Signed-off-by: Rander Wang <rander.wang@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20190930142945.7805-1-pierre-louis.bossart@linux.intel.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Rander Wang 2019-09-30 09:29:45 -05:00 committed by Takashi Iwai
parent 1099f48457
commit 130bce3afb
2 changed files with 8 additions and 0 deletions
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3
include/sound/hda_register.h
View File

@ -264,6 +264,9 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_ML_LOUTPAY 0x20 #define AZX_REG_ML_LOUTPAY 0x20
#define AZX_REG_ML_LINPAY 0x30 #define AZX_REG_ML_LINPAY 0x30
/* bit0 is reserved, with BIT(1) mapping to stream1 */
#define ML_LOSIDV_STREAM_MASK 0xFFFE
#define ML_LCTL_SCF_MASK 0xF #define ML_LCTL_SCF_MASK 0xF
#define AZX_MLCTL_SPA (0x1 << 16) #define AZX_MLCTL_SPA (0x1 << 16)
#define AZX_MLCTL_CPA (0x1 << 23) #define AZX_MLCTL_CPA (0x1 << 23)

5
sound/hda/ext/hdac_ext_controller.c
View File

@ -270,6 +270,11 @@ int snd_hdac_ext_bus_link_get(struct hdac_bus *bus,
ret = snd_hdac_ext_bus_link_power_up(link); ret = snd_hdac_ext_bus_link_power_up(link);
/*
* clear the register to invalidate all the output streams
*/
snd_hdac_updatew(link->ml_addr, AZX_REG_ML_LOSIDV,
ML_LOSIDV_STREAM_MASK, 0);
/* /*
* wait for 521usec for codec to report status * wait for 521usec for codec to report status
* HDA spec section 4.3 - Codec Discovery * HDA spec section 4.3 - Codec Discovery