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net: dsa: mt7530: fix network connectivity with multiple CPU ports

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On mt753x_cpu_port_enable() there's code that enables flooding for the CPU
port only. Since mt753x_cpu_port_enable() runs twice when both CPU ports
are enabled, port 6 becomes the only port to forward the frames to. But
port 5 is the active port, so no frames received from the user ports will
be forwarded to port 5 which breaks network connectivity.

Every bit of the BC_FFP, UNM_FFP, and UNU_FFP bits represents a port. Fix
this issue by setting the bit that corresponds to the CPU port without
overwriting the other bits.

Clear the bits beforehand only for the MT7531 switch. According to the
documents MT7621 Giga Switch Programming Guide v0.3 and MT7531 Reference
Manual for Development Board v1.0, after reset, the BC_FFP, UNM_FFP, and
UNU_FFP bits are set to 1 for MT7531, 0 for MT7530.

The commit 5e5502e012 ("net: dsa: mt7530: fix roaming from DSA user
ports") silently changed the method to set the bits on the MT7530_MFC.
Instead of clearing the relevant bits before mt7530_cpu_port_enable()
which runs under a for loop, the commit started doing it on
mt7530_cpu_port_enable().

Back then, this didn't really matter as only a single CPU port could be
used since the CPU port number was hardcoded. The driver was later changed
with commit 1f9a6abecf ("net: dsa: mt7530: get cpu-port via dp->cpu_dp
instead of constant") to retrieve the CPU port via dp->cpu_dp. With that,
this silent change became an issue for when using multiple CPU ports.

Fixes: 5e5502e012 ("net: dsa: mt7530: fix roaming from DSA user ports")
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Arınç ÜNAL 2023-05-03 00:09:47 +03:00 committed by David S. Miller
parent 37c218d802
commit 120a56b01b
1 changed files with 7 additions and 3 deletions
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10
drivers/net/dsa/mt7530.c
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@ -1002,9 +1002,9 @@ mt753x_cpu_port_enable(struct dsa_switch *ds, int port)
mt7530_write(priv, MT7530_PVC_P(port), mt7530_write(priv, MT7530_PVC_P(port),
PORT_SPEC_TAG); PORT_SPEC_TAG);
/* Disable flooding by default */ /* Enable flooding on the CPU port */
mt7530_rmw(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK | UNU_FFP_MASK, mt7530_set(priv, MT7530_MFC, BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) |
BC_FFP(BIT(port)) | UNM_FFP(BIT(port)) | UNU_FFP(BIT(port))); UNU_FFP(BIT(port)));
/* Set CPU port number */ /* Set CPU port number */
if (priv->id == ID_MT7621) if (priv->id == ID_MT7621)
@ -2367,6 +2367,10 @@ mt7531_setup_common(struct dsa_switch *ds)
/* Enable and reset MIB counters */ /* Enable and reset MIB counters */
mt7530_mib_reset(ds); mt7530_mib_reset(ds);
/* Disable flooding on all ports */
mt7530_clear(priv, MT7530_MFC, BC_FFP_MASK | UNM_FFP_MASK |
UNU_FFP_MASK);
for (i = 0; i < MT7530_NUM_PORTS; i++) { for (i = 0; i < MT7530_NUM_PORTS; i++) {
/* Disable forwarding by default on all ports */ /* Disable forwarding by default on all ports */
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK, mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,