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Qualcomm ARM dts updates for v5.6
* Add SAW L2 nodes to boot secondary cpus on IPQ40xx * Fix remaining IRQ_TYPE_NONE on APQ8084 * Update tsens node to new style * Add modem remoteproc node to MSM8974 * Move ADSP SMD edge into ADSP remoteproc node for MSM8974 * Add and enable wireless communication subsystem on MSM8974 and Fairphone 2 * Add MSM8974 interconnect provider nodes * Add MSM8974 OCMEM node -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl4c0IUbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FOAcQALxmOUkh3hvFf6dq+V+d apDLrVR2etN1iYaOTU+NJGjOdXnY9sCzQK4J7OHZnzjzdyYXeI59gSZRvZxGya+P o0vncr3DTMjJX7sHsHYE6KUtPuYnttQ/YThcva6Mb+kMfqxopNNKDiby/1o+qDKU MH9/NoE94AHOYMoZ5zVo2xZZXRXWeu4dGzilzN/NMiOIA2wwYZBlia3iciKU5KWY 715Dyz5G4DRmfiWuJ5MLQRjSLPk0tdXgLTx0m08Z9IbQWO8wYUUP6Ro9VRUS7hyV zL/dABOJcfqlo6iVrBoBZ48nIAjfYMWykCFG4mY3UwTOAyiee/ErzY5OENBhzwCa woWN3wHphJ1YJX5VirA4tMA4abZ0s3J/A1JiUhHbhlFvkXrq2grYWBqXiIF8unOI hE275H3YH4DqwyINePrtJxNgXRsJqQMgi+tpMFm6vSxdEtsVKEBmnAcGzN+916Kt LIQ+1gT5VlIeyZHCCSaHzaW98TIfhsarVj0MRqtjFZvy4PxezuGsO/Y5Fj82ET8Y C3WFCyulOHHGEjGzcbSgMt0rU7mctJA2bpAEP1FabIb9825vCJ9KaytMLWcJ3laF SzaxCJ21pmqFr/R3v2Ln5Pwb3+zrmik15Lte7jcKUp0wJFWoh78nJv07pGEZ7EJe ESn9GpuAFJj4sf+o0AQRI0Iy =Euws -----END PGP SIGNATURE----- Merge tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM dts updates for v5.6 * Add SAW L2 nodes to boot secondary cpus on IPQ40xx * Fix remaining IRQ_TYPE_NONE on APQ8084 * Update tsens node to new style * Add modem remoteproc node to MSM8974 * Move ADSP SMD edge into ADSP remoteproc node for MSM8974 * Add and enable wireless communication subsystem on MSM8974 and Fairphone 2 * Add MSM8974 interconnect provider nodes * Add MSM8974 OCMEM node * tag 'qcom-dts-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: Add nodes for SMP boot in IPQ40xx ARM: dts: qcom: apq8084: Remove all instances of IRQ_TYPE_NONE ARM: dts: qcom: apq8084: Change tsens definition to new style ARM: dts: msm8974: Move ADSP smd edge to ADSP PIL ARM: dts: msm8974: Add modem remoteproc node ARM: dts: msm8974-FP2: Introduce the wcnss remoteproc node ARM: dts: msm8974: Introduce the wcnss remoteproc node ARM: dts: qcom: msm8974: add interconnect nodes ARM: dts: qcom: msm8974: add ocmem node Link: https://lore.kernel.org/r/20200113204448.GE3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
116a4b85f6
@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-apq8084.h>
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#include <dt-bindings/gpio/gpio.h>
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@ -184,7 +185,7 @@
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cpu-pmu {
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compatible = "qcom,krait-pmu";
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interrupts = <1 7 0xf04>;
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interrupts = <GIC_PPI 7 0xf04>;
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};
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clocks {
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@ -203,10 +204,10 @@
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <1 2 0xf08>,
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<1 3 0xf08>,
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<1 4 0xf08>,
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<1 1 0xf08>;
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interrupts = <GIC_PPI 2 0xf08>,
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<GIC_PPI 3 0xf08>,
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<GIC_PPI 4 0xf08>,
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<GIC_PPI 1 0xf08>;
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clock-frequency = <19200000>;
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};
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@ -253,12 +254,13 @@
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tsens: thermal-sensor@fc4a8000 {
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compatible = "qcom,msm8974-tsens";
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reg = <0xfc4a8000 0x2000>;
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reg = <0xfc4a9000 0x1000>, /* TM */
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<0xfc4a8000 0x1000>; /* SROT */
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nvmem-cells = <&tsens_calib>, <&tsens_backup>;
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nvmem-cell-names = "calib", "calib_backup";
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#qcom,sensors = <11>;
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#thermal-sensor-cells = <1>;
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};
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timer@f9020000 {
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#address-cells = <1>;
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#size-cells = <1>;
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@ -269,50 +271,50 @@
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frame@f9021000 {
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frame-number = <0>;
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interrupts = <0 8 0x4>,
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<0 7 0x4>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9021000 0x1000>,
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<0xf9022000 0x1000>;
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};
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frame@f9023000 {
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frame-number = <1>;
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interrupts = <0 9 0x4>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9023000 0x1000>;
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status = "disabled";
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};
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frame@f9024000 {
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frame-number = <2>;
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interrupts = <0 10 0x4>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9024000 0x1000>;
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status = "disabled";
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};
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frame@f9025000 {
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frame-number = <3>;
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interrupts = <0 11 0x4>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9025000 0x1000>;
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status = "disabled";
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};
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frame@f9026000 {
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frame-number = <4>;
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interrupts = <0 12 0x4>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9026000 0x1000>;
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status = "disabled";
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};
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frame@f9027000 {
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frame-number = <5>;
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interrupts = <0 13 0x4>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9027000 0x1000>;
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status = "disabled";
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};
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frame@f9028000 {
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frame-number = <6>;
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interrupts = <0 14 0x4>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xf9028000 0x1000>;
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status = "disabled";
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};
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@ -404,13 +406,13 @@
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <0 208 0>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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};
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blsp2_uart2: serial@f995e000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0xf995e000 0x1000>;
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interrupts = <0 114 0x0>;
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
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clock-names = "core", "iface";
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status = "disabled";
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@ -420,7 +422,7 @@
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compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
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reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <0 123 0>, <0 138 0>;
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interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_AHB_CLK>,
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@ -433,7 +435,7 @@
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compatible = "qcom,apq8084-sdhci", "qcom,sdhci-msm-v4";
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reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;
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reg-names = "hc_mem", "core_mem";
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interrupts = <0 125 0>, <0 221 0>;
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interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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clocks = <&gcc GCC_SDCC2_APPS_CLK>,
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<&gcc GCC_SDCC2_AHB_CLK>,
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@ -449,7 +451,7 @@
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<0xfc4cb000 0x1000>,
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<0xfc4ca000 0x1000>;
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interrupt-names = "periph_irq";
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interrupts = <0 190 0>;
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interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
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qcom,ee = <0>;
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qcom,channel = <0>;
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#address-cells = <2>;
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@ -463,7 +465,7 @@
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compatible = "qcom,smd";
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rpm {
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interrupts = <0 168 1>;
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 8 0>;
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qcom,smd-edge = <15>;
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@ -102,6 +102,7 @@
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L2: l2-cache {
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compatible = "cache";
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cache-level = <2>;
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qcom,saw = <&saw_l2>;
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};
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};
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@ -353,6 +354,12 @@
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regulator;
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};
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saw_l2: regulator@b012000 {
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compatible = "qcom,saw2";
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reg = <0xb012000 0x1000>;
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regulator;
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};
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blsp1_uart1: serial@78af000 {
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compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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reg = <0x78af000 0x200>;
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@ -259,6 +259,25 @@
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status = "ok";
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};
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remoteproc@fb21b000 {
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status = "ok";
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vddmx-supply = <&pm8841_s1>;
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vddcx-supply = <&pm8841_s2>;
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pinctrl-names = "default";
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pinctrl-0 = <&wcnss_pin_a>;
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smd-edge {
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qcom,remote-pid = <4>;
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label = "pronto";
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wcnss {
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status = "ok";
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};
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};
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};
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pinctrl@fd510000 {
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sdhc1_pin_a: sdhc1-pin-active {
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clk {
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@ -287,6 +306,32 @@
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bias-pull-up;
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};
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};
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wcnss_pin_a: wcnss-pin-active {
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wlan {
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pins = "gpio36", "gpio37", "gpio38", "gpio39", "gpio40";
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function = "wlan";
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drive-strength = <6>;
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bias-pull-down;
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};
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bt {
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pins = "gpio35", "gpio43", "gpio44";
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function = "bt";
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drive-strength = <2>;
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bias-pull-down;
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};
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fm {
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pins = "gpio41", "gpio42";
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function = "fm";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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sdhci@f9824900 {
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/interconnect/qcom,msm8974.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-msm8974.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8974.h>
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@ -20,17 +21,17 @@
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#size-cells = <1>;
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ranges;
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mpss@8000000 {
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mpss_region: mpss@8000000 {
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reg = <0x08000000 0x5100000>;
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no-map;
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};
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mba@d100000 {
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mba_region: mba@d100000 {
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reg = <0x0d100000 0x100000>;
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no-map;
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};
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reserved@d200000 {
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wcnss_region: wcnss@d200000 {
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reg = <0x0d200000 0xa00000>;
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no-map;
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};
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@ -61,8 +62,11 @@
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};
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rmtfs@fd80000 {
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compatible = "qcom,rmtfs-mem";
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reg = <0x0fd80000 0x180000>;
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no-map;
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qcom,client-id = <1>;
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};
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};
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@ -356,6 +360,15 @@
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qcom,smem-states = <&adsp_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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smd-edge {
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interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 8 8>;
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qcom,smd-edge = <1>;
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label = "lpass";
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};
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};
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smem {
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@ -795,6 +808,119 @@
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clock-names = "core";
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};
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remoteproc@fc880000 {
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compatible = "qcom,msm8974-mss-pil";
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reg = <0xfc880000 0x100>, <0xfc820000 0x020>;
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reg-names = "qdsp6", "rmb";
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interrupts-extended = <&intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
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clocks = <&gcc GCC_MSS_Q6_BIMC_AXI_CLK>,
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<&gcc GCC_MSS_CFG_AHB_CLK>,
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<&gcc GCC_BOOT_ROM_AHB_CLK>,
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<&xo_board>;
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clock-names = "iface", "bus", "mem", "xo";
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resets = <&gcc GCC_MSS_RESTART>;
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reset-names = "mss_restart";
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cx-supply = <&pm8841_s2>;
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mss-supply = <&pm8841_s3>;
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mx-supply = <&pm8841_s1>;
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pll-supply = <&pm8941_l12>;
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qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
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qcom,smem-states = <&modem_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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mba {
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memory-region = <&mba_region>;
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};
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mpss {
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memory-region = <&mpss_region>;
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};
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smd-edge {
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interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
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qcom,ipc = <&apcs 8 12>;
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qcom,smd-edge = <0>;
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label = "modem";
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};
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};
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pronto: remoteproc@fb21b000 {
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compatible = "qcom,pronto-v2-pil", "qcom,pronto";
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reg = <0xfb204000 0x2000>, <0xfb202000 0x1000>, <0xfb21b000 0x3000>;
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reg-names = "ccu", "dxe", "pmu";
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memory-region = <&wcnss_region>;
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interrupts-extended = <&intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
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<&wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
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vddpx-supply = <&pm8941_s3>;
|
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qcom,smem-states = <&wcnss_smp2p_out 0>;
|
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qcom,smem-state-names = "stop";
|
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|
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status = "disabled";
|
||||
|
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iris {
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compatible = "qcom,wcn3680";
|
||||
|
||||
clocks = <&rpmcc RPM_SMD_CXO_A2>;
|
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clock-names = "xo";
|
||||
|
||||
vddxo-supply = <&pm8941_l6>;
|
||||
vddrfa-supply = <&pm8941_l11>;
|
||||
vddpa-supply = <&pm8941_l19>;
|
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vdddig-supply = <&pm8941_s3>;
|
||||
};
|
||||
|
||||
smd-edge {
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 17>;
|
||||
qcom,smd-edge = <6>;
|
||||
|
||||
wcnss {
|
||||
compatible = "qcom,wcnss";
|
||||
qcom,smd-channels = "WCNSS_CTRL";
|
||||
status = "disabled";
|
||||
|
||||
qcom,mmio = <&pronto>;
|
||||
|
||||
bt {
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compatible = "qcom,wcnss-bt";
|
||||
};
|
||||
|
||||
wifi {
|
||||
compatible = "qcom,wcnss-wlan";
|
||||
|
||||
interrupts = <GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "tx", "rx";
|
||||
|
||||
qcom,smem-states = <&apps_smsm 10>, <&apps_smsm 9>;
|
||||
qcom,smem-state-names = "tx-enable", "tx-rings-empty";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
msmgpio: pinctrl@fd510000 {
|
||||
compatible = "qcom,msm8974-pinctrl";
|
||||
reg = <0xfd510000 0x4000>;
|
||||
@ -1179,6 +1305,79 @@
|
||||
};
|
||||
};
|
||||
|
||||
ocmem@fdd00000 {
|
||||
compatible = "qcom,msm8974-ocmem";
|
||||
reg = <0xfdd00000 0x2000>,
|
||||
<0xfec00000 0x180000>;
|
||||
reg-names = "ctrl",
|
||||
"mem";
|
||||
clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
|
||||
<&mmcc OCMEMCX_OCMEMNOC_CLK>;
|
||||
clock-names = "core",
|
||||
"iface";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
gmu_sram: gmu-sram@0 {
|
||||
reg = <0x0 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
bimc: interconnect@fc380000 {
|
||||
reg = <0xfc380000 0x6a000>;
|
||||
compatible = "qcom,msm8974-bimc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
||||
snoc: interconnect@fc460000 {
|
||||
reg = <0xfc460000 0x4000>;
|
||||
compatible = "qcom,msm8974-snoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
};
|
||||
|
||||
pnoc: interconnect@fc468000 {
|
||||
reg = <0xfc468000 0x4000>;
|
||||
compatible = "qcom,msm8974-pnoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_PNOC_A_CLK>;
|
||||
};
|
||||
|
||||
ocmemnoc: interconnect@fc470000 {
|
||||
reg = <0xfc470000 0x4000>;
|
||||
compatible = "qcom,msm8974-ocmemnoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_OCMEMGX_CLK>,
|
||||
<&rpmcc RPM_SMD_OCMEMGX_A_CLK>;
|
||||
};
|
||||
|
||||
mmssnoc: interconnect@fc478000 {
|
||||
reg = <0xfc478000 0x4000>;
|
||||
compatible = "qcom,msm8974-mmssnoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&mmcc MMSS_S0_AXI_CLK>,
|
||||
<&mmcc MMSS_S0_AXI_CLK>;
|
||||
};
|
||||
|
||||
cnoc: interconnect@fc480000 {
|
||||
reg = <0xfc480000 0x4000>;
|
||||
compatible = "qcom,msm8974-cnoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_CNOC_A_CLK>;
|
||||
};
|
||||
|
||||
mdss: mdss@fd900000 {
|
||||
status = "disabled";
|
||||
|
||||
@ -1225,6 +1424,9 @@
|
||||
"core",
|
||||
"vsync";
|
||||
|
||||
interconnects = <&mmssnoc MNOC_MAS_MDP_PORT0 &bimc BIMC_SLV_EBI_CH0>;
|
||||
interconnect-names = "mdp0-mem";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -1325,20 +1527,6 @@
|
||||
smd {
|
||||
compatible = "qcom,smd";
|
||||
|
||||
adsp {
|
||||
interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 8>;
|
||||
qcom,smd-edge = <1>;
|
||||
};
|
||||
|
||||
modem {
|
||||
interrupts = <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>;
|
||||
|
||||
qcom,ipc = <&apcs 8 12>;
|
||||
qcom,smd-edge = <0>;
|
||||
};
|
||||
|
||||
rpm {
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
|
||||
qcom,ipc = <&apcs 8 0>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user