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dmaengine: fsl-edma: add trace event support
Implement trace event support to enhance logging functionality for register access and the transfer control descriptor (TCD) context. This will enable more comprehensive monitoring and analysis of system activities Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/20240425205947.3436501-1-Frank.Li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -31,10 +31,12 @@ obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac/
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obj-$(CONFIG_DW_DMAC_CORE) += dw/
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obj-$(CONFIG_DW_EDMA) += dw-edma/
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obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
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fsl-edma-trace-$(CONFIG_TRACING) := fsl-edma-trace.o
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CFLAGS_fsl-edma-trace.o := -I$(src)
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obj-$(CONFIG_FSL_DMA) += fsldma.o
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fsl-edma-objs := fsl-edma-main.o fsl-edma-common.o
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fsl-edma-objs := fsl-edma-main.o fsl-edma-common.o ${fsl-edma-trace-y}
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obj-$(CONFIG_FSL_EDMA) += fsl-edma.o
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mcf-edma-objs := mcf-edma-main.o fsl-edma-common.o
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mcf-edma-objs := mcf-edma-main.o fsl-edma-common.o ${fsl-edma-trace-y}
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obj-$(CONFIG_MCF_EDMA) += mcf-edma.o
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obj-$(CONFIG_FSL_QDMA) += fsl-qdma.o
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obj-$(CONFIG_FSL_RAID) += fsl_raid.o
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@ -540,6 +540,8 @@ void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan,
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csr |= EDMA_TCD_CSR_START;
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fsl_edma_set_tcd_to_le(fsl_chan, tcd, csr, csr);
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trace_edma_fill_tcd(fsl_chan, tcd);
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}
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static struct fsl_edma_desc *fsl_edma_alloc_desc(struct fsl_edma_chan *fsl_chan,
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@ -246,6 +246,11 @@ struct fsl_edma_engine {
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struct fsl_edma_chan chans[] __counted_by(n_chans);
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};
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static inline u32 fsl_edma_drvflags(struct fsl_edma_chan *fsl_chan)
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{
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return fsl_chan->edma->drvdata->flags;
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}
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#define edma_read_tcdreg_c(chan, _tcd, __name) \
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(sizeof((_tcd)->__name) == sizeof(u64) ? \
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edma_readq(chan->edma, &(_tcd)->__name) : \
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@ -349,6 +354,9 @@ do { \
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fsl_edma_set_tcd_to_le_c((struct fsl_edma_hw_tcd *)_tcd, _val, _field); \
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} while (0)
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/* Need after struct defination */
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#include "fsl-edma-trace.h"
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/*
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* R/W functions for big- or little-endian registers:
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* The eDMA controller's endian is independent of the CPU core's endian.
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@ -367,23 +375,38 @@ static inline u64 edma_readq(struct fsl_edma_engine *edma, void __iomem *addr)
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h = ioread32(addr + 4);
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}
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trace_edma_readl(edma, addr, l);
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trace_edma_readl(edma, addr + 4, h);
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return (h << 32) | l;
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}
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static inline u32 edma_readl(struct fsl_edma_engine *edma, void __iomem *addr)
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{
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u32 val;
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if (edma->big_endian)
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return ioread32be(addr);
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val = ioread32be(addr);
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else
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return ioread32(addr);
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val = ioread32(addr);
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trace_edma_readl(edma, addr, val);
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return val;
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}
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static inline u16 edma_readw(struct fsl_edma_engine *edma, void __iomem *addr)
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{
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u16 val;
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if (edma->big_endian)
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return ioread16be(addr);
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val = ioread16be(addr);
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else
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return ioread16(addr);
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val = ioread16(addr);
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trace_edma_readw(edma, addr, val);
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return val;
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}
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static inline void edma_writeb(struct fsl_edma_engine *edma,
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@ -394,6 +417,8 @@ static inline void edma_writeb(struct fsl_edma_engine *edma,
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iowrite8(val, (void __iomem *)((unsigned long)addr ^ 0x3));
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else
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iowrite8(val, addr);
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trace_edma_writeb(edma, addr, val);
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}
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static inline void edma_writew(struct fsl_edma_engine *edma,
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@ -404,6 +429,8 @@ static inline void edma_writew(struct fsl_edma_engine *edma,
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iowrite16be(val, (void __iomem *)((unsigned long)addr ^ 0x2));
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else
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iowrite16(val, addr);
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trace_edma_writew(edma, addr, val);
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}
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static inline void edma_writel(struct fsl_edma_engine *edma,
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@ -413,6 +440,8 @@ static inline void edma_writel(struct fsl_edma_engine *edma,
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iowrite32be(val, addr);
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else
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iowrite32(val, addr);
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trace_edma_writel(edma, addr, val);
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}
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static inline void edma_writeq(struct fsl_edma_engine *edma,
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@ -425,6 +454,9 @@ static inline void edma_writeq(struct fsl_edma_engine *edma,
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iowrite32(val & 0xFFFFFFFF, addr);
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iowrite32(val >> 32, addr + 4);
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}
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trace_edma_writel(edma, addr, val & 0xFFFFFFFF);
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trace_edma_writel(edma, addr + 4, val >> 32);
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}
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static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan)
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@ -432,11 +464,6 @@ static inline struct fsl_edma_chan *to_fsl_edma_chan(struct dma_chan *chan)
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return container_of(chan, struct fsl_edma_chan, vchan.chan);
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}
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static inline u32 fsl_edma_drvflags(struct fsl_edma_chan *fsl_chan)
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{
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return fsl_chan->edma->drvdata->flags;
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}
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static inline struct fsl_edma_desc *to_fsl_edma_desc(struct virt_dma_desc *vd)
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{
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return container_of(vd, struct fsl_edma_desc, vdesc);
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4
drivers/dma/fsl-edma-trace.c
Normal file
4
drivers/dma/fsl-edma-trace.c
Normal file
@ -0,0 +1,4 @@
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// SPDX-License-Identifier: GPL-2.0
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#define CREATE_TRACE_POINTS
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#include "fsl-edma-common.h"
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132
drivers/dma/fsl-edma-trace.h
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132
drivers/dma/fsl-edma-trace.h
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@ -0,0 +1,132 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2023 NXP.
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*/
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM fsl_edma
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#if !defined(__LINUX_FSL_EDMA_TRACE) || defined(TRACE_HEADER_MULTI_READ)
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#define __LINUX_FSL_EDMA_TRACE
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#include <linux/types.h>
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#include <linux/tracepoint.h>
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DECLARE_EVENT_CLASS(edma_log_io,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value),
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TP_STRUCT__entry(
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__field(struct fsl_edma_engine *, edma)
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__field(void __iomem *, addr)
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__field(u32, value)
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),
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TP_fast_assign(
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__entry->edma = edma;
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__entry->addr = addr;
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__entry->value = value;
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),
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TP_printk("offset %08x: value %08x",
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(u32)(__entry->addr - __entry->edma->membase), __entry->value)
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);
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DEFINE_EVENT(edma_log_io, edma_readl,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DEFINE_EVENT(edma_log_io, edma_writel,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DEFINE_EVENT(edma_log_io, edma_readw,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DEFINE_EVENT(edma_log_io, edma_writew,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DEFINE_EVENT(edma_log_io, edma_readb,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DEFINE_EVENT(edma_log_io, edma_writeb,
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TP_PROTO(struct fsl_edma_engine *edma, void __iomem *addr, u32 value),
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TP_ARGS(edma, addr, value)
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);
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DECLARE_EVENT_CLASS(edma_log_tcd,
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TP_PROTO(struct fsl_edma_chan *chan, void *tcd),
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TP_ARGS(chan, tcd),
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TP_STRUCT__entry(
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__field(u64, saddr)
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__field(u16, soff)
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__field(u16, attr)
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__field(u32, nbytes)
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__field(u64, slast)
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__field(u64, daddr)
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__field(u16, doff)
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__field(u16, citer)
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__field(u64, dlast_sga)
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__field(u16, csr)
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__field(u16, biter)
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),
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TP_fast_assign(
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__entry->saddr = fsl_edma_get_tcd_to_cpu(chan, tcd, saddr),
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__entry->soff = fsl_edma_get_tcd_to_cpu(chan, tcd, soff),
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__entry->attr = fsl_edma_get_tcd_to_cpu(chan, tcd, attr),
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__entry->nbytes = fsl_edma_get_tcd_to_cpu(chan, tcd, nbytes),
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__entry->slast = fsl_edma_get_tcd_to_cpu(chan, tcd, slast),
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__entry->daddr = fsl_edma_get_tcd_to_cpu(chan, tcd, daddr),
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__entry->doff = fsl_edma_get_tcd_to_cpu(chan, tcd, doff),
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__entry->citer = fsl_edma_get_tcd_to_cpu(chan, tcd, citer),
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__entry->dlast_sga = fsl_edma_get_tcd_to_cpu(chan, tcd, dlast_sga),
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__entry->csr = fsl_edma_get_tcd_to_cpu(chan, tcd, csr),
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__entry->biter = fsl_edma_get_tcd_to_cpu(chan, tcd, biter);
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),
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TP_printk("\n==== TCD =====\n"
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" saddr: 0x%016llx\n"
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" soff: 0x%04x\n"
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" attr: 0x%04x\n"
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" nbytes: 0x%08x\n"
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" slast: 0x%016llx\n"
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" daddr: 0x%016llx\n"
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" doff: 0x%04x\n"
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" citer: 0x%04x\n"
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" dlast: 0x%016llx\n"
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" csr: 0x%04x\n"
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" biter: 0x%04x\n",
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__entry->saddr,
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__entry->soff,
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__entry->attr,
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__entry->nbytes,
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__entry->slast,
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__entry->daddr,
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__entry->doff,
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__entry->citer,
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__entry->dlast_sga,
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__entry->csr,
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__entry->biter)
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);
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DEFINE_EVENT(edma_log_tcd, edma_fill_tcd,
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TP_PROTO(struct fsl_edma_chan *chan, void *tcd),
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TP_ARGS(chan, tcd)
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);
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#endif
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/* this part must be outside header guard */
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#undef TRACE_INCLUDE_PATH
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#define TRACE_INCLUDE_PATH .
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#undef TRACE_INCLUDE_FILE
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#define TRACE_INCLUDE_FILE fsl-edma-trace
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#include <trace/define_trace.h>
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