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ALSA: emu10k1: properly assert E-MU FPGA access constaints
Assert the validity of the registers and values, as them being out of range would indicate an error in the driver. Consequently, don't bother returning error codes; they were ignored everywhere anyway. Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@gmx.de> Link: https://lore.kernel.org/r/20230421141006.1005539-1-oswald.buddenhagen@gmx.de Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -1819,9 +1819,9 @@ unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu, unsigned int reg,
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void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data);
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int snd_emu10k1_spi_write(struct snd_emu10k1 * emu, unsigned int data);
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int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
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int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value);
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int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value);
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int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src);
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void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value);
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void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value);
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void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src);
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unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc);
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void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb);
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void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb);
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@ -233,15 +233,15 @@ int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
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return err;
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}
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int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value)
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void snd_emu1010_fpga_write(struct snd_emu10k1 *emu, u32 reg, u32 value)
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{
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unsigned long flags;
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if (reg > 0x3f)
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return 1;
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if (snd_BUG_ON(reg > 0x3f))
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return;
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reg += 0x40; /* 0x40 upwards are registers. */
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if (value > 0x3f) /* 0 to 0x3f are values */
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return 1;
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if (snd_BUG_ON(value > 0x3f)) /* 0 to 0x3f are values */
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return;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(reg, emu->port + A_IOCFG);
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udelay(10);
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@ -251,15 +251,13 @@ int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value)
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udelay(10);
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outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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return 0;
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}
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int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value)
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void snd_emu1010_fpga_read(struct snd_emu10k1 *emu, u32 reg, u32 *value)
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{
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unsigned long flags;
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if (reg > 0x3f)
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return 1;
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if (snd_BUG_ON(reg > 0x3f))
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return;
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reg += 0x40; /* 0x40 upwards are registers. */
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(reg, emu->port + A_IOCFG);
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@ -268,21 +266,21 @@ int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value)
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udelay(10);
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*value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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return 0;
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}
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/* Each Destination has one and only one Source,
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* but one Source can feed any number of Destinations simultaneously.
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*/
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int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src)
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void snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 *emu, u32 dst, u32 src)
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{
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snd_emu1010_fpga_write(emu, 0x00, ((dst >> 8) & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x01, (dst & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x02, ((src >> 8) & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x03, (src & 0x3f) );
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return 0;
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if (snd_BUG_ON(dst & ~0x71f))
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return;
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if (snd_BUG_ON(src & ~0x71f))
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return;
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snd_emu1010_fpga_write(emu, 0x00, dst >> 8);
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snd_emu1010_fpga_write(emu, 0x01, dst & 0x1f);
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snd_emu1010_fpga_write(emu, 0x02, src >> 8);
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snd_emu1010_fpga_write(emu, 0x03, src & 0x1f);
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}
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void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
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