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arm: pxa: add clock pll selection bits
Add missing bits for CCCR and CCSR : - CPLL and PPLL selection, either full speed or 13MHz - CPSR masks Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -143,6 +143,16 @@
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#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */
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#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */
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#define CCCR_CPDIS_BIT (31)
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#define CCCR_PPDIS_BIT (30)
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#define CCCR_LCD_26_BIT (27)
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#define CCCR_A_BIT (25)
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#define CCSR_N2_MASK CCCR_N_MASK
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#define CCSR_M_MASK CCCR_M_MASK
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#define CCSR_L_MASK CCCR_L_MASK
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#define CCSR_N2_SHIFT 7
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#define CKEN_AC97CONF (31) /* AC97 Controller Configuration */
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#define CKEN_CAMERA (24) /* Camera Interface Clock Enable */
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#define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */
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