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agp/intel: Add support for Sandybridge.
Signed-off-by: Eric Anholt <eric@anholt.net>
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@ -64,6 +64,8 @@
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB 0x0062
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB 0x006a
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#define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG 0x0046
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#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB 0x0100
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#define PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG 0x0102
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/* cover 915 and 945 variants */
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#define IS_I915 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_E7221_HB || \
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@ -98,7 +100,8 @@
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB)
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB || \
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agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB)
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extern int agp_memory_reserved;
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@ -705,6 +708,12 @@ static void intel_i830_init_gtt_entries(void)
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gtt_entries = 0;
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break;
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}
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} else if (agp_bridge->dev->device ==
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PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB) {
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/* XXX: This is what my A1 silicon has. What's the right
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* answer?
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*/
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gtt_entries = MB(64) - KB(size);
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} else {
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switch (gmch_ctrl & I855_GMCH_GMS_MASK) {
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case I855_GMCH_GMS_STOLEN_1M:
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@ -1364,6 +1373,7 @@ static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
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case PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB:
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case PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB:
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case PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB:
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case PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB:
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*gtt_offset = *gtt_size = MB(2);
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break;
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default:
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@ -2369,6 +2379,8 @@ static const struct intel_driver_description {
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"HD Graphics", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB, PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG, 0,
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"HD Graphics", NULL, &intel_i965_driver },
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{ PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB, PCI_DEVICE_ID_INTEL_SANDYBRIDGE_IG, 0,
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"Sandybridge", NULL, &intel_i965_driver },
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{ 0, 0, 0, NULL, NULL, NULL }
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};
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@ -2575,6 +2587,7 @@ static struct pci_device_id agp_intel_pci_table[] = {
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
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ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
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ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),
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{ }
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};
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