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misc: rtsx: judge ASPM Mode to set PETXCFG Reg
ASPM Mode is ASPM_MODE_CFG need to judge the value of clkreq_0 to set HIGH or LOW, if the ASPM Mode is ASPM_MODE_REG always set to HIGH during the initialization. Cc: stable@vger.kernel.org Signed-off-by: Ricky Wu <ricky_wu@realtek.com> Link: https://lore.kernel.org/r/52906c6836374c8cb068225954c5543a@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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101bd907b4
@ -195,7 +195,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
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}
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}
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}
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}
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if (option->force_clkreq_0)
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if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,
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rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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else
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else
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@ -435,17 +435,10 @@ static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
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option->ltr_enabled = false;
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option->ltr_enabled = false;
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}
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}
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}
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}
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if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
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| PM_L1_1_EN | PM_L1_2_EN))
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option->force_clkreq_0 = false;
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else
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option->force_clkreq_0 = true;
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}
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}
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static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
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static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
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{
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{
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struct rtsx_cr_option *option = &pcr->option;
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rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,
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rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,
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CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
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CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
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@ -476,17 +469,6 @@ static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
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else
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else
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rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
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rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
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/*
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* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
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* to drive low, and we forcibly request clock.
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*/
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if (option->force_clkreq_0)
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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else
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
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rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
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rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
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if (pcr->rtd3_en) {
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if (pcr->rtd3_en) {
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@ -327,12 +327,11 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
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}
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}
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}
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}
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/*
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/*
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* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
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* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
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* to drive low, and we forcibly request clock.
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* to drive low, and we forcibly request clock.
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*/
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*/
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if (option->force_clkreq_0)
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if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
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rtsx_pci_write_register(pcr, PETXCFG,
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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else
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else
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@ -517,17 +517,10 @@ static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
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option->ltr_enabled = false;
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option->ltr_enabled = false;
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}
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}
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}
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}
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if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
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| PM_L1_1_EN | PM_L1_2_EN))
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option->force_clkreq_0 = false;
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else
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option->force_clkreq_0 = true;
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}
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}
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static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
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static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
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{
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{
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struct rtsx_cr_option *option = &pcr->option;
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/* Set mcu_cnt to 7 to ensure data can be sampled properly */
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/* Set mcu_cnt to 7 to ensure data can be sampled properly */
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rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
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rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
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@ -546,17 +539,6 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
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rts5260_init_hw(pcr);
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rts5260_init_hw(pcr);
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/*
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* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
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* to drive low, and we forcibly request clock.
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*/
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if (option->force_clkreq_0)
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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else
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
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rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
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rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
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return 0;
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return 0;
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@ -498,17 +498,10 @@ static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
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option->ltr_enabled = false;
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option->ltr_enabled = false;
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}
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}
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}
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}
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if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
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| PM_L1_1_EN | PM_L1_2_EN))
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option->force_clkreq_0 = false;
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else
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option->force_clkreq_0 = true;
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}
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}
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static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
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static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
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{
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{
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struct rtsx_cr_option *option = &pcr->option;
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u32 val;
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u32 val;
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rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
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rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
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@ -554,17 +547,6 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
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else
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else
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rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
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rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
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/*
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* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
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* to drive low, and we forcibly request clock.
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*/
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if (option->force_clkreq_0)
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
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else
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
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rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
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rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
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if (pcr->rtd3_en) {
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if (pcr->rtd3_en) {
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@ -1326,8 +1326,11 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr)
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return err;
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return err;
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}
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}
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if (pcr->aspm_mode == ASPM_MODE_REG)
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if (pcr->aspm_mode == ASPM_MODE_REG) {
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rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30);
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rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30);
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rtsx_pci_write_register(pcr, PETXCFG,
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FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
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}
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/* No CD interrupt if probing driver with card inserted.
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/* No CD interrupt if probing driver with card inserted.
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* So we need to initialize pcr->card_exist here.
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* So we need to initialize pcr->card_exist here.
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