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drm/nouveau/mmu/g84: fork from nv50
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
b4e114f1aa
commit
0f43715fac
@ -67,5 +67,6 @@ int nv04_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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int nv41_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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int nv44_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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int nv50_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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int g84_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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int gf100_mmu_new(struct nvkm_device *, int, struct nvkm_mmu **);
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#endif
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@ -927,7 +927,7 @@ nv84_chipset = {
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.i2c = nv50_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g84_pci_new,
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.therm = g84_therm_new,
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@ -959,7 +959,7 @@ nv86_chipset = {
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.i2c = nv50_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g84_pci_new,
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.therm = g84_therm_new,
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@ -991,7 +991,7 @@ nv92_chipset = {
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.i2c = nv50_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g92_pci_new,
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.therm = g84_therm_new,
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@ -1023,7 +1023,7 @@ nv94_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1055,7 +1055,7 @@ nv96_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1087,7 +1087,7 @@ nv98_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1119,7 +1119,7 @@ nva0_chipset = {
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.i2c = nv50_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g84_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1151,7 +1151,7 @@ nva3_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pmu = gt215_pmu_new,
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@ -1185,7 +1185,7 @@ nva5_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pmu = gt215_pmu_new,
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@ -1218,7 +1218,7 @@ nva8_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pmu = gt215_pmu_new,
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@ -1251,7 +1251,7 @@ nvaa_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1283,7 +1283,7 @@ nvac_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = g98_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.therm = g84_therm_new,
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@ -1315,7 +1315,7 @@ nvaf_chipset = {
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.i2c = g94_i2c_new,
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.imem = nv50_instmem_new,
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.mc = gt215_mc_new,
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.mmu = nv50_mmu_new,
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.mmu = g84_mmu_new,
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.mxm = nv50_mxm_new,
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.pci = g94_pci_new,
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.pmu = gt215_pmu_new,
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@ -3,4 +3,5 @@ nvkm-y += nvkm/subdev/mmu/nv04.o
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nvkm-y += nvkm/subdev/mmu/nv41.o
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nvkm-y += nvkm/subdev/mmu/nv44.o
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nvkm-y += nvkm/subdev/mmu/nv50.o
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nvkm-y += nvkm/subdev/mmu/g84.o
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nvkm-y += nvkm/subdev/mmu/gf100.o
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43
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c
Normal file
43
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/g84.c
Normal file
@ -0,0 +1,43 @@
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/*
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* Copyright 2017 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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static const struct nvkm_mmu_func
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g84_mmu = {
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.limit = (1ULL << 40),
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.dma_bits = 40,
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.pgt_bits = 29 - 12,
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.spg_shift = 12,
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.lpg_shift = 16,
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.create = nv50_vm_create,
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.map_pgt = nv50_vm_map_pgt,
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.map = nv50_vm_map,
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.map_sg = nv50_vm_map_sg,
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.unmap = nv50_vm_unmap,
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.flush = nv50_vm_flush,
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};
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int
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g84_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
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{
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return nvkm_mmu_new_(&g84_mmu, device, index, pmmu);
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}
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@ -28,7 +28,7 @@
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#include <subdev/timer.h>
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#include <engine/gr.h>
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static void
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void
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nv50_vm_map_pgt(struct nvkm_gpuobj *pgd, u32 pde, struct nvkm_memory *pgt[2])
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{
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u64 phys = 0xdeadcafe00000000ULL;
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@ -73,7 +73,7 @@ vm_addr(struct nvkm_vma *vma, u64 phys, u32 memtype, u32 target)
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return phys;
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}
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static void
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void
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nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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struct nvkm_mem *mem, u32 pte, u32 cnt, u64 phys, u64 delta)
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{
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@ -123,7 +123,7 @@ nv50_vm_map(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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nvkm_done(pgt);
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}
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static void
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void
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nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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struct nvkm_mem *mem, u32 pte, u32 cnt, dma_addr_t *list)
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{
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@ -139,7 +139,7 @@ nv50_vm_map_sg(struct nvkm_vma *vma, struct nvkm_memory *pgt,
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nvkm_done(pgt);
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}
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static void
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void
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nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
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{
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pte <<= 3;
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@ -152,7 +152,7 @@ nv50_vm_unmap(struct nvkm_vma *vma, struct nvkm_memory *pgt, u32 pte, u32 cnt)
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nvkm_done(pgt);
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}
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static void
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void
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nv50_vm_flush(struct nvkm_vm *vm)
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{
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struct nvkm_mmu *mmu = vm->mmu;
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@ -198,7 +198,7 @@ nv50_vm_flush(struct nvkm_vm *vm)
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mutex_unlock(&subdev->mutex);
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}
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static int
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int
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nv50_vm_create(struct nvkm_mmu *mmu, u64 offset, u64 length, u64 mm_offset,
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struct lock_class_key *key, struct nvkm_vm **pvm)
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{
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@ -36,4 +36,14 @@ struct nvkm_mmu_func {
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int nvkm_vm_create(struct nvkm_mmu *, u64, u64, u64, u32,
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struct lock_class_key *, struct nvkm_vm **);
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int nv50_vm_create(struct nvkm_mmu *, u64, u64, u64, struct lock_class_key *,
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struct nvkm_vm **);
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void nv50_vm_map_pgt(struct nvkm_gpuobj *, u32, struct nvkm_memory **);
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void nv50_vm_map(struct nvkm_vma *, struct nvkm_memory *, struct nvkm_mem *,
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u32, u32, u64, u64);
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void nv50_vm_map_sg(struct nvkm_vma *, struct nvkm_memory *, struct nvkm_mem *,
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u32, u32, dma_addr_t *);
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void nv50_vm_unmap(struct nvkm_vma *, struct nvkm_memory *, u32, u32);
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void nv50_vm_flush(struct nvkm_vm *);
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#endif
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