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IB/core: Add support for "send with invalidate" work requests
Add a new IB_WR_SEND_WITH_INV send opcode that can be used to mark a "send with invalidate" work request as defined in the iWARP verbs and the InfiniBand base memory management extensions. Also put "imm_data" and a new "invalidate_rkey" member in a new "ex" union in struct ib_send_wr. The invalidate_rkey member can be used to pass in an R_Key/STag to be invalidated. Add this new union to struct ib_uverbs_send_wr. Add code to copy the invalidate_rkey field in ib_uverbs_post_send(). Fix up low-level drivers to deal with the change to struct ib_send_wr, and just remove the imm_data initialization from net/sunrpc/xprtrdma/, since that code never does any send with immediate operations. Also, move the existing IB_DEVICE_SEND_W_INV flag to a new bit, since the iWARP drivers currently in the tree set the bit. The amso1100 driver at least will silently fail to honor the IB_SEND_INVALIDATE bit if passed in as part of userspace send requests (since it does not implement kernel bypass work request queueing). Remove the flag from all existing drivers that set it until we know which ones are OK. The values chosen for the new flag is not consecutive to avoid clashing with flags defined in the XRC patches, which are not merged yet but which are already in use and are likely to be merged soon. This resurrects a patch sent long ago by Mikkel Hagen <mhagen@iol.unh.edu>. Signed-off-by: Roland Dreier <rolandd@cisco.com>
This commit is contained in:
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e7eacd3686
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0f39cf3d54
@ -1463,7 +1463,6 @@ ssize_t ib_uverbs_post_send(struct ib_uverbs_file *file,
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next->num_sge = user_wr->num_sge;
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next->opcode = user_wr->opcode;
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next->send_flags = user_wr->send_flags;
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next->imm_data = (__be32 __force) user_wr->imm_data;
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if (is_ud) {
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next->wr.ud.ah = idr_read_ah(user_wr->wr.ud.ah,
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@ -1476,14 +1475,24 @@ ssize_t ib_uverbs_post_send(struct ib_uverbs_file *file,
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next->wr.ud.remote_qkey = user_wr->wr.ud.remote_qkey;
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} else {
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switch (next->opcode) {
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case IB_WR_RDMA_WRITE:
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case IB_WR_RDMA_WRITE_WITH_IMM:
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next->ex.imm_data =
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(__be32 __force) user_wr->ex.imm_data;
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case IB_WR_RDMA_WRITE:
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case IB_WR_RDMA_READ:
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next->wr.rdma.remote_addr =
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user_wr->wr.rdma.remote_addr;
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next->wr.rdma.rkey =
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user_wr->wr.rdma.rkey;
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break;
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case IB_WR_SEND_WITH_IMM:
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next->ex.imm_data =
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(__be32 __force) user_wr->ex.imm_data;
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break;
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case IB_WR_SEND_WITH_INV:
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next->ex.invalidate_rkey =
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user_wr->ex.invalidate_rkey;
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break;
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case IB_WR_ATOMIC_CMP_AND_SWP:
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case IB_WR_ATOMIC_FETCH_AND_ADD:
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next->wr.atomic.remote_addr =
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@ -455,7 +455,7 @@ int __devinit c2_rnic_init(struct c2_dev *c2dev)
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IB_DEVICE_CURR_QP_STATE_MOD |
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IB_DEVICE_SYS_IMAGE_GUID |
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IB_DEVICE_ZERO_STAG |
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IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW);
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IB_DEVICE_MEM_WINDOW);
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/* Allocate the qptr_array */
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c2dev->qptr_array = vmalloc(C2_MAX_CQS * sizeof(void *));
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@ -1109,8 +1109,7 @@ int iwch_register_device(struct iwch_dev *dev)
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memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
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dev->ibdev.owner = THIS_MODULE;
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dev->device_cap_flags =
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(IB_DEVICE_ZERO_STAG |
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IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW);
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(IB_DEVICE_ZERO_STAG | IB_DEVICE_MEM_WINDOW);
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dev->ibdev.uverbs_cmd_mask =
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(1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
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@ -72,7 +72,7 @@ static int iwch_build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr,
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wqe->send.reserved[2] = 0;
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if (wr->opcode == IB_WR_SEND_WITH_IMM) {
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plen = 4;
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wqe->send.sgl[0].stag = wr->imm_data;
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wqe->send.sgl[0].stag = wr->ex.imm_data;
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wqe->send.sgl[0].len = __constant_cpu_to_be32(0);
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wqe->send.num_sgle = __constant_cpu_to_be32(0);
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*flit_cnt = 5;
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@ -112,7 +112,7 @@ static int iwch_build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr,
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if (wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) {
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plen = 4;
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wqe->write.sgl[0].stag = wr->imm_data;
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wqe->write.sgl[0].stag = wr->ex.imm_data;
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wqe->write.sgl[0].len = __constant_cpu_to_be32(0);
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wqe->write.num_sgle = __constant_cpu_to_be32(0);
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*flit_cnt = 6;
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@ -188,7 +188,7 @@ static inline int ehca_write_swqe(struct ehca_qp *qp,
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if (send_wr->opcode == IB_WR_SEND_WITH_IMM ||
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send_wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) {
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/* this might not work as long as HW does not support it */
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wqe_p->immediate_data = be32_to_cpu(send_wr->imm_data);
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wqe_p->immediate_data = be32_to_cpu(send_wr->ex.imm_data);
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wqe_p->wr_flag |= WQE_WRFLAG_IMM_DATA_PRESENT;
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}
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@ -308,7 +308,7 @@ int ipath_make_rc_req(struct ipath_qp *qp)
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else {
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qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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@ -346,7 +346,7 @@ int ipath_make_rc_req(struct ipath_qp *qp)
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qp->s_state =
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OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after RETH */
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ohdr->u.rc.imm_data = wqe->wr.imm_data;
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ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= 1 << 23;
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@ -490,7 +490,7 @@ int ipath_make_rc_req(struct ipath_qp *qp)
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else {
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qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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@ -526,7 +526,7 @@ int ipath_make_rc_req(struct ipath_qp *qp)
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else {
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qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= 1 << 23;
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@ -310,7 +310,7 @@ again:
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switch (wqe->wr.opcode) {
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case IB_WR_SEND_WITH_IMM:
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wc.wc_flags = IB_WC_WITH_IMM;
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wc.imm_data = wqe->wr.imm_data;
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wc.imm_data = wqe->wr.ex.imm_data;
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/* FALLTHROUGH */
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case IB_WR_SEND:
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if (!ipath_get_rwqe(qp, 0)) {
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@ -339,7 +339,7 @@ again:
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goto err;
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}
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wc.wc_flags = IB_WC_WITH_IMM;
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wc.imm_data = wqe->wr.imm_data;
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wc.imm_data = wqe->wr.ex.imm_data;
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if (!ipath_get_rwqe(qp, 1))
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goto rnr_nak;
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/* FALLTHROUGH */
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@ -94,7 +94,7 @@ int ipath_make_uc_req(struct ipath_qp *qp)
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qp->s_state =
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OP(SEND_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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@ -123,7 +123,7 @@ int ipath_make_uc_req(struct ipath_qp *qp)
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qp->s_state =
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OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
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/* Immediate data comes after the RETH */
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ohdr->u.rc.imm_data = wqe->wr.imm_data;
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ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= 1 << 23;
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@ -152,7 +152,7 @@ int ipath_make_uc_req(struct ipath_qp *qp)
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else {
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qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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}
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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@ -177,7 +177,7 @@ int ipath_make_uc_req(struct ipath_qp *qp)
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qp->s_state =
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OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
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/* Immediate data comes after the BTH */
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ohdr->u.imm_data = wqe->wr.imm_data;
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ohdr->u.imm_data = wqe->wr.ex.imm_data;
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hwords += 1;
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if (wqe->wr.send_flags & IB_SEND_SOLICITED)
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bth0 |= 1 << 23;
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@ -95,7 +95,7 @@ static void ipath_ud_loopback(struct ipath_qp *sqp, struct ipath_swqe *swqe)
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if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
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wc.wc_flags = IB_WC_WITH_IMM;
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wc.imm_data = swqe->wr.imm_data;
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wc.imm_data = swqe->wr.ex.imm_data;
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} else {
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wc.wc_flags = 0;
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wc.imm_data = 0;
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@ -327,7 +327,7 @@ int ipath_make_ud_req(struct ipath_qp *qp)
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}
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if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
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qp->s_hdrwords++;
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ohdr->u.ud.imm_data = wqe->wr.imm_data;
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ohdr->u.ud.imm_data = wqe->wr.ex.imm_data;
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bth0 = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE << 24;
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} else
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bth0 = IB_OPCODE_UD_SEND_ONLY << 24;
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@ -1249,7 +1249,7 @@ static int build_mlx_header(struct mlx4_ib_sqp *sqp, struct ib_send_wr *wr,
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case IB_WR_SEND_WITH_IMM:
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sqp->ud_header.bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE;
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sqp->ud_header.immediate_present = 1;
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sqp->ud_header.immediate_data = wr->imm_data;
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sqp->ud_header.immediate_data = wr->ex.imm_data;
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break;
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default:
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return -EINVAL;
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@ -1492,7 +1492,7 @@ int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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if (wr->opcode == IB_WR_SEND_WITH_IMM ||
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wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
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ctrl->imm = wr->imm_data;
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ctrl->imm = wr->ex.imm_data;
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else
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ctrl->imm = 0;
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@ -1532,7 +1532,7 @@ static int build_mlx_header(struct mthca_dev *dev, struct mthca_sqp *sqp,
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case IB_WR_SEND_WITH_IMM:
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sqp->ud_header.bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE;
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sqp->ud_header.immediate_present = 1;
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sqp->ud_header.immediate_data = wr->imm_data;
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sqp->ud_header.immediate_data = wr->ex.imm_data;
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break;
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default:
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return -EINVAL;
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@ -1679,7 +1679,7 @@ int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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cpu_to_be32(1);
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if (wr->opcode == IB_WR_SEND_WITH_IMM ||
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wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
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((struct mthca_next_seg *) wqe)->imm = wr->imm_data;
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((struct mthca_next_seg *) wqe)->imm = wr->ex.imm_data;
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wqe += sizeof (struct mthca_next_seg);
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size = sizeof (struct mthca_next_seg) / 16;
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@ -2020,7 +2020,7 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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cpu_to_be32(1);
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if (wr->opcode == IB_WR_SEND_WITH_IMM ||
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wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM)
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((struct mthca_next_seg *) wqe)->imm = wr->imm_data;
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((struct mthca_next_seg *) wqe)->imm = wr->ex.imm_data;
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wqe += sizeof (struct mthca_next_seg);
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size = sizeof (struct mthca_next_seg) / 16;
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@ -393,7 +393,7 @@ struct nes_adapter *nes_init_adapter(struct nes_device *nesdev, u8 hw_rev) {
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nesadapter->base_pd = 1;
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nesadapter->device_cap_flags =
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IB_DEVICE_ZERO_STAG | IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW;
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IB_DEVICE_ZERO_STAG | IB_DEVICE_MEM_WINDOW;
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nesadapter->allocated_qps = (unsigned long *)&(((unsigned char *)nesadapter)
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[(sizeof(struct nes_adapter)+(sizeof(unsigned long)-1))&(~(sizeof(unsigned long)-1))]);
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@ -533,7 +533,10 @@ struct ib_uverbs_send_wr {
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__u32 num_sge;
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__u32 opcode;
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__u32 send_flags;
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__u32 imm_data;
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union {
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__u32 imm_data;
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__u32 invalidate_rkey;
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} ex;
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union {
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struct {
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__u64 remote_addr;
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@ -94,7 +94,7 @@ enum ib_device_cap_flags {
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IB_DEVICE_SRQ_RESIZE = (1<<13),
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IB_DEVICE_N_NOTIFY_CQ = (1<<14),
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IB_DEVICE_ZERO_STAG = (1<<15),
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IB_DEVICE_SEND_W_INV = (1<<16),
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IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */
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IB_DEVICE_MEM_WINDOW = (1<<17),
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/*
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* Devices should set IB_DEVICE_UD_IP_SUM if they support
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@ -105,6 +105,7 @@ enum ib_device_cap_flags {
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*/
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IB_DEVICE_UD_IP_CSUM = (1<<18),
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IB_DEVICE_UD_TSO = (1<<19),
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IB_DEVICE_SEND_W_INV = (1<<21),
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};
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enum ib_atomic_cap {
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@ -625,7 +626,8 @@ enum ib_wr_opcode {
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IB_WR_RDMA_READ,
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IB_WR_ATOMIC_CMP_AND_SWP,
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IB_WR_ATOMIC_FETCH_AND_ADD,
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IB_WR_LSO
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IB_WR_LSO,
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IB_WR_SEND_WITH_INV,
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};
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enum ib_send_flags {
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@ -649,7 +651,10 @@ struct ib_send_wr {
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int num_sge;
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enum ib_wr_opcode opcode;
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int send_flags;
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__be32 imm_data;
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union {
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__be32 imm_data;
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u32 invalidate_rkey;
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} ex;
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union {
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struct {
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u64 remote_addr;
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@ -1573,7 +1573,6 @@ rpcrdma_ep_post(struct rpcrdma_ia *ia,
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send_wr.sg_list = req->rl_send_iov;
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send_wr.num_sge = req->rl_niovs;
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send_wr.opcode = IB_WR_SEND;
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send_wr.imm_data = 0;
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if (send_wr.num_sge == 4) /* no need to sync any pad (constant) */
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ib_dma_sync_single_for_device(ia->ri_id->device,
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req->rl_send_iov[3].addr, req->rl_send_iov[3].length,
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