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Renesas ARM Based r7s72100 SoC CCF Updates for v3.16
r7s72100 (RZ/A1H) SoC and its Genmai board * Add and use CCF support * Initislise SCIF, I2C and SPI via DT -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTdWCgAAoJENfPZGlqN0++KwYQALL3hcVIZghBDNjOct7w7HFp a6FAf6NVzlRkydB5Isn3OW0P8ivnhVKX6TcCzPDncXb9rh8hMwpeQHQO6gXajFwc Fb7AbDnchqH9Vqx7MFyPW/DkUcm/LYMIsMobDnBEIbK77971Sha5efqVDmB0ymuy b8C3AzQ9QXPzuzII04lDdjLv9n76NnB17/+ixrE6VYlPjqHiIOHKBiyPozEeNbPz okWmR01dHkf1gQfYj46HsdGbTgHRQ1RDjRXJnmBWeD61y53xvgb4PCUxbzgkDR1x T06LTuYX7GTBuPT8Nok+NM3Nbw5dEpCzX5HkW5KKgmHd2zfD73FN5WE6xAwwtSRX dzaKOfqonSsqCm1ZGcgHAMCbB4lfi4j8rgdDgvZ71qalDDes3W99pobXu2xYAG+v 9tvW4IPMsJFYYReULjNCFYawfrlUwHKK6LCS8zLaBgvkAH9Smdy2f2FlDYsnk7xE j10SrUbhkds+moGqn/GX2PdWr45xvNvK3EqTN7TUsSaeO0i0kbDYggNzUhzs4QJ4 f3QKTldxv+1yE8+mQXCd4etDIIG6ItSKI2739+C+tTeJ4sJ5B/WJJ/5B67nLDMZI pkZ9jmOWLluqCcgzybbxxlScc5EiAQ0iT/Dx764qs1RU5x0XIhgPR9q7hC4LcNjS AKvRT6W4D98mnwUMy0nH =Y38+ -----END PGP SIGNATURE----- Merge tag 'renesas-r7s72100-ccf-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards Merge "Renesas ARM Based r7s72100 SoC CCF Updates for v3.16" from Simon Horman: r7s72100 (RZ/A1H) SoC and its Genmai board * Add and use CCF support * Initislise SCIF, I2C and SPI via DT * tag 'renesas-r7s72100-ccf-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r7s72100: use workaround for non DT-clocks ARM: shmobile: Add forward declaration of struct clk to silence warning ARM: shmobile: r7s72100: remove SPI DT clocks from legacy clock support ARM: shmobile: r7s72100: add spi clocks to dtsi ARM: shmobile: r7s72100: remove I2C DT clocks from legacy clock support ARM: shmobile: r7s72100: add i2c clocks to dtsi ARM: shmobile: r7s72100: genmai: platform scif devices only for legacy support ARM: shmobile: r7s72100: genmai: add uart alias and activate scif2 as console ARM: shmobile: r7s72100: add scif nodes to dtsi ARM: shmobile: r7s72100: genmai: populate nodes for external clocks ARM: shmobile: r7s72100: add essential clock nodes to dtsi ARM: shmobile: r7s72100: document MSTP clock support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
0db6542dd4
@ -10,6 +10,7 @@ index in the group, from 0 to 31.
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Required Properties:
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- compatible: Must be one of the following
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- "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
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- "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
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- "renesas,r8a7791-mstp-clocks" for R8A7791 (R-Car M2) MSTP gate clocks
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- "renesas,cpg-mstp-clock" for generic MSTP gate clocks
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@ -1,7 +1,8 @@
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/*
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* Device Tree Source for the Genmai board
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013-14 Renesas Solutions Corp.
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* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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@ -15,6 +16,10 @@
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model = "Genmai";
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compatible = "renesas,genmai-reference", "renesas,r7s72100";
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aliases {
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serial2 = &scif2;
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};
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chosen {
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bootargs = "console=ttySC2,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp";
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};
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@ -30,6 +35,14 @@
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};
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};
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&extal_clk {
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clock-frequency = <13330000>;
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};
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&usb_x1_clk {
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clock-frequency = <48000000>;
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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@ -40,3 +53,7 @@
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pagesize = <64>;
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};
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};
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&scif2 {
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status = "okay";
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};
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@ -1,13 +1,15 @@
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/*
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* Device Tree Source for the r7s72100 SoC
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013-14 Renesas Solutions Corp.
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* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/clock/r7s72100-clock.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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@ -28,6 +30,112 @@
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spi4 = &spi4;
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};
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clocks {
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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/* External clocks */
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extal_clk: extal_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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clock-output-names = "extal";
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};
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usb_x1_clk: usb_x1_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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/* If clk present, value must be set by board */
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clock-frequency = <0>;
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clock-output-names = "usb_x1";
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};
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/* Special CPG clocks */
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cpg_clocks: cpg_clocks@fcfe0000 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-cpg-clocks",
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"renesas,rz-cpg-clocks";
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reg = <0xfcfe0000 0x18>;
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clocks = <&extal_clk>, <&usb_x1_clk>;
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clock-output-names = "pll", "i", "g";
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};
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/* Fixed factor clocks */
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b_clk: b_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <3>;
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clock-output-names = "b";
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};
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p1_clk: p1_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <6>;
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clock-output-names = "p1";
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};
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p0_clk: p0_clk {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&cpg_clocks R7S72100_CLK_PLL>;
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clock-mult = <1>;
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clock-div = <12>;
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clock-output-names = "p0";
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};
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/* MSTP clocks */
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mstp3_clks: mstp3_clks@fcfe0420 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0420 4>;
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clocks = <&p0_clk>;
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clock-indices = <R7S72100_CLK_MTU2>;
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clock-output-names = "mtu2";
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};
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mstp4_clks: mstp4_clks@fcfe0424 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0424 4>;
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clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
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<&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>;
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clock-indices = <
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R7S72100_CLK_SCIF0 R7S72100_CLK_SCIF1 R7S72100_CLK_SCIF2 R7S72100_CLK_SCIF3
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R7S72100_CLK_SCIF4 R7S72100_CLK_SCIF5 R7S72100_CLK_SCIF6 R7S72100_CLK_SCIF7
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>;
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clock-output-names = "scif0", "scif1", "scif2", "scif3", "scif4", "scif5", "scif6", "scif7";
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};
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mstp9_clks: mstp9_clks@fcfe0438 {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe0438 4>;
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clocks = <&p0_clk>, <&p0_clk>, <&p0_clk>, <&p0_clk>;
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clock-indices = <
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R7S72100_CLK_I2C0 R7S72100_CLK_I2C1 R7S72100_CLK_I2C2 R7S72100_CLK_I2C3
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>;
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clock-output-names = "i2c0", "i2c1", "i2c2", "i2c3";
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};
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mstp10_clks: mstp10_clks@fcfe043c {
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#clock-cells = <1>;
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compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0xfcfe043c 4>;
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clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>,
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<&p1_clk>;
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clock-indices = <
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R7S72100_CLK_SPI0 R7S72100_CLK_SPI1 R7S72100_CLK_SPI2 R7S72100_CLK_SPI3
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R7S72100_CLK_SPI4
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>;
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clock-output-names = "spi0", "spi1", "spi2", "spi3", "spi4";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@ -61,6 +169,7 @@
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<0 162 IRQ_TYPE_LEVEL_HIGH>,
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<0 163 IRQ_TYPE_LEVEL_HIGH>,
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<0 164 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C0>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -78,6 +187,7 @@
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<0 170 IRQ_TYPE_LEVEL_HIGH>,
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<0 171 IRQ_TYPE_LEVEL_HIGH>,
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<0 172 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C1>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -95,6 +205,7 @@
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<0 178 IRQ_TYPE_LEVEL_HIGH>,
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<0 179 IRQ_TYPE_LEVEL_HIGH>,
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<0 180 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C2>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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@ -112,10 +223,107 @@
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<0 186 IRQ_TYPE_LEVEL_HIGH>,
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<0 187 IRQ_TYPE_LEVEL_HIGH>,
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<0 188 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp9_clks R7S72100_CLK_I2C3>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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scif0: serial@e8007000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8007000 64>;
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interrupts = <0 190 IRQ_TYPE_LEVEL_HIGH>,
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<0 191 IRQ_TYPE_LEVEL_HIGH>,
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<0 192 IRQ_TYPE_LEVEL_HIGH>,
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<0 189 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif1: serial@e8007800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8007800 64>;
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interrupts = <0 194 IRQ_TYPE_LEVEL_HIGH>,
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<0 195 IRQ_TYPE_LEVEL_HIGH>,
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<0 196 IRQ_TYPE_LEVEL_HIGH>,
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<0 193 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif2: serial@e8008000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8008000 64>;
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interrupts = <0 198 IRQ_TYPE_LEVEL_HIGH>,
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<0 199 IRQ_TYPE_LEVEL_HIGH>,
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<0 200 IRQ_TYPE_LEVEL_HIGH>,
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<0 197 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif3: serial@e8008800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8008800 64>;
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interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>,
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<0 203 IRQ_TYPE_LEVEL_HIGH>,
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<0 204 IRQ_TYPE_LEVEL_HIGH>,
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<0 201 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif4: serial@e8009000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8009000 64>;
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interrupts = <0 206 IRQ_TYPE_LEVEL_HIGH>,
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<0 207 IRQ_TYPE_LEVEL_HIGH>,
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<0 208 IRQ_TYPE_LEVEL_HIGH>,
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<0 205 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif5: serial@e8009800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe8009800 64>;
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interrupts = <0 210 IRQ_TYPE_LEVEL_HIGH>,
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<0 211 IRQ_TYPE_LEVEL_HIGH>,
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<0 212 IRQ_TYPE_LEVEL_HIGH>,
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<0 209 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif6: serial@e800a000 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe800a000 64>;
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interrupts = <0 214 IRQ_TYPE_LEVEL_HIGH>,
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<0 215 IRQ_TYPE_LEVEL_HIGH>,
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<0 216 IRQ_TYPE_LEVEL_HIGH>,
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<0 213 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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scif7: serial@e800a800 {
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compatible = "renesas,scif-r7s72100", "renesas,scif";
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reg = <0xe800a800 64>;
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interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
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<0 219 IRQ_TYPE_LEVEL_HIGH>,
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<0 220 IRQ_TYPE_LEVEL_HIGH>,
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<0 217 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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spi0: spi@e800c800 {
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compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
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reg = <0xe800c800 0x24>;
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@ -123,6 +331,7 @@
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<0 239 IRQ_TYPE_LEVEL_HIGH>,
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<0 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
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num-cs = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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@ -136,6 +345,7 @@
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<0 242 IRQ_TYPE_LEVEL_HIGH>,
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<0 243 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "error", "rx", "tx";
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clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
|
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num-cs = <1>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
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@ -149,6 +359,7 @@
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<0 245 IRQ_TYPE_LEVEL_HIGH>,
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<0 246 IRQ_TYPE_LEVEL_HIGH>;
|
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interrupt-names = "error", "rx", "tx";
|
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clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
|
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num-cs = <1>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
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@ -162,6 +373,7 @@
|
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<0 248 IRQ_TYPE_LEVEL_HIGH>,
|
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<0 249 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "error", "rx", "tx";
|
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clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
|
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num-cs = <1>;
|
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#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -175,6 +387,7 @@
|
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<0 251 IRQ_TYPE_LEVEL_HIGH>,
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<0 252 IRQ_TYPE_LEVEL_HIGH>;
|
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interrupt-names = "error", "rx", "tx";
|
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clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
|
||||
num-cs = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
@ -18,18 +18,28 @@
|
||||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <mach/clock.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/r7s72100.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#ifdef CONFIG_COMMON_CLK
|
||||
/*
|
||||
* This is a really crude hack to provide clkdev support to platform
|
||||
* devices until they get moved to DT.
|
||||
*/
|
||||
static const struct clk_name clk_names[] = {
|
||||
{ "mtu2", "fck", "sh-mtu2" },
|
||||
};
|
||||
#endif
|
||||
|
||||
static void __init genmai_add_standard_devices(void)
|
||||
{
|
||||
#ifdef CONFIG_COMMON_CLK
|
||||
of_clk_init(NULL);
|
||||
shmobile_clk_workaround(clk_names, ARRAY_SIZE(clk_names), true);
|
||||
#else
|
||||
r7s72100_clock_init();
|
||||
#endif
|
||||
|
||||
@ -21,6 +21,7 @@
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/spi/rspi.h>
|
||||
#include <linux/spi/spi.h>
|
||||
@ -89,6 +90,40 @@ static const struct spi_board_info spi_info[] __initconst = {
|
||||
},
|
||||
};
|
||||
|
||||
/* SCIF */
|
||||
#define R7S72100_SCIF(index, baseaddr, irq) \
|
||||
static const struct plat_sci_port scif##index##_platform_data = { \
|
||||
.type = PORT_SCIF, \
|
||||
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
|
||||
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
|
||||
SCSCR_REIE, \
|
||||
}; \
|
||||
\
|
||||
static struct resource scif##index##_resources[] = { \
|
||||
DEFINE_RES_MEM(baseaddr, 0x100), \
|
||||
DEFINE_RES_IRQ(irq + 1), \
|
||||
DEFINE_RES_IRQ(irq + 2), \
|
||||
DEFINE_RES_IRQ(irq + 3), \
|
||||
DEFINE_RES_IRQ(irq), \
|
||||
} \
|
||||
|
||||
R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
|
||||
R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
|
||||
R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
|
||||
R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
|
||||
R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
|
||||
R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
|
||||
R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
|
||||
R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
|
||||
|
||||
#define r7s72100_register_scif(index) \
|
||||
platform_device_register_resndata(&platform_bus, "sh-sci", index, \
|
||||
scif##index##_resources, \
|
||||
ARRAY_SIZE(scif##index##_resources), \
|
||||
&scif##index##_platform_data, \
|
||||
sizeof(scif##index##_platform_data))
|
||||
|
||||
static void __init genmai_add_standard_devices(void)
|
||||
{
|
||||
r7s72100_clock_init();
|
||||
@ -102,6 +137,15 @@ static void __init genmai_add_standard_devices(void)
|
||||
r7s72100_register_rspi(3);
|
||||
r7s72100_register_rspi(4);
|
||||
spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
|
||||
|
||||
r7s72100_register_scif(0);
|
||||
r7s72100_register_scif(1);
|
||||
r7s72100_register_scif(2);
|
||||
r7s72100_register_scif(3);
|
||||
r7s72100_register_scif(4);
|
||||
r7s72100_register_scif(5);
|
||||
r7s72100_register_scif(6);
|
||||
r7s72100_register_scif(7);
|
||||
}
|
||||
|
||||
static const char * const genmai_boards_compat_dt[] __initconst = {
|
||||
|
||||
@ -194,15 +194,6 @@ static struct clk_lookup lookups[] = {
|
||||
CLKDEV_DEV_ID("rspi-rz.2", &mstp_clks[MSTP105]),
|
||||
CLKDEV_DEV_ID("rspi-rz.3", &mstp_clks[MSTP104]),
|
||||
CLKDEV_DEV_ID("rspi-rz.4", &mstp_clks[MSTP103]),
|
||||
CLKDEV_DEV_ID("e800c800.spi", &mstp_clks[MSTP107]),
|
||||
CLKDEV_DEV_ID("e800d000.spi", &mstp_clks[MSTP106]),
|
||||
CLKDEV_DEV_ID("e800d800.spi", &mstp_clks[MSTP105]),
|
||||
CLKDEV_DEV_ID("e800e000.spi", &mstp_clks[MSTP104]),
|
||||
CLKDEV_DEV_ID("e800e800.spi", &mstp_clks[MSTP103]),
|
||||
CLKDEV_DEV_ID("fcfee000.i2c", &mstp_clks[MSTP97]),
|
||||
CLKDEV_DEV_ID("fcfee400.i2c", &mstp_clks[MSTP96]),
|
||||
CLKDEV_DEV_ID("fcfee800.i2c", &mstp_clks[MSTP95]),
|
||||
CLKDEV_DEV_ID("fcfeec00.i2c", &mstp_clks[MSTP94]),
|
||||
CLKDEV_DEV_ID("r7s72100-ether", &mstp_clks[MSTP74]),
|
||||
|
||||
/* ICK */
|
||||
|
||||
@ -16,6 +16,7 @@ void shmobile_clk_workaround(const struct clk_name *clks, int nr_clks,
|
||||
#else /* CONFIG_COMMON_CLK */
|
||||
/* legacy clock implementation */
|
||||
|
||||
struct clk;
|
||||
unsigned long shmobile_fixed_ratio_clk_recalc(struct clk *clk);
|
||||
extern struct sh_clk_ops shmobile_fixed_ratio_clk_ops;
|
||||
|
||||
|
||||
@ -21,47 +21,12 @@
|
||||
#include <linux/irq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/r7s72100.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#define R7S72100_SCIF(index, baseaddr, irq) \
|
||||
static const struct plat_sci_port scif##index##_platform_data = { \
|
||||
.type = PORT_SCIF, \
|
||||
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
|
||||
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
|
||||
SCSCR_REIE, \
|
||||
}; \
|
||||
\
|
||||
static struct resource scif##index##_resources[] = { \
|
||||
DEFINE_RES_MEM(baseaddr, 0x100), \
|
||||
DEFINE_RES_IRQ(irq + 1), \
|
||||
DEFINE_RES_IRQ(irq + 2), \
|
||||
DEFINE_RES_IRQ(irq + 3), \
|
||||
DEFINE_RES_IRQ(irq), \
|
||||
} \
|
||||
|
||||
R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
|
||||
R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
|
||||
R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
|
||||
R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
|
||||
R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
|
||||
R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
|
||||
R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
|
||||
R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
|
||||
|
||||
#define r7s72100_register_scif(index) \
|
||||
platform_device_register_resndata(&platform_bus, "sh-sci", index, \
|
||||
scif##index##_resources, \
|
||||
ARRAY_SIZE(scif##index##_resources), \
|
||||
&scif##index##_platform_data, \
|
||||
sizeof(scif##index##_platform_data))
|
||||
|
||||
|
||||
static struct resource mtu2_resources[] __initdata = {
|
||||
DEFINE_RES_MEM(0xfcff0000, 0x400),
|
||||
DEFINE_RES_IRQ_NAMED(gic_iid(139), "tgi0a"),
|
||||
@ -75,14 +40,6 @@ static struct resource mtu2_resources[] __initdata = {
|
||||
|
||||
void __init r7s72100_add_dt_devices(void)
|
||||
{
|
||||
r7s72100_register_scif(0);
|
||||
r7s72100_register_scif(1);
|
||||
r7s72100_register_scif(2);
|
||||
r7s72100_register_scif(3);
|
||||
r7s72100_register_scif(4);
|
||||
r7s72100_register_scif(5);
|
||||
r7s72100_register_scif(6);
|
||||
r7s72100_register_scif(7);
|
||||
r7s72100_register_mtu2();
|
||||
}
|
||||
|
||||
|
||||
41
include/dt-bindings/clock/r7s72100-clock.h
Normal file
41
include/dt-bindings/clock/r7s72100-clock.h
Normal file
@ -0,0 +1,41 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Renesas Solutions Corp.
|
||||
* Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; version 2 of the License.
|
||||
*/
|
||||
|
||||
#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
|
||||
#define __DT_BINDINGS_CLOCK_R7S72100_H__
|
||||
|
||||
#define R7S72100_CLK_PLL 0
|
||||
|
||||
/* MSTP3 */
|
||||
#define R7S72100_CLK_MTU2 3
|
||||
|
||||
/* MSTP4 */
|
||||
#define R7S72100_CLK_SCIF0 7
|
||||
#define R7S72100_CLK_SCIF1 6
|
||||
#define R7S72100_CLK_SCIF2 5
|
||||
#define R7S72100_CLK_SCIF3 4
|
||||
#define R7S72100_CLK_SCIF4 3
|
||||
#define R7S72100_CLK_SCIF5 2
|
||||
#define R7S72100_CLK_SCIF6 1
|
||||
#define R7S72100_CLK_SCIF7 0
|
||||
|
||||
/* MSTP9 */
|
||||
#define R7S72100_CLK_I2C0 7
|
||||
#define R7S72100_CLK_I2C1 6
|
||||
#define R7S72100_CLK_I2C2 5
|
||||
#define R7S72100_CLK_I2C3 4
|
||||
|
||||
/* MSTP10 */
|
||||
#define R7S72100_CLK_SPI0 7
|
||||
#define R7S72100_CLK_SPI1 6
|
||||
#define R7S72100_CLK_SPI2 5
|
||||
#define R7S72100_CLK_SPI3 4
|
||||
#define R7S72100_CLK_SPI4 3
|
||||
|
||||
#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
|
||||
Loading…
Reference in New Issue
Block a user