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drm/radeon: use cached memory when evicting for vram on non agp
Force the use of cached memory when evicting from vram on non agp hardware. Also force write combine on agp hw. This is to insure the minimum cache type change when allocating memory and improving memory eviction especialy on pci/pcie hw. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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@ -88,10 +88,20 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
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if (domain & RADEON_GEM_DOMAIN_VRAM)
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rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
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TTM_PL_FLAG_VRAM;
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if (domain & RADEON_GEM_DOMAIN_GTT)
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rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
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if (domain & RADEON_GEM_DOMAIN_CPU)
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rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
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if (domain & RADEON_GEM_DOMAIN_GTT) {
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if (rbo->rdev->flags & RADEON_IS_AGP) {
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rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_TT;
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} else {
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rbo->placements[c++] = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_TT;
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}
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}
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if (domain & RADEON_GEM_DOMAIN_CPU) {
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if (rbo->rdev->flags & RADEON_IS_AGP) {
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rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_TT;
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} else {
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rbo->placements[c++] = TTM_PL_FLAG_CACHED | TTM_PL_FLAG_TT;
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}
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}
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if (!c)
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rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
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rbo->placement.num_placement = c;
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